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authorFrédéric Desbiens <[email protected]>2026-03-06 19:27:49 +0100
committerGitHub <[email protected]>2026-03-06 19:27:49 +0100
commit3726d7906b4808bfec7855fc088e073199df9120 (patch)
tree8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports_module/rxv2/iar/example_build
parent4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff)
parentc3259a216026372e3833dd8996a68f77e8595fbd (diff)
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports_module/rxv2/iar/example_build')
-rw-r--r--ports_module/rxv2/iar/example_build/hwsetup.c62
-rw-r--r--ports_module/rxv2/iar/example_build/hwsetup.h24
-rw-r--r--ports_module/rxv2/iar/example_build/low_level_init.c2
-rw-r--r--ports_module/rxv2/iar/example_build/sample_module_linker.icf6
-rw-r--r--ports_module/rxv2/iar/example_build/sample_threadx_module.c62
-rw-r--r--ports_module/rxv2/iar/example_build/sample_threadx_module_manager.c26
-rw-r--r--ports_module/rxv2/iar/example_build/tx_initialize_low_level.s14
-rw-r--r--ports_module/rxv2/iar/example_build/txm_module_preamble.s22
8 files changed, 106 insertions, 112 deletions
diff --git a/ports_module/rxv2/iar/example_build/hwsetup.c b/ports_module/rxv2/iar/example_build/hwsetup.c
index ab3e3bac..c03895a5 100644
--- a/ports_module/rxv2/iar/example_build/hwsetup.c
+++ b/ports_module/rxv2/iar/example_build/hwsetup.c
@@ -1,25 +1,25 @@
/* Adapted for use with IAR Embedded Workbench */
/***********************************************************************************************************************
* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
-* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
-* applicable laws, including copyright laws.
+* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
+* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
+* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
-* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
-* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
-* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
+* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
+* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
-* this software. By using this software, you agree to the additional terms and conditions found by accessing the
+* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
+* this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
-* http://www.renesas.com/disclaimer
+* http://www.renesas.com/disclaimer
*
-* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved.
+* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : hwsetup.c
-* Version : 1.0
+* Version : 1.0
* Device(s) : RX
* H/W Platform : RX65N
* Description : Defines the initialisation routines used each time the MCU is restarted.
@@ -83,34 +83,34 @@ void operating_frequency_set(void)
Peripheral Clock Frequency....... 48 MHz
USB Clock Frequency.............. 48 MHz
External Bus Clock Frequency..... 24 MHz */
-
+
volatile unsigned int i;
-
+
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
-
+
/* Uncomment if not using sub-clock */
//SYSTEM.SOSCCR.BYTE = 0x01; /* stop sub-clock */
SYSTEM.SOSCCR.BYTE = 0x00; /* Enable sub-clock for RTC */
-
+
/* Wait 131,072 cycles * 12 MHz = 10.9 ms */
SYSTEM.MOSCWTCR.BYTE = 0x0D;
-
+
/* x16 @PLL, 2 divisor */
SYSTEM.PLLCR.WORD = 0x0F01;
-
+
/* EXTAL ON */
SYSTEM.MOSCCR.BYTE = 0x00;
-
+
/* PLL ON */
SYSTEM.PLLCR2.BYTE = 0x00;
-
+
for(i = 0;i< 0x168;i++)
{
/* Wait over 12ms */
__no_operation();
}
-
+
/* Setup system clocks
SCKCR - System Clock Control Register
b31:b28 FCK[3:0] 0x02 = Flash clock: PLL/4 = (192 / 4) = 48 MHz
@@ -120,17 +120,17 @@ void operating_frequency_set(void)
b11:b8 PCKB[3:0] 0x02 = Peripheral clock B: PLL/4 = 48 MHz
*/
SYSTEM.SCKCR.LONG = 0x21031222; /* ICK=PLL/2,BCK,FCK,PCK=PLL/4 */
-
+
/* Setup IEBUS and USB clocks
- SCKCR2 - System Clock Control Register 2
+ SCKCR2 - System Clock Control Register 2
b7:b4 UCK[3:0] 0x03 = USB clock is PLL/4 = 48 MHz
b3:b0 IEBCK[3:0] 0x01 = IE Bus clock is PLL/2 = 96 MHz
*/
SYSTEM.SCKCR2.WORD = 0x0031;
-
+
/* ICLK, PCLKB, FCLK, BCLK, IECLK, and USBCLK all come from PLL circuit */
SYSTEM.SCKCR3.WORD = 0x0400;
-
+
/* Protect on. */
SYSTEM.PRCR.WORD = 0xA500;
}
@@ -146,7 +146,7 @@ void interrupts_configure(void)
{
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
-
+
/* Enable the bus error interrupt to catch accesses to illegal/reserved areas
of memory. */
@@ -154,9 +154,9 @@ void interrupts_configure(void)
IR(BSC,BUSERR) = 0;
/* Make this the highest priority interrupt (adjust as necessary for your
application) */
- IPR(BSC,BUSERR) = 0x0F;
+ IPR(BSC,BUSERR) = 0x0F;
/* Enable the interrupt in the ICU */
- IEN(BSC,BUSERR) = 1;
+ IEN(BSC,BUSERR) = 1;
/* Enable illegal address interrupt in the BSC */
BSC.BEREN.BIT.IGAEN = 1;
}
@@ -167,11 +167,11 @@ void interrupts_configure(void)
* Description : Sample ISR for bus error (must do hardware setup first!)
* By default, this demo code enables the Bus Error Interrupt.
* This interrupt will fire if the user tries to access code
-* or data from one of the reserved areas in the memory map,
+* or data from one of the reserved areas in the memory map,
* including the areas covered by disabled chip selects.
* A nop statement is included here as a convenient place
* to set a breakpoint during debugging and development, and
-* further handling should be added by the user for their
+* further handling should be added by the user for their
* application.
* Arguments : none
* Return value : none
@@ -183,7 +183,7 @@ __interrupt void buserr_isr(void)
the register BSC.BERSR2.WORD. The upper 13 bits of this register
contain the upper 13-bits of the offending address (in 512K byte units).
*/
-
+
/* Add your own code here to handle this interrupt */
__no_operation();
}
diff --git a/ports_module/rxv2/iar/example_build/hwsetup.h b/ports_module/rxv2/iar/example_build/hwsetup.h
index d2bae5f6..5ff001c0 100644
--- a/ports_module/rxv2/iar/example_build/hwsetup.h
+++ b/ports_module/rxv2/iar/example_build/hwsetup.h
@@ -1,25 +1,25 @@
/* Adapted for use with IAR Embedded Workbench */
/***********************************************************************************************************************
* DISCLAIMER
-* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
-* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
-* applicable laws, including copyright laws.
+* This software is supplied by Renesas Electronics Corporation and is only intended for use with Renesas products. No
+* other uses are authorized. This software is owned by Renesas Electronics Corporation and is protected under all
+* applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
-* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
-* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
-* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
-* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
+* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. TO THE MAXIMUM
+* EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES
+* SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR ANY REASON RELATED TO THIS
* SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
-* this software. By using this software, you agree to the additional terms and conditions found by accessing the
+* Renesas reserves the right, without notice, to make changes to this software and to discontinue the availability of
+* this software. By using this software, you agree to the additional terms and conditions found by accessing the
* following link:
-* http://www.renesas.com/disclaimer
+* http://www.renesas.com/disclaimer
*
-* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved.
+* Copyright (C) 2012 Renesas Electronics Corporation. All rights reserved.
***********************************************************************************************************************/
/***********************************************************************************************************************
* File Name : hwsetup.h
-* Version : 1.0
+* Version : 1.0
* Description : Hardware setup header file..
***********************************************************************************************************************/
/***********************************************************************************************************************
diff --git a/ports_module/rxv2/iar/example_build/low_level_init.c b/ports_module/rxv2/iar/example_build/low_level_init.c
index 5b89a40a..95069278 100644
--- a/ports_module/rxv2/iar/example_build/low_level_init.c
+++ b/ports_module/rxv2/iar/example_build/low_level_init.c
@@ -31,7 +31,7 @@ __intrinsic
int __low_level_init ( void )
{
hardware_setup();
-
+
/*==================================*/
/* Choose if segment initialization */
/* should be done or not. */
diff --git a/ports_module/rxv2/iar/example_build/sample_module_linker.icf b/ports_module/rxv2/iar/example_build/sample_module_linker.icf
index b6187731..d37c93f1 100644
--- a/ports_module/rxv2/iar/example_build/sample_module_linker.icf
+++ b/ports_module/rxv2/iar/example_build/sample_module_linker.icf
@@ -60,10 +60,10 @@ define block HEAP with alignment = 4, size = _HEAP_SIZE { };
// { ro section .dataflash* };
define movable block ROPI with alignment = 4, fixed order, static base CB
-{
+{
ro object txm_module_preamble_rx65n.o,
- ro,
- ro data
+ ro,
+ ro data
};
define movable block RWPI with alignment = 8, fixed order, static base SB
diff --git a/ports_module/rxv2/iar/example_build/sample_threadx_module.c b/ports_module/rxv2/iar/example_build/sample_threadx_module.c
index 51822c10..80d89b01 100644
--- a/ports_module/rxv2/iar/example_build/sample_threadx_module.c
+++ b/ports_module/rxv2/iar/example_build/sample_threadx_module.c
@@ -1,5 +1,5 @@
-/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes
- examples of eight threads of different priorities, using a message queue, semaphore, mutex,
+/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes
+ examples of eight threads of different priorities, using a message queue, semaphore, mutex,
event flags group, byte pool, and block pool. */
/* Specify that this is a module! */
@@ -20,7 +20,7 @@
#define DEMO_QUEUE_SIZE 100
-/* Define the pool space in the bss section of the module. ULONG is used to
+/* Define the pool space in the bss section of the module. ULONG is used to
get the word alignment. */
ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4];
@@ -99,7 +99,7 @@ void demo_module_start(ULONG id)
CHAR *pointer;
/* Allocate all the objects. In MPU mode, modules cannot allocate control blocks within
- their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting
+ their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting
the control block(s). */
txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD));
txm_module_object_allocate((void*)&thread_1, sizeof(TX_THREAD));
@@ -115,7 +115,7 @@ CHAR *pointer;
txm_module_object_allocate((void*)&event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP));
txm_module_object_allocate((void*)&byte_pool_0, sizeof(TX_BYTE_POOL));
txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL));
-
+
/* Create a byte memory pool from which to allocate the thread stacks. */
tx_byte_pool_create(byte_pool_0, "module byte pool 0", demo_module_pool_space, DEMO_BYTE_POOL_SIZE);
@@ -127,42 +127,42 @@ CHAR *pointer;
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create the main thread. */
- tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0,
+ pointer, DEMO_STACK_SIZE,
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 1. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
- /* Create threads 1 and 2. These threads pass information through a ThreadX
+ /* Create threads 1 and 2. These threads pass information through a ThreadX
message queue. It is also interesting to note that these threads have a time
slice. */
- tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1,
+ pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
/* Allocate the stack for thread 2. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
- tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2,
+ pointer, DEMO_STACK_SIZE,
16, 16, 4, TX_AUTO_START);
/* Allocate the stack for thread 3. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
- /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
+ /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore.
An interesting thing here is that both threads share the same instruction area. */
- tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3,
+ pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 4. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
- tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4,
+ pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 5. */
@@ -170,23 +170,23 @@ CHAR *pointer;
/* Create thread 5. This thread simply pends on an event flag which will be set
by thread_0. */
- tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5,
+ pointer, DEMO_STACK_SIZE,
4, 4, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 6. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
/* Create threads 6 and 7. These threads compete for a ThreadX mutex. */
- tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6,
+ pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the stack for thread 7. */
tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT);
- tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7,
+ pointer, DEMO_STACK_SIZE,
8, 8, TX_NO_TIME_SLICE, TX_AUTO_START);
/* Allocate the message queue. */
@@ -196,7 +196,7 @@ CHAR *pointer;
tx_queue_create(queue_0, "module queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG));
tx_queue_send_notify(queue_0, queue_0_notify);
-
+
/* Create the semaphore used by threads 3 and 4. */
tx_semaphore_create(semaphore_0, "module semaphore 0", 1);
@@ -241,7 +241,7 @@ UINT status;
/* Sleep for 10 ticks. */
tx_thread_sleep(10);
-
+
/* Set event flag 0 to wakeup thread 5. */
status = tx_event_flags_set(event_flags_0, 0x1, TX_OR);
@@ -289,18 +289,18 @@ UINT status;
{
/* Write value to shared memory region. */
// *(ULONG *)0x00020000 = 0xCDCDCDCD;
-
+
/* Increment the thread counter. */
thread_2_counter++;
/* Retrieve a message from the queue. */
status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER);
- /* Check completion status and make sure the message is what we
+ /* Check completion status and make sure the message is what we
expected. */
if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received))
break;
-
+
/* Otherwise, all is okay. Increment the received message count. */
thread_2_messages_received++;
}
@@ -354,12 +354,12 @@ ULONG actual_flags;
/* This thread simply waits for an event in a forever loop. */
while(1)
{
-
+
/* Increment the thread counter. */
thread_5_counter++;
/* Wait for event flag 0. */
- status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR,
+ status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR,
&actual_flags, TX_WAIT_FOREVER);
/* Check status. */
@@ -412,7 +412,7 @@ UINT status;
if (status != TX_SUCCESS)
break;
- /* Release the mutex again. This will actually
+ /* Release the mutex again. This will actually
release ownership since it was obtained twice. */
status = tx_mutex_put(mutex_0);
diff --git a/ports_module/rxv2/iar/example_build/sample_threadx_module_manager.c b/ports_module/rxv2/iar/example_build/sample_threadx_module_manager.c
index 4afbbe39..46e3be59 100644
--- a/ports_module/rxv2/iar/example_build/sample_threadx_module_manager.c
+++ b/ports_module/rxv2/iar/example_build/sample_threadx_module_manager.c
@@ -54,8 +54,8 @@ void tx_application_define(void *first_unused_memory)
CHAR *pointer = (CHAR*)first_unused_memory;
- tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0,
- pointer, DEMO_STACK_SIZE,
+ tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0,
+ pointer, DEMO_STACK_SIZE,
1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
pointer = pointer + DEMO_STACK_SIZE;
}
@@ -75,39 +75,39 @@ void module_manager_entry(ULONG thread_input)
/* Register a fault handler. */
txm_module_manager_memory_fault_notify(module_fault_handler);
-
+
/* Load the module that is already there, in this example it is placed there by the multiple image download. */
txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0xFFF10400);
-
-
+
+
/* Enable 128 byte read/write shared memory region at 0x00020000. */
txm_module_manager_external_memory_enable(&my_module, (void *) 0x00020000, 128, TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_READ | TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE);
-
+
/* Start the module. */
txm_module_manager_start(&my_module);
-
+
/* Sleep for a while.... */
tx_thread_sleep(1000);
-
+
/* Stop the module. */
txm_module_manager_stop(&my_module);
-
+
/* Unload the module. */
txm_module_manager_unload(&my_module);
/* Load the module that is already there. */
txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0xFFF10400);
-
+
/* Set maximum module priority to 5. */
txm_module_manager_maximum_module_priority_set(&my_module, 5);
-
+
/* Start the module again. */
txm_module_manager_start(&my_module);
-
+
/* Now just spin... */
while(1)
{
-
+
tx_thread_sleep(100);
}
}
diff --git a/ports_module/rxv2/iar/example_build/tx_initialize_low_level.s b/ports_module/rxv2/iar/example_build/tx_initialize_low_level.s
index 391e9c5c..b47b1684 100644
--- a/ports_module/rxv2/iar/example_build/tx_initialize_low_level.s
+++ b/ports_module/rxv2/iar/example_build/tx_initialize_low_level.s
@@ -1,10 +1,10 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
@@ -59,12 +59,6 @@
;/* */
;/* _tx_initialize_kernel_enter ThreadX entry function */
;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 01-31-2022 William E. Lamie Initial Version 6.1.10 */
-;/* */
;/**************************************************************************/
public __tx_initialize_low_level
@@ -74,7 +68,7 @@ __tx_initialize_low_level:
; _tx_initialize_unused_memory = (VOID_PTR) &free_mem_start;
;
MOV.L #__tx_free_memory_start, R1 ; Pickup unused memory address
- MOV.L #__tx_initialize_unused_memory,R2
+ MOV.L #__tx_initialize_unused_memory,R2
MOV.L R1,[R2] ; Save first free memory address
; /* Set priority of SWINT to 1. */
diff --git a/ports_module/rxv2/iar/example_build/txm_module_preamble.s b/ports_module/rxv2/iar/example_build/txm_module_preamble.s
index bf5bb9fb..13487bc7 100644
--- a/ports_module/rxv2/iar/example_build/txm_module_preamble.s
+++ b/ports_module/rxv2/iar/example_build/txm_module_preamble.s
@@ -1,7 +1,7 @@
/* Alignment of 4 (16-byte) */
SECTION .text:CODE (4)
-
-
+
+
/* Define public symbols. */
PUBLIC __txm_module_preamble
@@ -25,7 +25,7 @@ __txm_module_preamble:
DC32 0x5 // Module Major Version
DC32 0x6 // Module Minor Version
DC32 32 // Module Preamble Size in 32-bit words
- DC32 0x12345678 // Module ID (application defined)
+ DC32 0x12345678 // Module ID (application defined)
DC32 0x00000007 // Module Properties where:
// Bits 31-24: Compiler ID
// 0 -> IAR
@@ -39,23 +39,23 @@ __txm_module_preamble:
// 1 -> Enable shared/external memory access
DC32 __txm_module_thread_shell_entry - $ // Module Shell Entry Point
DC32 _demo_module_start - $ // Module Start Thread Entry Point
- DC32 0 // Module Stop Thread Entry Point
+ DC32 0 // Module Stop Thread Entry Point
DC32 1 // Module Start/Stop Thread Priority
DC32 1024 // Module Start/Stop Thread Stack Size
DC32 __txm_module_callback_request_thread_entry - $ // Module Callback Thread Entry
- DC32 1 // Module Callback Thread Priority
- DC32 1024 // Module Callback Thread Stack Size
+ DC32 1 // Module Callback Thread Priority
+ DC32 1024 // Module Callback Thread Stack Size
DC32 ROPI$$Length // Module Code Size
DC32 RWPI$$Length // Module Data Size
- DC32 0 // Reserved 0
+ DC32 0 // Reserved 0
DC32 0 // Reserved 1
DC32 0 // Reserved 2
DC32 0 // Reserved 3
DC32 0 // Reserved 4
- DC32 0 // Reserved 5
- DC32 0 // Reserved 6
- DC32 0 // Reserved 7
- DC32 0 // Reserved 8
+ DC32 0 // Reserved 5
+ DC32 0 // Reserved 6
+ DC32 0 // Reserved 7
+ DC32 0 // Reserved 8
DC32 0 // Reserved 9
DC32 0 // Reserved 10
DC32 0 // Reserved 11