Release 6.1.11

4 files changed, 54 insertions, 359 deletions

diff --git a/ports_smp/cortex_a55_smp/gnu/example_build/tx/.cproject b/ports_smp/cortex_a55_smp/gnu/example_build/tx/.cproject
index ec20edd2..3547a1d3 100644
--- a/ports_smp/cortex_a55_smp/gnu/example_build/tx/.cproject
+++ b/ports_smp/cortex_a55_smp/gnu/example_build/tx/.cproject
@@ -129,6 +129,12 @@
                         					
                     </folderInfo>
                     					
+                    <fileInfo id="com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.config.exe.debug.var.gcc-8.3.0-aarch64-elf.794347674.1482422597" name="tx_misra.c" rcbsApplicability="disable" resourcePath="src_generic/tx_misra.c" toolsToInvoke="com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.tool.c.compiler.var.gcc-8.3.0-aarch64-elf.1247168701.1451532610">
+                        						
+                        <tool id="com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.tool.c.compiler.var.gcc-8.3.0-aarch64-elf.1247168701.1451532610" name="GCC C Compiler 8.3.0 [aarch64-elf]" superClass="com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.tool.c.compiler.var.gcc-8.3.0-aarch64-elf.1247168701"/>
+                        					
+                    </fileInfo>
+                    					
                     <sourceEntries>
                         						
                         <entry flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
diff --git a/ports_smp/cortex_a55_smp/gnu/src/tx_thread_context_restore.S b/ports_smp/cortex_a55_smp/gnu/src/tx_thread_context_restore.S
index 4df471ac..21deb75d 100644
--- a/ports_smp/cortex_a55_smp/gnu/src/tx_thread_context_restore.S
+++ b/ports_smp/cortex_a55_smp/gnu/src/tx_thread_context_restore.S
@@ -21,9 +21,6 @@
 /**************************************************************************/
 
 
-/* Include macros for modifying the wait list.  */
-#include "tx_thread_smp_protection_wait_list_macros.h"
-
     .text
     .align 3
 /**************************************************************************/
@@ -31,7 +28,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_context_restore                         ARMv8-A-SMP      */
-/*                                                           6.1.10       */
+/*                                                           6.1.11       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -63,10 +60,13 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  01-31-2022     Andres Mlinar            Updated comments,             */
-/*                                             added ARMv8.2-A support,   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  01-31-2022      Andres Mlinar           Updated comments,             */
+/*                                            added ARMv8.2-A support,    */
 /*                                            resulting in version 6.1.10 */
+/*  04-25-2022      William E. Lamie        Modified comments, removed    */
+/*                                            FIFO queueing,              */
+/*                                            resulting in version 6.1.11 */
 /*                                                                        */
 /**************************************************************************/
 // VOID   _tx_thread_context_restore(VOID)
@@ -216,74 +216,6 @@ __tx_thread_no_preempt_restore:
     // {
 __tx_thread_preempt_restore:
 
-    /* Was the thread being preempted waiting for the lock?  */
-    // if (_tx_thread_smp_protect_wait_counts[this_core] != 0)
-    // {
-
-    LDR     x2, =_tx_thread_smp_protect_wait_counts // Load waiting count list
-    LDR     w3, [x2, x8, LSL #2]                // Load waiting value for this core
-    CMP     w3, #0
-    BEQ     _nobody_waiting_for_lock            // Is the core waiting for the lock?
-
-    /* Do we not have the lock? This means the ISR never got the inter-core lock.  */
-    // if (_tx_thread_smp_protection.tx_thread_smp_protect_owned != this_core)
-    // {
-
-    LDR     x2, =_tx_thread_smp_protection      // Load address of protection structure
-    LDR     w3, [x2, #4]                        // Pickup the owning core
-    CMP     w8, w3                              // Compare our core to the owning core
-    BEQ     _this_core_has_lock                 // Do we have the lock?
-
-    /* We don't have the lock. This core should be in the list. Remove it.  */
-    // _tx_thread_smp_protect_wait_list_remove(this_core);
-
-    _tx_thread_smp_protect_wait_list_remove     // Call macro to remove core from the list
-    B       _nobody_waiting_for_lock            // Leave
-
-    // }
-    // else
-    // {
-    /* We have the lock. This means the ISR got the inter-core lock, but
-       never released it because it saw that there was someone waiting.
-       Note this core is not in the list.  */
-
-_this_core_has_lock:
-
-    /* We're no longer waiting. Note that this should be zero since this happens during thread preemption.  */
-    // _tx_thread_smp_protect_wait_counts[core]--;
-
-    LDR     x2, =_tx_thread_smp_protect_wait_counts // Load waiting count list
-    LDR     w3, [x2, x8, LSL #2]                // Load waiting value for this core
-    SUB     w3, w3, #1                          // Decrement waiting value. Should be zero now
-    STR     w3, [x2, x8, LSL #2]                // Store new waiting value
-
-    /* Now release the inter-core lock.  */
-
-    /* Set protected core as invalid.  */
-    // _tx_thread_smp_protection.tx_thread_smp_protect_core = 0xFFFFFFFF;
-
-    LDR     x2, =_tx_thread_smp_protection      // Load address of protection structure
-    MOV     w3, #0xFFFFFFFF                     // Build invalid value
-    STR     w3, [x2, #4]                        // Mark the protected core as invalid
-    DMB     ISH                                 // Ensure that accesses to shared resource have completed
-
-    /* Release protection.  */
-    // _tx_thread_smp_protection.tx_thread_smp_protect_in_force = 0;
-
-    MOV     w3, #0                              // Build release protection value
-    STR     w3, [x2, #0]                        // Release the protection
-    DSB     ISH                                 // To ensure update of the protection occurs before other CPUs awake
-
-    /* Wake up waiting processors. Note interrupts are already enabled.  */
-
-#ifdef TX_ENABLE_WFE
-    SEV                                         // Send event to other CPUs
-#endif
-
-      // }
-    // }
-
-_nobody_waiting_for_lock:
 
     LDR     x4, [x0, #8]                        // Switch to thread stack pointer
     MOV     sp, x4                              //
diff --git a/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_protect.S b/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_protect.S
index 9cde3e08..b65af329 100644
--- a/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_protect.S
+++ b/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_protect.S
@@ -32,7 +32,7 @@
 /*  FUNCTION                                               RELEASE        */
 /*                                                                        */
 /*    _tx_thread_smp_protect                           Cortex-A35-SMP/AC6 */
-/*                                                           6.1.10       */
+/*                                                           6.1.11       */
 /*  AUTHOR                                                                */
 /*                                                                        */
 /*    William E. Lamie, Microsoft Corporation                             */
@@ -63,11 +63,14 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  01-31-2022     Andres Mlinar            Updated comments,             */
-/*                                             added ARMv8.2-A support,   */
-/*                                             improved SMP code,         */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  01-31-2022      Andres Mlinar           Updated comments,             */
+/*                                            added ARMv8.2-A support,    */
+/*                                            improved SMP code,          */
 /*                                            resulting in version 6.1.10 */
+/*  04-25-2022      William E. Lamie        Modified comments, removed    */
+/*                                            FIFO queueing,              */
+/*                                            resulting in version 6.1.11 */
 /*                                                                        */
 /**************************************************************************/
     .global  _tx_thread_smp_protect
@@ -81,293 +84,49 @@ _tx_thread_smp_protect:
 
     /* Pickup the CPU ID.   */
 
-    MRS     x1, MPIDR_EL1                       // Pickup the core ID
+    MRS     x2, MPIDR_EL1                       // Pickup the core ID
 #ifdef TX_ARMV8_2
 #if TX_THREAD_SMP_CLUSTERS > 1
-    UBFX    x7, x1, #16, #8                     // Isolate cluster ID
+    UBFX    x7, x2, #16, #8                     // Isolate cluster ID
 #endif
-    UBFX    x1, x1, #8, #8                      // Isolate core ID
+    UBFX    x2, x2, #8, #8                      // Isolate core ID
 #else
 #if TX_THREAD_SMP_CLUSTERS > 1
-    UBFX    x7, x1, #8, #8                      // Isolate cluster ID
+    UBFX    x7, x2, #8, #8                      // Isolate cluster ID
 #endif
-    UBFX    x1, x1, #0, #8                      // Isolate core ID
+    UBFX    x2, x2, #0, #8                      // Isolate core ID
 #endif
 #if TX_THREAD_SMP_CLUSTERS > 1
-    ADDS    x1, x1, x7, LSL #2                  // Calculate CPU ID
+    ADDS    x2, x2, x7, LSL #2                  // Calculate CPU ID
 #endif
 
-    /* Do we already have protection?  */
-    // if (this_core == _tx_thread_smp_protection.tx_thread_smp_protect_core)
-    // {
-
-    LDR     x2, =_tx_thread_smp_protection      // Build address to protection structure
-    LDR     w3, [x2, #4]                        // Pickup the owning core
-    CMP     w1, w3                              // Is it not this core?
-    BNE     _protection_not_owned               // No, the protection is not already owned
-
-    /* We already have protection. */
-
-    /* Increment the protection count. */
-    // _tx_thread_smp_protection.tx_thread_smp_protect_count++;
-
-    LDR     w3, [x2, #8]                        // Pickup ownership count
-    ADD     w3, w3, #1                          // Increment ownership count
-    STR     w3, [x2, #8]                        // Store ownership count
-    DMB     ISH
-
-    B       _return
-
-_protection_not_owned:
-
-    /* Is the lock available?  */
-    // if (_tx_thread_smp_protection.tx_thread_smp_protect_in_force == 0)
-    // {
-
-    LDAXR   w3, [x2, #0]                        // Pickup the protection flag
-    CMP     w3, #0
-    BNE     _start_waiting                      // No, protection not available
-
-    /* Is the list empty?  */
-    // if (_tx_thread_smp_protect_wait_list_head == _tx_thread_smp_protect_wait_list_tail)
-    // {
-
-    LDR     x3, =_tx_thread_smp_protect_wait_list_head
-    LDR     w3, [x3]
-    LDR     x4, =_tx_thread_smp_protect_wait_list_tail
-    LDR     w4, [x4]
-    CMP     w3, w4
-    BNE     _list_not_empty
-
-    /* Try to get the lock.  */
-    // if (write_exclusive(&_tx_thread_smp_protection.tx_thread_smp_protect_in_force, 1) == SUCCESS)
-    // {
-
-    MOV     w3, #1                              // Build lock value
-    STXR    w4, w3, [x2, #0]                    // Attempt to get the protection
-    CMP     w4, #0
-    BNE     _start_waiting                      // Did it fail?
-
-    /* We got the lock! */
-    // _tx_thread_smp_protect_lock_got();
-
-    DMB     ISH                                 // Ensure write to protection finishes
-    _tx_thread_smp_protect_lock_got             // Call the lock got function
-
-    B       _return
-
-_list_not_empty:
-
-    /* Are we at the front of the list?  */
-    // if (this_core == _tx_thread_smp_protect_wait_list[_tx_thread_smp_protect_wait_list_head])
-    // {
-
-    LDR     x3, =_tx_thread_smp_protect_wait_list_head // Get the address of the head
-    LDR     w3, [x3]                            // Get the value of the head
-    LDR     x4, =_tx_thread_smp_protect_wait_list // Get the address of the list
-    LDR     w4, [x4, x3, LSL #2]                // Get the value at the head index
-
-    CMP     w1, w4
-    BNE     _start_waiting
-
-    /* Is the lock still available?  */
-    // if (_tx_thread_smp_protection.tx_thread_smp_protect_in_force == 0)
-    // {
-
-    LDAXR   w3, [x2, #0]                        // Pickup the protection flag
-    CMP     w3, #0
-    BNE     _start_waiting                      // No, protection not available
-
-    /* Get the lock.  */
-    // _tx_thread_smp_protection.tx_thread_smp_protect_in_force = 1;
-
-    MOV     w3, #1                              // Build lock value
-    STXR    w4, w3, [x2, #0]                    // Attempt to get the protection
-    CMP     w4, #0
-    BNE     _start_waiting                      // Did it fail?
-    DMB     ISH                                 //
-
-    /* Got the lock.  */
-    // _tx_thread_smp_protect_lock_got();
-
-    _tx_thread_smp_protect_lock_got
-
-    /* Remove this core from the wait list.  */
-    // _tx_thread_smp_protect_remove_from_front_of_list();
-
-    _tx_thread_smp_protect_remove_from_front_of_list
-
-    B       _return
-
-_start_waiting:
-
-    /* For one reason or another, we didn't get the lock.  */
-
-    /* Increment wait count. */
-    // _tx_thread_smp_protect_wait_counts[this_core]++;
-
-    LDR     x3, =_tx_thread_smp_protect_wait_counts // Load wait list counts
-    LDR     w4, [x3, x1, LSL #2]                // Load waiting value for this core
-    ADD     w4, w4, #1                          // Increment wait value
-    STR     w4, [x3, x1, LSL #2]                // Store new wait value
-
-    /* Have we not added ourselves to the list yet? */
-    // if (_tx_thread_smp_protect_wait_counts[this_core] == 1)
-    // {
-
-    CMP     w4, #1
-    BNE     _already_in_list0                   // Is this core already waiting?
-
-    /* Add ourselves to the list.  */
-    // _tx_thread_smp_protect_wait_list_add(this_core);
-
-    _tx_thread_smp_protect_wait_list_add        // Call macro to add ourselves to the list
-
-    // }
-
-_already_in_list0:
-
-    /* Restore interrupts. */
+    LDR     x1, =_tx_thread_smp_protection      // Build address to protection structure
+    LDR     w3, [x1, #4]                        // Pickup the owning core
+    CMP     w3, w2                              // Is it this core?
+    BEQ     _owned                              // Yes, the protection is already owned
 
+    LDAXR   w4, [x1, #0]                        // Pickup the protection flag
+    CBZ     w4, _get_protection                 // Yes, get the protection
     MSR     DAIF, x0                            // Restore interrupts
     ISB                                         //
 #ifdef TX_ENABLE_WFE
     WFE                                         // Go into standby
 #endif
+    B       _tx_thread_smp_protect              // On waking, restart the protection attempt
 
-    /* We do this until we have the lock. */
-    // while (1)
-    // {
-
-_try_to_get_lock:
-
-    /* Disable interrupts so we don't get preempted.  */
-
-    MRS     x0, DAIF                            // Pickup current interrupt posture
-    MSR     DAIFSet, 0x3                        // Lockout interrupts
-
-    /* Pickup the CPU ID.   */
-
-    MRS     x1, MPIDR_EL1                       // Pickup the core ID
-#ifdef TX_ARMV8_2
-#if TX_THREAD_SMP_CLUSTERS > 1
-    UBFX    x7, x1, #16, #8                     // Isolate cluster ID
-#endif
-    UBFX    x1, x1, #8, #8                      // Isolate core ID
-#else
-#if TX_THREAD_SMP_CLUSTERS > 1
-    UBFX    x7, x1, #8, #8                      // Isolate cluster ID
-#endif
-    UBFX    x1, x1, #0, #8                      // Isolate core ID
-#endif
-#if TX_THREAD_SMP_CLUSTERS > 1
-    ADDS    x1, x1, x7, LSL #2                  // Calculate CPU ID
-#endif
-
-    /* Do we already have protection?  */
-    // if (this_core == _tx_thread_smp_protection.tx_thread_smp_protect_core)
-    // {
-
-    LDR     w3, [x2, #4]                        // Pickup the owning core
-    CMP     w3, w1                              // Is it this core?
-    BEQ     _got_lock_after_waiting             // Yes, the protection is already owned. This means
-                                                // an ISR preempted us and got protection
-
-    // }
-
-    /* Are we at the front of the list?  */
-    // if (this_core == _tx_thread_smp_protect_wait_list[_tx_thread_smp_protect_wait_list_head])
-    // {
-
-    LDR     x3, =_tx_thread_smp_protect_wait_list_head // Get the address of the head
-    LDR     w3, [x3]                            // Get the value of the head
-    LDR     x4, =_tx_thread_smp_protect_wait_list // Get the address of the list
-    LDR     w4, [x4, x3, LSL #2]                // Get the value at the head index
-
-    CMP     w1, w4
-    BNE     _did_not_get_lock
-
-    /* Is the lock still available? */
-    // if (_tx_thread_smp_protection.tx_thread_smp_protect_in_force == 0)
-    // {
-
-    LDAXR   w3, [x2, #0]                        // Pickup the protection flag
-    CMP     w3, #0
-    BNE     _did_not_get_lock                   // No, protection not available
-
-    /* Get the lock.  */
-    // _tx_thread_smp_protection.tx_thread_smp_protect_in_force = 1;
-
-    MOV     w3, #1                              // Build lock value
-    STXR    w4, w3, [x2, #0]                    // Attempt to get the protection
-    CMP     w4, #0
-    BNE     _did_not_get_lock                   // Did it fail?
-    DMB     ISH                                 //
-
-    /* Got the lock.  */
-    // _tx_thread_smp_protect_lock_got();
-
-    _tx_thread_smp_protect_lock_got
-
-    /* Remove this core from the wait list.  */
-    // _tx_thread_smp_protect_remove_from_front_of_list();
-
-    _tx_thread_smp_protect_remove_from_front_of_list
-
-    B       _got_lock_after_waiting
-
-_did_not_get_lock:
-
-    /* For one reason or another, we didn't get the lock.  */
-
-    /* Were we removed from the list? This can happen if we're a thread
-       and we got preempted. */
-    // if (_tx_thread_smp_protect_wait_counts[this_core] == 0)
-    // {
-
-    LDR     x3, =_tx_thread_smp_protect_wait_counts // Load wait list counts
-    LDR     w4, [x3, x1, LSL #2]                // Load waiting value for this core
-    CMP     w4, #0
-    BNE     _already_in_list1                   // Is this core already in the list?
-
-    /* Add ourselves to the list.  */
-    // _tx_thread_smp_protect_wait_list_add(this_core);
-
-    _tx_thread_smp_protect_wait_list_add        // Call macro to add ourselves to the list
-
-    /* Our waiting count was also reset when we were preempted. Increment it again. */
-    // _tx_thread_smp_protect_wait_counts[this_core]++;
-
-    LDR     x3, =_tx_thread_smp_protect_wait_counts // Load wait list counts
-    LDR     w4, [x3, x1, LSL #2]                // Load waiting value for this core
-    ADD     w4, w4, #1                          // Increment wait value
-    STR     w4, [x3, x1, LSL #2]                // Store new wait value value
-
-    // }
-
-_already_in_list1:
-
-    /* Restore interrupts and try again.  */
-
+_get_protection:
+    MOV     x4, #1                              // Build lock value
+    STXR    w5, w4, [x1]                        // Attempt to get the protection
+    CBZ     w5, _got_protection                 // Did it succeed?  w5 = 0 means success!
     MSR     DAIF, x0                            // Restore interrupts
-    ISB                                         //
-#ifdef TX_ENABLE_WFE
-    WFE                                         // Go into standby
-#endif
-    B       _try_to_get_lock                    // On waking, restart the protection attempt
-
-_got_lock_after_waiting:
-
-    /* We're no longer waiting.  */
-    // _tx_thread_smp_protect_wait_counts[this_core]--;
-
-    LDR     x3, =_tx_thread_smp_protect_wait_counts // Load waiting list
-    LDR     w4, [x3, x1, LSL #2]                // Load current wait value
-    SUB     w4, w4, #1                          // Decrement wait value
-    STR     w4, [x3, x1, LSL #2]                // Store new wait value value
-
-    /* Restore registers and return.  */
-
-_return:
-
+    B       _tx_thread_smp_protect              // Restart the protection attempt
+    
+_got_protection:
+    DMB     ISH                                 // 
+    STR     w2, [x1, #4]                        // Save owning core
+_owned:
+    LDR     w5, [x1, #8]                        // Pickup ownership count
+    ADD     w5, w5, #1                          // Increment ownership count
+    STR     w5, [x1, #8]                        // Store ownership count
+    DMB     ISH                                 //
     RET
diff --git a/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_unprotect.S b/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_unprotect.S
index a783cde6..f9d8692a 100644
--- a/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_unprotect.S
+++ b/ports_smp/cortex_a55_smp/gnu/src/tx_thread_smp_unprotect.S
@@ -60,10 +60,13 @@
 /*                                                                        */
 /*    DATE              NAME                      DESCRIPTION             */
 /*                                                                        */
-/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
-/*  01-31-2022     Andres Mlinar            Updated comments,             */
-/*                                             added ARMv8.2-A support,   */
+/*  09-30-2020      William E. Lamie        Initial Version 6.1           */
+/*  01-31-2022      Andres Mlinar           Updated comments,             */
+/*                                            added ARMv8.2-A support,    */
 /*                                            resulting in version 6.1.10 */
+/*  04-25-2022      William E. Lamie        Modified comments, removed    */
+/*                                            FIFO queueing,              */
+/*                                            resulting in version 6.1.11 */
 /*                                                                        */
 /**************************************************************************/
     .global  _tx_thread_smp_unprotect
@@ -105,11 +108,6 @@ _tx_thread_smp_unprotect:
     CMP     w3, #0                              // Is the preempt disable flag set?
     BNE     _still_protected                    // Yes, skip the protection release
 
-    LDR     x2,=_tx_thread_smp_protect_wait_counts // Build build address of wait counts
-    LDR     w3, [x2, x1, LSL #2]                // Pickup wait list value
-    CMP     w3, #0                              // Are any entities on this core waiting?
-    BNE     _still_protected                    // Yes, skip the protection release
-
     LDR     x2,=_tx_thread_smp_protection       // Build address of protection structure
     MOV     w3, #0xFFFFFFFF                     // Build invalid value
     STR     w3, [x2, #4]                        // Mark the protected core as invalid