diff options
Diffstat (limited to 'ports/cortex_m0/iar/example_build')
| -rw-r--r-- | ports/cortex_m0/iar/example_build/tx.ewp | 2 | ||||
| -rw-r--r-- | ports/cortex_m0/iar/example_build/tx_initialize_low_level.s | 19 |
2 files changed, 3 insertions, 18 deletions
diff --git a/ports/cortex_m0/iar/example_build/tx.ewp b/ports/cortex_m0/iar/example_build/tx.ewp index 94481d2e..a3b29c58 100644 --- a/ports/cortex_m0/iar/example_build/tx.ewp +++ b/ports/cortex_m0/iar/example_build/tx.ewp @@ -1047,7 +1047,7 @@ </option> <option> <name>IarchiveOutput</name> - <state>C:\Users\nisohack\Documents\work\x-ware_libs\threadx\ports\cortex_m0\iar\Debug\Exe\tx.a</state> + <state>###Unitialized###</state> </option> </data> </settings> diff --git a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s index 991f7809..9f83fa06 100644 --- a/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s +++ b/ports/cortex_m0/iar/example_build/tx_initialize_low_level.s @@ -1,5 +1,6 @@ ;/*************************************************************************** ; * Copyright (c) 2024 Microsoft Corporation +; * Copyright (c) 2026-present Eclipse ThreadX contributors ; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at @@ -7,6 +8,7 @@ ; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ +; Portions of this file were generated with AI assistance. ; ; ;/**************************************************************************/ @@ -20,10 +22,8 @@ ;/**************************************************************************/ ; ; - EXTERN _tx_thread_system_stack_ptr EXTERN _tx_initialize_unused_memory EXTERN _tx_timer_interrupt - EXTERN __vector_table EXTERN _tx_execution_isr_enter EXTERN _tx_execution_isr_exit ; @@ -100,21 +100,6 @@ _tx_initialize_low_level: ; ORRS r1, r1, r2 ; Set the CYCCNTENA bit ; STR r1, [r0] ; Enable the cycle count register ; -; /* Setup Vector Table Offset Register. */ -; - LDR r0, =0xE000E000 ; Build address of NVIC registers - LDR r2, =0xD08 ; Offset to vector base register - ADD r0, r0, r2 ; Build vector base register - LDR r1, =__vector_table ; Pickup address of vector table - STR r1, [r0] ; Set vector table address -; -; /* Set system stack pointer from vector value. */ -; - LDR r0, =_tx_thread_system_stack_ptr ; Build address of system stack pointer - LDR r1, =__vector_table ; Pickup address of vector table - LDR r1, [r1] ; Pickup reset stack pointer - STR r1, [r0] ; Save system stack pointer -; ; /* Configure SysTick. */ ; LDR r0, =0xE000E000 ; Build address of NVIC registers |