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-rw-r--r--ports/cortex_m0/gnu/example_build/build_threadx.bat5
-rw-r--r--ports/cortex_m0/gnu/example_build/build_threadx_sample.bat6
-rw-r--r--ports/cortex_m0/gnu/example_build/cortexm0_crt0.S (renamed from ports/cortex_m0/gnu/example_build/cortexm0_crt0.s)8
-rw-r--r--ports/cortex_m0/gnu/example_build/cortexm0_vectors.S (renamed from ports/cortex_m0/gnu/example_build/tx_vectors.s)33
-rw-r--r--ports/cortex_m0/gnu/example_build/sample_threadx.ld267
-rw-r--r--ports/cortex_m0/iar/CMakeLists.txt21
-rw-r--r--ports/cortex_m0/keil/example_build/sample_threadx.uvoptx281
-rw-r--r--ports/cortex_m0/keil/example_build/sample_threadx.uvprojx433
-rw-r--r--ports/cortex_m0/keil/example_build/tx.uvoptx2672
-rw-r--r--ports/cortex_m0/keil/example_build/tx.uvprojx1453
10 files changed, 122 insertions, 5057 deletions
diff --git a/ports/cortex_m0/gnu/example_build/build_threadx.bat b/ports/cortex_m0/gnu/example_build/build_threadx.bat
index c74b194e..dbcac3a5 100644
--- a/ports/cortex_m0/gnu/example_build/build_threadx.bat
+++ b/ports/cortex_m0/gnu/example_build/build_threadx.bat
@@ -1,5 +1,4 @@
del tx.a
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_stack_build.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_schedule.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_system_return.S
@@ -7,7 +6,7 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_save.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_context_restore.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_timer_interrupt.S
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb ../src/tx_thread_interrupt_control.S
+
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c
@@ -192,8 +191,8 @@ arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../in
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c
+
arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o
-arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o
arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o
arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o
arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o
diff --git a/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat b/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat
index 96c754d5..e0c7b374 100644
--- a/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat
+++ b/ports/cortex_m0/gnu/example_build/build_threadx_sample.bat
@@ -1,7 +1,5 @@
-arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_vectors.S
+arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_vectors.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb cortexm0_crt0.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb tx_initialize_low_level.S
arm-none-eabi-gcc -c -g -mcpu=cortex-m0 -mthumb -I../../../../common/inc -I../inc sample_threadx.c
-arm-none-eabi-ld -A cortex-m0 -ereset_handler -T sample_threadx.ld tx_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libgcc.a -o sample_threadx.out -M > sample_threadx.map
-
-
+arm-none-eabi-gcc -g -mcpu=cortex-m0 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm0_vectors.o cortexm0_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a
diff --git a/ports/cortex_m0/gnu/example_build/cortexm0_crt0.s b/ports/cortex_m0/gnu/example_build/cortexm0_crt0.S
index d4cb1636..bb530ac5 100644
--- a/ports/cortex_m0/gnu/example_build/cortexm0_crt0.s
+++ b/ports/cortex_m0/gnu/example_build/cortexm0_crt0.S
@@ -13,7 +13,6 @@ _start:
ldr r1, =__stack_end__
mov sp, r1
-
/* Copy initialised sections into RAM if required. */
ldr r0, =__data_load_start__
ldr r1, =__data_start__
@@ -47,7 +46,6 @@ _start:
mov r2, #0
bl crt0_memory_set
-
/* Setup heap - not recommended for Threadx but here for compatibility reasons */
ldr r0, = __heap_start__
ldr r1, = __heap_end__
@@ -57,7 +55,6 @@ _start:
add r0, r0, #4
str r1, [r0]
-
/* constructors in case of using C++ */
ldr r0, =__ctors_start__
ldr r1, =__ctors_end__
@@ -72,13 +69,11 @@ crt0_ctor_loop:
b crt0_ctor_loop
crt0_ctor_end:
-
/* Setup call frame for main() */
mov r0, #0
mov lr, r0
mov r12, sp
-
start:
/* Jump to main() */
mov r0, #0
@@ -93,7 +88,6 @@ crt0_exit_loop:
/* Startup helper functions. */
-
crt0_memory_copy:
cmp r0, r1
beq memory_copy_done
@@ -109,7 +103,6 @@ memory_copy_loop:
memory_copy_done:
bx lr
-
crt0_memory_set:
cmp r0, r1
beq memory_set_done
@@ -119,7 +112,6 @@ crt0_memory_set:
memory_set_done:
bx lr
-
/* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
.section .stack, "wa", %nobits
.section .stack_process, "wa", %nobits
diff --git a/ports/cortex_m0/gnu/example_build/tx_vectors.s b/ports/cortex_m0/gnu/example_build/cortexm0_vectors.S
index 55395cd1..6ae558e4 100644
--- a/ports/cortex_m0/gnu/example_build/tx_vectors.s
+++ b/ports/cortex_m0/gnu/example_build/cortexm0_vectors.S
@@ -1,5 +1,3 @@
-
-
.global reset_handler
.global __tx_NMIHandler
@@ -9,8 +7,6 @@
.global __tx_PendSVHandler
.global __tx_SysTickHandler
.global __tx_BadHandler
- .global __tx_HardfaultHandler
-
.syntax unified
.section .vectors, "ax"
@@ -30,7 +26,7 @@ _vectors:
.word 0 // Reserved
.word 0 // Reserved
.word 0 // Reserved
- .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
+ .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler //
.word __tx_DBGHandler
.word 0 // Reserved
.word __tx_PendSVHandler
@@ -71,32 +67,11 @@ _vectors:
.word __tx_BadHandler
.word __tx_BadHandler
-
-
- .section .init, "ax"
- .thumb_func
+ .section .init, "ax"
+ .thumb_func
reset_handler:
-
-// low level hardware config, such as PLL setup goes here
-
+ // low level hardware config, such as PLL setup goes here
b _start
- .text 32
- .align 4
- .syntax unified
-
-
-__tx_NMIHandler:
- b __tx_NMIHandler
-
-__tx_BadHandler:
- b __tx_BadHandler
-
-__tx_DBGHandler:
- b __tx_DBGHandler
-
-__tx_HardfaultHandler:
- b __tx_HardfaultHandler
-
diff --git a/ports/cortex_m0/gnu/example_build/sample_threadx.ld b/ports/cortex_m0/gnu/example_build/sample_threadx.ld
index 28f203fd..c65a1346 100644
--- a/ports/cortex_m0/gnu/example_build/sample_threadx.ld
+++ b/ports/cortex_m0/gnu/example_build/sample_threadx.ld
@@ -1,206 +1,125 @@
MEMORY
{
- UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0
- CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000
- AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000
- APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000
- APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000
- GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000
- AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000
- AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000
- RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000
- FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000
+ RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000
}
+__STACKSIZE__ = 1024;
+__STACKSIZE_PROCESS__ = 0;
+__HEAPSIZE__ = 128;
SECTIONS
{
- __CM3_System_Control_Space_segment_start__ = 0xe000e000;
- __CM3_System_Control_Space_segment_end__ = 0xe000f000;
- __AHB_Peripherals_segment_start__ = 0x50000000;
- __AHB_Peripherals_segment_end__ = 0x50200000;
- __APB1_Peripherals_segment_start__ = 0x40080000;
- __APB1_Peripherals_segment_end__ = 0x40100000;
- __APB0_Peripherals_segment_start__ = 0x40000000;
- __APB0_Peripherals_segment_end__ = 0x40080000;
- __GPIO_segment_start__ = 0x2009c000;
- __GPIO_segment_end__ = 0x200a0000;
- __AHBSRAM1_segment_start__ = 0x20080000;
- __AHBSRAM1_segment_end__ = 0x20084000;
- __AHBSRAM0_segment_start__ = 0x2007c000;
- __AHBSRAM0_segment_end__ = 0x20080000;
- __RAM_segment_start__ = 0x10000000;
- __RAM_segment_end__ = 0x10008000;
- __FLASH_segment_start__ = 0x00000000;
- __FLASH_segment_end__ = 0x00080000;
-
- __STACKSIZE__ = 1024;
- __STACKSIZE_PROCESS__ = 0;
- __STACKSIZE_IRQ__ = 0;
- __STACKSIZE_FIQ__ = 0;
- __STACKSIZE_SVC__ = 0;
- __STACKSIZE_ABT__ = 0;
- __STACKSIZE_UND__ = 0;
- __HEAPSIZE__ = 128;
-
- __vectors_load_start__ = __FLASH_segment_start__;
- .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__)
- {
- __vectors_start__ = .;
- *(.vectors .vectors.*)
- }
- __vectors_end__ = __vectors_start__ + SIZEOF(.vectors);
-
- . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment");
-
- __init_load_start__ = ALIGN(__vectors_end__ , 4);
- .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4))
- {
- __init_start__ = .;
- *(.init .init.*)
- }
- __init_end__ = __init_start__ + SIZEOF(.init);
-
- . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment");
-
- __text_load_start__ = ALIGN(__init_end__ , 4);
- .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4))
+ .vectors :
{
- __text_start__ = .;
- *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
- }
- __text_end__ = __text_start__ + SIZEOF(.text);
-
- . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment");
-
- __dtors_load_start__ = ALIGN(__text_end__ , 4);
- .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4))
- {
- __dtors_start__ = .;
- KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors))
- }
- __dtors_end__ = __dtors_start__ + SIZEOF(.dtors);
-
- . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment");
-
- __ctors_load_start__ = ALIGN(__dtors_end__ , 4);
- .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4))
- {
- __ctors_start__ = .;
- KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors))
- }
- __ctors_end__ = __ctors_start__ + SIZEOF(.ctors);
-
- . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment");
+ KEEP(*(.vectors .vectors.*))
+ } > FLASH
- __rodata_load_start__ = ALIGN(__ctors_end__ , 4);
- .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4))
- {
- __rodata_start__ = .;
- *(.rodata .rodata.* .gnu.linkonce.r.*)
- }
- __rodata_end__ = __rodata_start__ + SIZEOF(.rodata);
+ .text :
+ {
+ *(.text*)
- . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment");
+ KEEP(*(.init))
+ KEEP(*(.fini))
- __fast_load_start__ = ALIGN(__rodata_end__ , 4);
- .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4))
- {
- __fast_start__ = .;
- *(.fast .fast.*)
- }
- __fast_end__ = __fast_start__ + SIZEOF(.fast);
+ /* .ctors */
+ *crtbegin.o(.ctors)
+ *crtbegin?.o(.ctors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+ __ctors_start__ = ALIGN(4);
+ *(SORT(.ctors.*))
+ *(.ctors)
+ __ctors_end__ = ALIGN(4);
- __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast);
+ /* .dtors */
+ *crtbegin.o(.dtors)
+ *crtbegin?.o(.dtors)
+ *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ __dtors_start__ = ALIGN(4);
+ *(SORT(.dtors.*))
+ *(.dtors)
+ __dtors_end__ = ALIGN(4);
- . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment");
+ *(.rodata*)
- .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) :
- {
- __fast_run_start__ = .;
- . = MAX(__fast_run_start__ + SIZEOF(.fast), .);
- }
- __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run);
+ KEEP(*(.eh_frame*))
+ } > FLASH
- . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment");
+ .ARM.extab :
+ {
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ } > FLASH
- __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4);
- .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4))
- {
- __data_start__ = .;
- *(.data .data.* .gnu.linkonce.d.*)
- }
- __data_end__ = __data_start__ + SIZEOF(.data);
+ __exidx_start = .;
+ .ARM.exidx :
+ {
+ *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+ } > FLASH
+ __exidx_end = .;
- __data_load_end__ = __data_load_start__ + SIZEOF(.data);
+ __data_load_start__ = ALIGN (4);
- __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data);
+ .data : AT (__data_load_start__)
+ {
+ __data_start__ = .;
- . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment");
+ *(vtable)
+ *(.data*)
- .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) :
- {
- __data_run_start__ = .;
- . = MAX(__data_run_start__ + SIZEOF(.data), .);
- }
- __data_run_end__ = __data_run_start__ + SIZEOF(.data_run);
+ . = ALIGN(4);
+ /* preinit data */
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP(*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
- . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment");
+ . = ALIGN(4);
+ /* init data */
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array))
+ PROVIDE_HIDDEN (__init_array_end = .);
- __bss_load_start__ = ALIGN(__data_run_end__ , 4);
- .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4))
- {
- __bss_start__ = .;
- *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON)
- }
- __bss_end__ = __bss_start__ + SIZEOF(.bss);
+ . = ALIGN(4);
+ /* finit data */
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array))
+ PROVIDE_HIDDEN (__fini_array_end = .);
- . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment");
+ KEEP(*(.jcr*))
+ . = ALIGN(4);
+ /* All data end */
+
+ __data_end__ = .;
- __non_init_load_start__ = ALIGN(__bss_end__ , 4);
- .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4))
- {
- __non_init_start__ = .;
- *(.non_init .non_init.*)
- }
- __non_init_end__ = __non_init_start__ + SIZEOF(.non_init);
+ } > RAM
- . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment");
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start__ = .;
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ __bss_end__ = .;
- __heap_load_start__ = ALIGN(__non_init_end__ , 4);
- .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4))
- {
- __heap_start__ = .;
+ } > RAM
+
+ .heap (COPY):
+ {
+ __heap_start__ = ALIGN(4);
*(.heap)
- . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4);
- }
- __heap_end__ = __heap_start__ + SIZEOF(.heap);
+ . = ALIGN(. + __HEAPSIZE__, 4);
+ __heap_end__ = ALIGN(4);
+ } > RAM
- . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment");
-
- __stack_load_start__ = ALIGN(__heap_end__ , 4);
- .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4))
+ .stack ALIGN(4) (NOLOAD) :
{
- __stack_start__ = .;
+ __stack_start__ = ALIGN(4);
*(.stack)
- . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4);
- }
- __stack_end__ = __stack_start__ + SIZEOF(.stack);
-
- . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment");
-
- __stack_process_load_start__ = ALIGN(__stack_end__ , 4);
- .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4))
- {
- __stack_process_start__ = .;
- *(.stack_process)
- . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4);
- }
- __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process);
-
- __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process);
-
- . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment");
+ . = ALIGN(. + __STACKSIZE__, 4);
+ __stack_end__ = ALIGN(4);
+ } > RAM
+ __RAM_segment_used_end__ = .;
}
-
diff --git a/ports/cortex_m0/iar/CMakeLists.txt b/ports/cortex_m0/iar/CMakeLists.txt
new file mode 100644
index 00000000..a524d79f
--- /dev/null
+++ b/ports/cortex_m0/iar/CMakeLists.txt
@@ -0,0 +1,21 @@
+
+target_sources(${PROJECT_NAME}
+ PRIVATE
+ # {{BEGIN_TARGET_SOURCES}}
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_iar.c
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S
+ ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S
+ # {{END_TARGET_SOURCES}}
+)
+
+target_include_directories(${PROJECT_NAME}
+ PUBLIC
+ ${CMAKE_CURRENT_LIST_DIR}/inc
+)
diff --git a/ports/cortex_m0/keil/example_build/sample_threadx.uvoptx b/ports/cortex_m0/keil/example_build/sample_threadx.uvoptx
deleted file mode 100644
index 6ff0dbc9..00000000
--- a/ports/cortex_m0/keil/example_build/sample_threadx.uvoptx
+++ /dev/null
@@ -1,281 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
-
- <SchemaVersion>1.0</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Extensions>
- <cExt>*.c</cExt>
- <aExt>*.s*; *.src; *.a*</aExt>
- <oExt>*.obj; *.o</oExt>
- <lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
- <pExt>*.plm</pExt>
- <CppX>*.cpp</CppX>
- <nMigrate>0</nMigrate>
- </Extensions>
-
- <DaveTm>
- <dwLowDateTime>0</dwLowDateTime>
- <dwHighDateTime>0</dwHighDateTime>
- </DaveTm>
-
- <Target>
- <TargetName>sample_threadx</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <TargetOption>
- <CLKADS>12000000</CLKADS>
- <OPTTT>
- <gFlags>1</gFlags>
- <BeepAtEnd>1</BeepAtEnd>
- <RunSim>0</RunSim>
- <RunTarget>1</RunTarget>
- <RunAbUc>0</RunAbUc>
- </OPTTT>
- <OPTHX>
- <HexSelection>1</HexSelection>
- <FlashByte>65535</FlashByte>
- <HexRangeLowAddress>0</HexRangeLowAddress>
- <HexRangeHighAddress>0</HexRangeHighAddress>
- <HexOffset>0</HexOffset>
- </OPTHX>
- <OPTLEX>
- <PageWidth>79</PageWidth>
- <PageLength>66</PageLength>
- <TabStop>8</TabStop>
- <ListingPath>.\Listings\</ListingPath>
- </OPTLEX>
- <ListingPage>
- <CreateCListing>1</CreateCListing>
- <CreateAListing>1</CreateAListing>
- <CreateLListing>1</CreateLListing>
- <CreateIListing>0</CreateIListing>
- <AsmCond>1</AsmCond>
- <AsmSymb>1</AsmSymb>
- <AsmXref>0</AsmXref>
- <CCond>1</CCond>
- <CCode>0</CCode>
- <CListInc>0</CListInc>
- <CSymb>0</CSymb>
- <LinkerCodeListing>0</LinkerCodeListing>
- </ListingPage>
- <OPTXL>
- <LMap>1</LMap>
- <LComments>1</LComments>
- <LGenerateSymbols>1</LGenerateSymbols>
- <LLibSym>1</LLibSym>
- <LLines>1</LLines>
- <LLocSym>1</LLocSym>
- <LPubSym>1</LPubSym>
- <LXref>0</LXref>
- <LExpSel>0</LExpSel>
- </OPTXL>
- <OPTFL>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <IsCurrentTarget>1</IsCurrentTarget>
- </OPTFL>
- <CpuCode>7</CpuCode>
- <DebugOpt>
- <uSim>1</uSim>
- <uTrg>0</uTrg>
- <sLdApp>1</sLdApp>
- <sGomain>1</sGomain>
- <sRbreak>1</sRbreak>
- <sRwatch>1</sRwatch>
- <sRmem>1</sRmem>
- <sRfunc>1</sRfunc>
- <sRbox>1</sRbox>
- <tLdApp>1</tLdApp>
- <tGomain>1</tGomain>
- <tRbreak>1</tRbreak>
- <tRwatch>1</tRwatch>
- <tRmem>1</tRmem>
- <tRfunc>0</tRfunc>
- <tRbox>1</tRbox>
- <tRtrace>1</tRtrace>
- <sRSysVw>1</sRSysVw>
- <tRSysVw>1</tRSysVw>
- <sRunDeb>0</sRunDeb>
- <sLrtime>0</sLrtime>
- <bEvRecOn>1</bEvRecOn>
- <bSchkAxf>0</bSchkAxf>
- <bTchkAxf>0</bTchkAxf>
- <nTsel>5</nTsel>
- <sDll></sDll>
- <sDllPa></sDllPa>
- <sDlgDll></sDlgDll>
- <sDlgPa></sDlgPa>
- <sIfile></sIfile>
- <tDll></tDll>
- <tDllPa></tDllPa>
- <tDlgDll></tDlgDll>
- <tDlgPa></tDlgPa>
- <tIfile></tIfile>
- <pMon>BIN\DbgFM.DLL</pMon>
- </DebugOpt>
- <TargetDriverDllRegistry>
- <SetRegEntry>
- <Number>0</Number>
- <Key>ARMRTXEVENTFLAGS</Key>
- <Name>-L70 -Z18 -C0 -M0 -T1</Name>
- </SetRegEntry>
- <SetRegEntry>
- <Number>0</Number>
- <Key>DLGDARM</Key>
- <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)</Name>
- </SetRegEntry>
- <SetRegEntry>
- <Number>0</Number>
- <Key>ARMDBGFLAGS</Key>
- <Name>-T0</Name>
- </SetRegEntry>
- <SetRegEntry>
- <Number>0</Number>
- <Key>UL2CM3</Key>
- <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</Name>
- </SetRegEntry>
- </TargetDriverDllRegistry>
- <Breakpoint/>
- <WatchWindow1>
- <Ww>
- <count>0</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_0_counter</ItemText>
- </Ww>
- <Ww>
- <count>1</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_1_counter</ItemText>
- </Ww>
- <Ww>
- <count>2</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_2_counter</ItemText>
- </Ww>
- <Ww>
- <count>3</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_3_counter</ItemText>
- </Ww>
- <Ww>
- <count>4</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_4_counter</ItemText>
- </Ww>
- <Ww>
- <count>5</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_5_counter</ItemText>
- </Ww>
- <Ww>
- <count>6</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_6_counter</ItemText>
- </Ww>
- <Ww>
- <count>7</count>
- <WinNumber>1</WinNumber>
- <ItemText>thread_7_counter</ItemText>
- </Ww>
- </WatchWindow1>
- <Tracepoint>
- <THDelay>0</THDelay>
- </Tracepoint>
- <DebugFlag>
- <trace>0</trace>
- <periodic>1</periodic>
- <aLwin>1</aLwin>
- <aCover>0</aCover>
- <aSer1>0</aSer1>
- <aSer2>0</aSer2>
- <aPa>0</aPa>
- <viewmode>1</viewmode>
- <vrSel>0</vrSel>
- <aSym>0</aSym>
- <aTbox>0</aTbox>
- <AscS1>0</AscS1>
- <AscS2>0</AscS2>
- <AscS3>0</AscS3>
- <aSer3>0</aSer3>
- <eProf>0</eProf>
- <aLa>0</aLa>
- <aPa1>0</aPa1>
- <AscS4>0</AscS4>
- <aSer4>0</aSer4>
- <StkLoc>0</StkLoc>
- <TrcWin>0</TrcWin>
- <newCpu>0</newCpu>
- <uProt>0</uProt>
- </DebugFlag>
- <LintExecutable></LintExecutable>
- <LintConfigFile></LintConfigFile>
- <bLintAuto>0</bLintAuto>
- <bAutoGenD>0</bAutoGenD>
- <LntExFlags>0</LntExFlags>
- <pMisraName></pMisraName>
- <pszMrule></pszMrule>
- <pSingCmds></pSingCmds>
- <pMultCmds></pMultCmds>
- <pMisraNamep></pMisraNamep>
- <pszMrulep></pszMrulep>
- <pSingCmdsp></pSingCmdsp>
- <pMultCmdsp></pMultCmdsp>
- </TargetOption>
- </Target>
-
- <Group>
- <GroupName>src</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
- <File>
- <GroupNumber>1</GroupNumber>
- <FileNumber>1</FileNumber>
- <FileType>1</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>.\sample_threadx.c</PathWithFileName>
- <FilenameWithoutPath>sample_threadx.c</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- <File>
- <GroupNumber>1</GroupNumber>
- <FileNumber>2</FileNumber>
- <FileType>2</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>.\tx_initialize_low_level.s</PathWithFileName>
- <FilenameWithoutPath>tx_initialize_low_level.s</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- </Group>
-
- <Group>
- <GroupName>lib</GroupName>
- <tvExp>1</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <cbSel>0</cbSel>
- <RteFlg>0</RteFlg>
- <File>
- <GroupNumber>2</GroupNumber>
- <FileNumber>3</FileNumber>
- <FileType>4</FileType>
- <tvExp>0</tvExp>
- <tvExpOptDlg>0</tvExpOptDlg>
- <bDave2>0</bDave2>
- <PathWithFileName>.\Objects\tx.lib</PathWithFileName>
- <FilenameWithoutPath>tx.lib</FilenameWithoutPath>
- <RteFlg>0</RteFlg>
- <bShared>0</bShared>
- </File>
- </Group>
-
-</ProjectOpt>
diff --git a/ports/cortex_m0/keil/example_build/sample_threadx.uvprojx b/ports/cortex_m0/keil/example_build/sample_threadx.uvprojx
deleted file mode 100644
index a0e27af8..00000000
--- a/ports/cortex_m0/keil/example_build/sample_threadx.uvprojx
+++ /dev/null
@@ -1,433 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
-
- <SchemaVersion>2.1</SchemaVersion>
-
- <Header>### uVision Project, (C) Keil Software</Header>
-
- <Targets>
- <Target>
- <TargetName>sample_threadx</TargetName>
- <ToolsetNumber>0x4</ToolsetNumber>
- <ToolsetName>ARM-ADS</ToolsetName>
- <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
- <uAC6>0</uAC6>
- <TargetOption>
- <TargetCommonOption>
- <Device>ARMCM0</Device>
- <Vendor>ARM</Vendor>
- <PackID>ARM.CMSIS.5.7.0</PackID>
- <PackURL>http://www.keil.com/pack/</PackURL>
- <Cpu>IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE</Cpu>
- <FlashUtilSpec></FlashUtilSpec>
- <StartupFile></StartupFile>
- <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000)</FlashDriverDll>
- <DeviceId>0</DeviceId>
- <RegisterFile>$$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h</RegisterFile>
- <MemoryEnv></MemoryEnv>
- <Cmp></Cmp>
- <Asm></Asm>
- <Linker></Linker>
- <OHString></OHString>
- <InfinionOptionDll></InfinionOptionDll>
- <SLE66CMisc></SLE66CMisc>
- <SLE66AMisc></SLE66AMisc>
- <SLE66LinkerMisc></SLE66LinkerMisc>
- <SFDFile></SFDFile>
- <bCustSvd>0</bCustSvd>
- <UseEnv>0</UseEnv>
- <BinPath></BinPath>
- <IncludePath></IncludePath>
- <LibPath></LibPath>
- <RegisterFilePath></RegisterFilePath>
- <DBRegisterFilePath></DBRegisterFilePath>
- <TargetStatus>
- <Error>0</Error>
- <ExitCodeStop>0</ExitCodeStop>
- <ButtonStop>0</ButtonStop>
- <NotGenerated>0</NotGenerated>
- <InvalidFlash>1</InvalidFlash>
- </TargetStatus>
- <OutputDirectory>.\Objects\</OutputDirectory>
- <OutputName>sample_threadx</OutputName>
- <CreateExecutable>1</CreateExecutable>
- <CreateLib>0</CreateLib>
- <CreateHexFile>0</CreateHexFile>
- <DebugInformation>1</DebugInformation>
- <BrowseInformation>1</BrowseInformation>
- <ListingPath>.\Listings\</ListingPath>
- <HexFormatSelection>1</HexFormatSelection>
- <Merge32K>0</Merge32K>
- <CreateBatchFile>0</CreateBatchFile>
- <BeforeCompile>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- <nStopU1X>0</nStopU1X>
- <nStopU2X>0</nStopU2X>
- </BeforeCompile>
- <BeforeMake>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- <nStopB1X>0</nStopB1X>
- <nStopB2X>0</nStopB2X>
- </BeforeMake>
- <AfterMake>
- <RunUserProg1>0</RunUserProg1>
- <RunUserProg2>0</RunUserProg2>
- <UserProg1Name></UserProg1Name>
- <UserProg2Name></UserProg2Name>
- <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
- <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
- <nStopA1X>0</nStopA1X>
- <nStopA2X>0</nStopA2X>
- </AfterMake>
- <SelectedForBatchBuild>0</SelectedForBatchBuild>
- <SVCSIdString></SVCSIdString>
- </TargetCommonOption>
- <CommonProperty>
- <UseCPPCompiler>0</UseCPPCompiler>
- <RVCTCodeConst>0</RVCTCodeConst>
- <RVCTZI>0</RVCTZI>
- <RVCTOtherData>0</RVCTOtherData>
- <ModuleSelection>0</ModuleSelection>
- <IncludeInBuild>1</IncludeInBuild>
- <AlwaysBuild>0</AlwaysBuild>
- <GenerateAssemblyFile>0</GenerateAssemblyFile>
- <AssembleAssemblyFile>0</AssembleAssemblyFile>
- <PublicsOnly>0</PublicsOnly>
- <StopOnExitCode>3</StopOnExitCode>
- <CustomArgument></CustomArgument>
- <IncludeLibraryModules></IncludeLibraryModules>
- <ComprImg>1</ComprImg>
- </CommonProperty>
- <DllOption>
- <SimDllName>SARMCM3.DLL</SimDllName>
- <SimDllArguments> </SimDllArguments>
- <SimDlgDll>DARMCM1.DLL</SimDlgDll>
- <SimDlgDllArguments>-pCM0</SimDlgDllArguments>
- <TargetDllName>SARMCM3.DLL</TargetDllName>
- <TargetDllArguments> </TargetDllArguments>
- <TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
- <TargetDlgDllArguments>-pCM0</TargetDlgDllArguments>
- </DllOption>
- <DebugOption>
- <OPTHX>
- <HexSelection>1</HexSelection>
- <HexRangeLowAddress>0</HexRangeLowAddress>
- <HexRangeHighAddress>0</HexRangeHighAddress>
- <HexOffset>0</HexOffset>
- <Oh166RecLen>16</Oh166RecLen>
- </OPTHX>
- </DebugOption>
- <Utilities>
- <Flash1>
- <UseTargetDll>1</UseTargetDll>
- <UseExternalTool>0</UseExternalTool>
- <RunIndependent>0</RunIndependent>
- <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
- <Capability>0</Capability>
- <DriverSelection>-1</DriverSelection>
- </Flash1>
- <bUseTDR>1</bUseTDR>
- <Flash2>BIN\UL2CM3.DLL</Flash2>
- <Flash3></Flash3>
- <Flash4></Flash4>
- <pFcarmOut></pFcarmOut>
- <pFcarmGrp></pFcarmGrp>
- <pFcArmRoot></pFcArmRoot>
- <FcArmLst>0</FcArmLst>
- </Utilities>
- <TargetArmAds>
- <ArmAdsMisc>
- <GenerateListings>0</GenerateListings>
- <asHll>1</asHll>
- <asAsm>1</asAsm>
- <asMacX>1</asMacX>
- <asSyms>1</asSyms>
- <asFals>1</asFals>
- <asDbgD>1</asDbgD>
- <asForm>1</asForm>
- <ldLst>0</ldLst>
- <ldmm>1</ldmm>
- <ldXref>1</ldXref>
- <BigEnd>0</BigEnd>
- <AdsALst>1</AdsALst>
- <AdsACrf>1</AdsACrf>
- <AdsANop>0</AdsANop>
- <AdsANot>0</AdsANot>
- <AdsLLst>1</AdsLLst>
- <AdsLmap>1</AdsLmap>
- <AdsLcgr>1</AdsLcgr>
- <AdsLsym>1</AdsLsym>
- <AdsLszi>1</AdsLszi>
- <AdsLtoi>1</AdsLtoi>
- <AdsLsun>1</AdsLsun>
- <AdsLven>1</AdsLven>
- <AdsLsxf>1</AdsLsxf>
- <RvctClst>0</RvctClst>
- <GenPPlst>0</GenPPlst>
- <AdsCpuType>"Cortex-M0"</AdsCpuType>
- <RvctDeviceName></RvctDeviceName>
- <mOS>0</mOS>
- <uocRom>0</uocRom>
- <uocRam>0</uocRam>
- <hadIROM>1</hadIROM>
- <hadIRAM>1</hadIRAM>
- <hadXRAM>0</hadXRAM>
- <uocXRam>0</uocXRam>
- <RvdsVP>0</RvdsVP>
- <RvdsMve>0</RvdsMve>
- <RvdsCdeCp>0</RvdsCdeCp>
- <hadIRAM2>0</hadIRAM2>
- <hadIROM2>0</hadIROM2>
- <StupSel>1</StupSel>
- <useUlib>0</useUlib>
- <EndSel>1</EndSel>
- <uLtcg>0</uLtcg>
- <nSecure>0</nSecure>
- <RoSelD>3</RoSelD>
- <RwSelD>3</RwSelD>
- <CodeSel>0</CodeSel>
- <OptFeed>0</OptFeed>
- <NoZi1>0</NoZi1>
- <NoZi2>0</NoZi2>
- <NoZi3>0</NoZi3>
- <NoZi4>0</NoZi4>
- <NoZi5>0</NoZi5>
- <Ro1Chk>1</Ro1Chk>
- <Ro2Chk>0</Ro2Chk>
- <Ro3Chk>0</Ro3Chk>
- <Ir1Chk>0</Ir1Chk>
- <Ir2Chk>0</Ir2Chk>
- <Ra1Chk>1</Ra1Chk>
- <Ra2Chk>0</Ra2Chk>
- <Ra3Chk>0</Ra3Chk>
- <Im1Chk>0</Im1Chk>
- <Im2Chk>0</Im2Chk>
- <OnChipMemories>
- <Ocm1>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm1>
- <Ocm2>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm2>
- <Ocm3>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm3>
- <Ocm4>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm4>
- <Ocm5>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm5>
- <Ocm6>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </Ocm6>
- <IRAM>
- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x20000</Size>
- </IRAM>
- <IROM>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x40000</Size>
- </IROM>
- <XRAM>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </XRAM>
- <OCR_RVCT1>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x40000</Size>
- </OCR_RVCT1>
- <OCR_RVCT2>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT2>
- <OCR_RVCT3>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT3>
- <OCR_RVCT4>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT4>
- <OCR_RVCT5>
- <Type>1</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT5>
- <OCR_RVCT6>
- <Type>0</Type>
- <StartAddress>0x20000000</StartAddress>
- <Size>0x20000</Size>
- </OCR_RVCT6>
- <OCR_RVCT7>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
- </OCR_RVCT7>
- <OCR_RVCT8>
- <Type>0</Type>
- <StartAddress>0x0</StartAddress>
- <Size>0x0</Size>
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generated by cgit v1.3.1 (git 2.54.0) at 2026-09-01 23:05:33 +0000