diff options
Diffstat (limited to 'ports/cortex_m23')
24 files changed, 1195 insertions, 3871 deletions
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<bTchkAxf>0</bTchkAxf> - <nTsel>-1</nTsel> - <sDll></sDll> - <sDllPa></sDllPa> - <sDlgDll></sDlgDll> - <sDlgPa></sDlgPa> - <sIfile></sIfile> - <tDll></tDll> - <tDllPa></tDllPa> - <tDlgDll></tDlgDll> - <tDlgPa></tDlgPa> - <tIfile></tIfile> - <pMon></pMon> - </DebugOpt> - <TargetDriverDllRegistry> - <SetRegEntry> - <Number>0</Number> - <Key>ARMRTXEVENTFLAGS</Key> - <Name>-L70 -Z18 -C0 -M0 -T1</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>DLGDARM</Key> - <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>DLGUARM</Key> - <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>DLGTARM</Key> - <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(102=-1,-1,-1,-1,0)(103=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(163=-1,-1,-1,-1,0)(164=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)(152=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1013=-1,-1,-1,-1,0)(171=-1,-1,-1,-1,0)(172=-1,-1,-1,-1,0)(173=-1,-1,-1,-1,0)(1014=-1,-1,-1,-1,0)(1016=-1,-1,-1,-1,0)(136=-1,-1,-1,-1,0)</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>ARMDBGFLAGS</Key> - <Name>-T5F</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>UL2CM3</Key> - <Name>-UV0289BJE -O14 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(3BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0LM3S_16 -FS00 -FL04000</Name> - </SetRegEntry> - </TargetDriverDllRegistry> - <Breakpoint/> - <WatchWindow1> - <Ww> - <count>0</count> - <WinNumber>1</WinNumber> - <ItemText>thread_0_counter</ItemText> - </Ww> - <Ww> - <count>1</count> - <WinNumber>1</WinNumber> - <ItemText>thread_1_counter</ItemText> - </Ww> - <Ww> - <count>2</count> - <WinNumber>1</WinNumber> - <ItemText>thread_2_counter</ItemText> - </Ww> - <Ww> - <count>3</count> - <WinNumber>1</WinNumber> - <ItemText>thread_3_counter</ItemText> - </Ww> - <Ww> - <count>4</count> - <WinNumber>1</WinNumber> - <ItemText>thread_4_counter</ItemText> - </Ww> - <Ww> - <count>5</count> - <WinNumber>1</WinNumber> - <ItemText>thread_5_counter</ItemText> - </Ww> - <Ww> - <count>6</count> - <WinNumber>1</WinNumber> - <ItemText>_tx_thread_current_ptr</ItemText> - </Ww> - </WatchWindow1> - <Tracepoint> - <THDelay>0</THDelay> - </Tracepoint> - <DebugFlag> - <trace>0</trace> - <periodic>0</periodic> - <aLwin>1</aLwin> - <aCover>0</aCover> - <aSer1>0</aSer1> - <aSer2>0</aSer2> - <aPa>0</aPa> - <viewmode>1</viewmode> - <vrSel>0</vrSel> - <aSym>0</aSym> - <aTbox>0</aTbox> - <AscS1>0</AscS1> - <AscS2>0</AscS2> - <AscS3>0</AscS3> - <aSer3>0</aSer3> - <eProf>0</eProf> - <aLa>0</aLa> - <aPa1>0</aPa1> - <AscS4>0</AscS4> - <aSer4>0</aSer4> - <StkLoc>0</StkLoc> - <TrcWin>0</TrcWin> - <newCpu>0</newCpu> - <uProt>0</uProt> - </DebugFlag> - <LintExecutable></LintExecutable> - <LintConfigFile></LintConfigFile> - <bLintAuto>0</bLintAuto> - <bAutoGenD>0</bAutoGenD> - <LntExFlags>0</LntExFlags> - <pMisraName></pMisraName> - <pszMrule></pszMrule> - <pSingCmds></pSingCmds> - <pMultCmds></pMultCmds> - <pMisraNamep></pMisraNamep> - <pszMrulep></pszMrulep> - <pSingCmdsp></pSingCmdsp> - <pMultCmdsp></pMultCmdsp> - </TargetOption> - </Target> - - <Group> - <GroupName>Source Group</GroupName> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>1</FileNumber> - <FileType>2</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>.\tx_initialize_low_level.s</PathWithFileName> - <FilenameWithoutPath>tx_initialize_low_level.s</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>2</FileNumber> - <FileType>1</FileType> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>.\demo_threadx.c</PathWithFileName> - <FilenameWithoutPath>demo_threadx.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - <WindowPosition> - <length>44</length> - <flags>0</flags> - <showCmd>1</showCmd> - <MinPosition> - <xPos>-1</xPos> - <yPos>-1</yPos> - </MinPosition> - <MaxPosition> - <xPos>-1</xPos> - <yPos>-1</yPos> - </MaxPosition> - <NormalPosition> - <Top>56</Top> - <Left>12</Left> - <Right>1633</Right> - <Bottom>671</Bottom> - </NormalPosition> - </WindowPosition> - </File> - </Group> - - <Group> - <GroupName>Library_Group</GroupName> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>3</FileNumber> - <FileType>4</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>.\ThreadX_Library.lib</PathWithFileName> - <FilenameWithoutPath>ThreadX_Library.lib</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - </Group> - -</ProjectOpt> diff --git a/ports/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/demo_threadx_non-secure_zone.uvoptx b/ports/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/demo_threadx_non-secure_zone.uvoptx deleted file mode 100644 index ea78cfd6..00000000 --- a/ports/cortex_m23/ac6/example_build/demo_threadx_non-secure_zone/demo_threadx_non-secure_zone.uvoptx +++ /dev/null @@ -1,373 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no" ?> -<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd"> - - <SchemaVersion>1.0</SchemaVersion> - - <Header>### uVision Project, (C) Keil Software</Header> - - <Extensions> - <cExt>*.c</cExt> - <aExt>*.s*; *.src; *.a*</aExt> - <oExt>*.obj; *.o</oExt> - <lExt>*.lib</lExt> - <tExt>*.txt; *.h; *.inc</tExt> - <pExt>*.plm</pExt> - <CppX>*.cpp</CppX> - <nMigrate>0</nMigrate> - </Extensions> - - <DaveTm> - <dwLowDateTime>0</dwLowDateTime> - <dwHighDateTime>0</dwHighDateTime> - </DaveTm> - - <Target> - <TargetName>FVP Simulation Model</TargetName> - <ToolsetNumber>0x4</ToolsetNumber> - <ToolsetName>ARM-ADS</ToolsetName> - <TargetOption> - <CLKADS>12000000</CLKADS> - <OPTTT> - <gFlags>1</gFlags> - <BeepAtEnd>1</BeepAtEnd> - <RunSim>0</RunSim> - <RunTarget>1</RunTarget> - <RunAbUc>0</RunAbUc> - </OPTTT> - <OPTHX> - <HexSelection>1</HexSelection> - <FlashByte>65535</FlashByte> - <HexRangeLowAddress>0</HexRangeLowAddress> - <HexRangeHighAddress>0</HexRangeHighAddress> - <HexOffset>0</HexOffset> - </OPTHX> - <OPTLEX> - <PageWidth>79</PageWidth> - <PageLength>66</PageLength> - <TabStop>8</TabStop> - <ListingPath>.\Listings\</ListingPath> - </OPTLEX> - <ListingPage> - <CreateCListing>1</CreateCListing> - <CreateAListing>1</CreateAListing> - <CreateLListing>1</CreateLListing> - <CreateIListing>0</CreateIListing> - <AsmCond>1</AsmCond> - <AsmSymb>1</AsmSymb> - <AsmXref>0</AsmXref> - <CCond>1</CCond> - <CCode>0</CCode> - <CListInc>0</CListInc> - <CSymb>0</CSymb> - <LinkerCodeListing>0</LinkerCodeListing> - </ListingPage> - <OPTXL> - <LMap>1</LMap> - <LComments>1</LComments> - <LGenerateSymbols>1</LGenerateSymbols> - <LLibSym>1</LLibSym> - <LLines>1</LLines> - <LLocSym>1</LLocSym> - <LPubSym>1</LPubSym> - <LXref>0</LXref> - <LExpSel>0</LExpSel> - </OPTXL> - <OPTFL> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <IsCurrentTarget>1</IsCurrentTarget> - </OPTFL> - <CpuCode>7</CpuCode> - <DebugOpt> - <uSim>0</uSim> - <uTrg>1</uTrg> - <sLdApp>1</sLdApp> - <sGomain>1</sGomain> - <sRbreak>1</sRbreak> - <sRwatch>1</sRwatch> - <sRmem>1</sRmem> - <sRfunc>1</sRfunc> - <sRbox>1</sRbox> - <tLdApp>0</tLdApp> - <tGomain>1</tGomain> - <tRbreak>1</tRbreak> - <tRwatch>1</tRwatch> - <tRmem>1</tRmem> - <tRfunc>0</tRfunc> - <tRbox>1</tRbox> - <tRtrace>1</tRtrace> - <sRSysVw>1</sRSysVw> - <tRSysVw>1</tRSysVw> - <sRunDeb>0</sRunDeb> - <sLrtime>0</sLrtime> - <bEvRecOn>1</bEvRecOn> - <bSchkAxf>0</bSchkAxf> - <bTchkAxf>0</bTchkAxf> - <nTsel>15</nTsel> - <sDll></sDll> - <sDllPa></sDllPa> - <sDlgDll></sDlgDll> - <sDlgPa></sDlgPa> - <sIfile></sIfile> - <tDll></tDll> - <tDllPa></tDllPa> - <tDlgDll></tDlgDll> - <tDlgPa></tDlgPa> - <tIfile>..\Debug.ini</tIfile> - <pMon>BIN\DbgFMv8M.DLL</pMon> - </DebugOpt> - <TargetDriverDllRegistry> - <SetRegEntry> - <Number>0</Number> - <Key>UL2V8M</Key> - <Name>UL2V8M(-S0 -C0 -P0 -FC1000 -FD20000000</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>DbgFMv8M</Key> - <Name>-I -S -L"cpu0" -O4102 -C0 -MC".\FVP\MPS2_Cortex-M\FVP_MPS2_Cortex-M23_MDK.exe" -MF"..\ARMCM23_TZ_config.txt" -PF -MA</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>PWSTATINFO</Key> - <Name>200,50,700</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>DLGTARM</Key> - <Name>(6010=1830,250,2307,846,0)(6018=1284,352,1473,701,0)(6019=1328,34,1517,370,0)(6008=1865,39,2159,224,0)(6009=1860,848,2154,1033,0)(6014=1111,129,1369,860,0)(6015=872,146,1130,768,0)(6003=-1,-1,-1,-1,0)(6000=-1,-1,-1,-1,0)</Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>ARMDBGFLAGS</Key> - <Name></Name> - </SetRegEntry> - <SetRegEntry> - <Number>0</Number> - <Key>DLGUARM</Key> - <Name>(105=150,186,829,544,0)(106=511,345,1277,659,0)(107=-1,-1,-1,-1,0)</Name> - </SetRegEntry> - </TargetDriverDllRegistry> - <Breakpoint> - <Bp> - <Number>0</Number> - <Type>0</Type> - <LineNumber>89</LineNumber> - <EnabledFlag>1</EnabledFlag> - <Address>1046</Address> - <ByteObject>0</ByteObject> - <HtxType>0</HtxType> - <ManyObjects>0</ManyObjects> - <SizeOfObject>0</SizeOfObject> - <BreakByAccess>0</BreakByAccess> - <BreakIfRCount>1</BreakIfRCount> - <Filename><1>RTE\Device\ARMCM23_TZ\system_ARMCM23.c</Filename> - <ExecCommand></ExecCommand> - <Expression>\\demo_secure_zone\RTE/Device/ARMCM23_TZ/system_ARMCM23.c\89</Expression> - </Bp> - <Bp> - <Number>1</Number> - <Type>0</Type> - <LineNumber>0</LineNumber> - <EnabledFlag>1</EnabledFlag> - <Address>2107412</Address> - <ByteObject>0</ByteObject> - <HtxType>0</HtxType> - <ManyObjects>0</ManyObjects> - <SizeOfObject>0</SizeOfObject> - <BreakByAccess>0</BreakByAccess> - <BreakIfRCount>1</BreakIfRCount> - <Filename></Filename> - <ExecCommand></ExecCommand> - <Expression></Expression> - </Bp> - </Breakpoint> - <WatchWindow1> - <Ww> - <count>0</count> - <WinNumber>1</WinNumber> - <ItemText>thread_0_counter</ItemText> - </Ww> - <Ww> - <count>1</count> - <WinNumber>1</WinNumber> - <ItemText>thread_1_counter</ItemText> - </Ww> - <Ww> - <count>2</count> - <WinNumber>1</WinNumber> - <ItemText>thread_2_counter</ItemText> - </Ww> - <Ww> - <count>3</count> - <WinNumber>1</WinNumber> - <ItemText>thread_3_counter</ItemText> - </Ww> - <Ww> - <count>4</count> - <WinNumber>1</WinNumber> - <ItemText>thread_4_counter</ItemText> - </Ww> - <Ww> - <count>5</count> - <WinNumber>1</WinNumber> - <ItemText>thread_5_counter</ItemText> - </Ww> - <Ww> - <count>6</count> - <WinNumber>1</WinNumber> - <ItemText>thread_6_counter</ItemText> - </Ww> - <Ww> - <count>7</count> - <WinNumber>1</WinNumber> - <ItemText>thread_7_counter</ItemText> - </Ww> - <Ww> - <count>8</count> - <WinNumber>1</WinNumber> - <ItemText>_tx_thread_current_ptr</ItemText> - </Ww> - </WatchWindow1> - <MemoryWindow1> - <Mm> - <WinNumber>1</WinNumber> - <SubType>2</SubType> - <ItemText>0x2023ffb8</ItemText> - <AccSizeX>0</AccSizeX> - </Mm> - </MemoryWindow1> - <MemoryWindow2> - <Mm> - <WinNumber>2</WinNumber> - <SubType>2</SubType> - <ItemText>0xE000ED28</ItemText> - <AccSizeX>0</AccSizeX> - </Mm> - </MemoryWindow2> - <Tracepoint> - <THDelay>0</THDelay> - </Tracepoint> - <DebugFlag> - <trace>0</trace> - <periodic>1</periodic> - <aLwin>1</aLwin> - <aCover>0</aCover> - <aSer1>0</aSer1> - <aSer2>0</aSer2> - <aPa>0</aPa> - <viewmode>1</viewmode> - <vrSel>0</vrSel> - <aSym>0</aSym> - <aTbox>0</aTbox> - <AscS1>0</AscS1> - <AscS2>0</AscS2> - <AscS3>0</AscS3> - <aSer3>0</aSer3> - <eProf>0</eProf> - <aLa>0</aLa> - <aPa1>0</aPa1> - <AscS4>0</AscS4> - <aSer4>0</aSer4> - <StkLoc>0</StkLoc> - <TrcWin>0</TrcWin> - <newCpu>0</newCpu> - <uProt>0</uProt> - </DebugFlag> - <LintExecutable></LintExecutable> - <LintConfigFile></LintConfigFile> - <bLintAuto>0</bLintAuto> - <bAutoGenD>0</bAutoGenD> - <LntExFlags>0</LntExFlags> - <pMisraName></pMisraName> - <pszMrule></pszMrule> - <pSingCmds></pSingCmds> - <pMultCmds></pMultCmds> - <pMisraNamep></pMisraNamep> - <pszMrulep></pszMrulep> - <pSingCmdsp></pSingCmdsp> - <pMultCmdsp></pMultCmdsp> - </TargetOption> - </Target> - - <Group> - <GroupName>Non-secure Code</GroupName> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>1</FileNumber> - <FileType>4</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\ThreadX_Library.lib</PathWithFileName> - <FilenameWithoutPath>ThreadX_Library.lib</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>1</GroupNumber> - <FileNumber>2</FileNumber> - <FileType>1</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>.\demo_threadx.c</PathWithFileName> - <FilenameWithoutPath>demo_threadx.c</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - </Group> - - <Group> - <GroupName>CMSE Library</GroupName> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>0</RteFlg> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>3</FileNumber> - <FileType>5</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\demo_secure_zone\interface.h</PathWithFileName> - <FilenameWithoutPath>interface.h</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - <File> - <GroupNumber>2</GroupNumber> - <FileNumber>4</FileNumber> - <FileType>3</FileType> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <bDave2>0</bDave2> - <PathWithFileName>..\demo_secure_zone\Objects\demo_secure_zone_CMSE_Lib.o</PathWithFileName> - <FilenameWithoutPath>demo_secure_zone_CMSE_Lib.o</FilenameWithoutPath> - <RteFlg>0</RteFlg> - <bShared>0</bShared> - </File> - </Group> - - <Group> - <GroupName>::CMSIS</GroupName> - <tvExp>1</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>1</RteFlg> - </Group> - - <Group> - <GroupName>::Device</GroupName> - <tvExp>0</tvExp> - <tvExpOptDlg>0</tvExpOptDlg> - <cbSel>0</cbSel> - <RteFlg>1</RteFlg> - </Group> - -</ProjectOpt> diff --git a/ports/cortex_m23/ac6/example_build/tx_initialize_low_level.S b/ports/cortex_m23/ac6/example_build/tx_initialize_low_level.S index c5565bdd..52fd67e2 100644 --- a/ports/cortex_m23/ac6/example_build/tx_initialize_low_level.S +++ b/ports/cortex_m23/ac6/example_build/tx_initialize_low_level.S @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -87,25 +88,17 @@ _tx_initialize_low_level: ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - LDR r0, =0xE000ED08 // Build address of NVIC registers - LDR r1, =__Vectors // Pickup address of vector table - STR r1, [r0] // Set vector table address - /* Enable the cycle count register. */ // LDR r0, =0xE0001000 // Build address of DWT register // LDR r1, [r0] // Pickup the current value // ORR r1, r1, #1 // Set the CYCCNTENA bit // STR r1, [r0] // Enable the cycle count register - /* Set system stack pointer from vector value. */ - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =__Vectors // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Configure SysTick. */ LDR r0, =0xE000E000 // Build address of NVIC registers + MOV r1, #0 // Build value for SysTick reset + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] // Setup SysTick Reload Value MOVW r1, #0x7 // Build SysTick Control Enable Value diff --git a/ports/cortex_m23/ac6/inc/tx_port.h b/ports/cortex_m23/ac6/inc/tx_port.h index 97cc1fee..b4437373 100644 --- a/ports/cortex_m23/ac6/inc/tx_port.h +++ b/ports/cortex_m23/ac6/inc/tx_port.h @@ -9,7 +9,7 @@ * SPDX-License-Identifier: MIT **************************************************************************/ -// Some portions generated by Gemini (Gemini 2.0 Flash). +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -378,7 +378,7 @@ unsigned int was_masked; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_get_ipsr() == 0) { was_masked = __disable_irq(); @@ -394,7 +394,7 @@ unsigned int was_masked; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/AC6 Version 6.5.1.202602a *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/AC6 Version 6.5.2.202603 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m23/ac6/src/tx_thread_system_return.S b/ports/cortex_m23/ac6/src/tx_thread_system_return.S index c0bfe023..3cf7d6ee 100644 --- a/ports/cortex_m23/ac6/src/tx_thread_system_return.S +++ b/ports/cortex_m23/ac6/src/tx_thread_system_return.S @@ -9,7 +9,7 @@ * SPDX-License-Identifier: MIT **************************************************************************/ -// Some portions generated by Gemini (Gemini 2.0 Flash). +// Portions of this file were generated with AI assistance. /**************************************************************************/ diff --git a/ports/cortex_m23/gnu/CMakeLists.txt b/ports/cortex_m23/gnu/CMakeLists.txt new file mode 100644 index 00000000..a16300c1 --- /dev/null +++ b/ports/cortex_m23/gnu/CMakeLists.txt @@ -0,0 +1,34 @@ +# Copyright (c) 2026 Eclipse ThreadX contributors +# SPDX-License-Identifier: MIT +# Portions of this file were generated with AI assistance. +# +# ThreadX port sources for cortex_m23, GNU tools. + +target_sources(${PROJECT_NAME} + PRIVATE + # {{BEGIN_TARGET_SOURCES}} + ${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_misra.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_disable.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_restore.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_schedule.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack.c + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_allocate.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_free.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_secure_stack_initialize.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_stack_build.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_system_return.S + ${CMAKE_CURRENT_LIST_DIR}/src/tx_timer_interrupt.S + ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_allocate.c + ${CMAKE_CURRENT_LIST_DIR}/src/txe_thread_secure_stack_free.c + # {{END_TARGET_SOURCES}} +) + +target_include_directories(${PROJECT_NAME} + SYSTEM + PUBLIC + ${CMAKE_CURRENT_LIST_DIR}/inc +) diff --git a/ports/cortex_m23/gnu/example_build/build_threadx.sh b/ports/cortex_m23/gnu/example_build/build_threadx.sh index 57bcb07e..16a42438 100755 --- a/ports/cortex_m23/gnu/example_build/build_threadx.sh +++ b/ports/cortex_m23/gnu/example_build/build_threadx.sh @@ -10,6 +10,7 @@ # SPDX-License-Identifier: MIT # # AI Disclosure: This file was largely AI-generated by Copilot (Claude Sonnet 4.6). +# Portions of this file were generated with AI assistance. # The AI-generated portions may be considered public domain (CC0-1.0) # and not subject to the project's licence. The human contributor has # reviewed and verified that the code is correct. @@ -20,238 +21,274 @@ set -e cd "$(dirname "$0")" +# Toolchain selection. The default is the GNU toolchain, so an existing +# invocation of this script behaves exactly as before. Set TOOLCHAIN=atfe to +# build with Arm Toolchain for Embedded, which is LLVM based and is the +# successor to Arm Compiler 6: +# +# TOOLCHAIN=atfe ATFE_CLANG=/path/to/clang ./build_threadx.sh +# +: "${TOOLCHAIN:=gnu}" +case "${TOOLCHAIN}" in + gnu) + CC="arm-none-eabi-gcc" + AR="arm-none-eabi-ar" + TARGET_FLAGS="" + ENTRY_FLAG="-ereset_handler" + SYSCALL_LIB="--specs=nosys.specs" + ;; + atfe) + CC="${ATFE_CLANG:-clang}" + # llvm-ar ships beside clang in the toolchain. + case "${CC}" in + */*) AR="$(dirname "${CC}")/llvm-ar" ;; + *) AR="llvm-ar" ;; + esac + TARGET_FLAGS="--target=arm-none-eabi" + ENTRY_FLAG="-Wl,--entry=reset_handler" + # picolibc leaves _exit to the application; the toolchain's own + # semihosting library supplies it, which suits an example that runs on + # a model. + SYSCALL_LIB="-lsemihost" + ;; + *) + echo "Unknown TOOLCHAIN '${TOOLCHAIN}'; expected gnu or atfe" >&2 + exit 1 + ;; +esac + rm -f tx.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 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../../../../common/src/txe_thread_reset.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c -arm-none-eabi-ar -r tx.a tx_thread_secure_stack_allocate.o txe_thread_secure_stack_allocate.o tx_thread_secure_stack_free.o txe_thread_secure_stack_free.o -arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o -arm-none-eabi-ar -r tx.a tx_thread_interrupt_disable.o tx_thread_interrupt_restore.o tx_initialize_low_level.o -arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o -arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o -arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o -arm-none-eabi-ar -r tx.a tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o -arm-none-eabi-ar -r tx.a tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o -arm-none-eabi-ar -r tx.a tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o tx_event_flags_performance_system_info_get.o -arm-none-eabi-ar -r tx.a tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o -arm-none-eabi-ar -r tx.a tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o -arm-none-eabi-ar -r tx.a tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o -arm-none-eabi-ar -r tx.a tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o -arm-none-eabi-ar -r tx.a tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o -arm-none-eabi-ar -r tx.a tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o -arm-none-eabi-ar -r tx.a tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o tx_semaphore_put_notify.o -arm-none-eabi-ar -r tx.a tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o -arm-none-eabi-ar -r tx.a tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o -arm-none-eabi-ar -r tx.a tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o -arm-none-eabi-ar -r tx.a tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o -arm-none-eabi-ar -r tx.a tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o -arm-none-eabi-ar -r tx.a tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o -arm-none-eabi-ar -r tx.a tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o -arm-none-eabi-ar -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o -arm-none-eabi-ar -r tx.a tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o -arm-none-eabi-ar -r tx.a tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o -arm-none-eabi-ar -r tx.a txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o -arm-none-eabi-ar -r tx.a txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o -arm-none-eabi-ar -r tx.a txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o -arm-none-eabi-ar -r tx.a txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o -arm-none-eabi-ar -r tx.a txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o txe_queue_prioritize.o -arm-none-eabi-ar -r tx.a txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o -arm-none-eabi-ar -r tx.a txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o -arm-none-eabi-ar -r tx.a txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o -arm-none-eabi-ar -r tx.a txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o -arm-none-eabi-ar -r tx.a txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_initialize_low_level.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_context_restore.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_context_save.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_interrupt_control.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_interrupt_disable.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_interrupt_restore.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_schedule.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_secure_stack_allocate.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_secure_stack_free.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_stack_build.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_thread_system_return.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE ../src/tx_timer_interrupt.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../src/txe_thread_secure_stack_allocate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../src/txe_thread_secure_stack_free.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_handler.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_stack_error_notify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 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-I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc 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../../../../common/src/tx_timer_expiration_process.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_performance_system_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_activate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_system_deactivate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_timer_thread_entry.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_enable.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_disable.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_initialize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_interrupt_control.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_enter_insert.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_isr_exit_insert.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_register.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_object_unregister.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_user_event_insert.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_buffer_full_notify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/tx_trace_event_filter.c +"${CC}" ${TARGET_FLAGS} -c -g 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-I../../../../common/inc -I../inc ../../../../common/src/txe_block_release.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_allocate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_pool_prioritize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_byte_release.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_event_flags_set_notify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_prioritize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_mutex_put.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_flush.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c 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../../../../common/src/txe_thread_entry_exit_notify.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -DTX_SINGLE_MODE_NON_SECURE -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c +"${AR}" -r tx.a tx_thread_secure_stack_allocate.o txe_thread_secure_stack_allocate.o tx_thread_secure_stack_free.o txe_thread_secure_stack_free.o +"${AR}" -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o +"${AR}" -r tx.a tx_thread_interrupt_disable.o tx_thread_interrupt_restore.o tx_initialize_low_level.o +"${AR}" -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o +"${AR}" -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o +"${AR}" -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o +"${AR}" -r tx.a tx_byte_pool_initialize.o tx_byte_pool_performance_info_get.o tx_byte_pool_performance_system_info_get.o tx_byte_pool_prioritize.o +"${AR}" -r tx.a tx_byte_pool_search.o tx_byte_release.o tx_event_flags_cleanup.o tx_event_flags_create.o tx_event_flags_delete.o tx_event_flags_get.o +"${AR}" -r tx.a tx_event_flags_info_get.o tx_event_flags_initialize.o tx_event_flags_performance_info_get.o tx_event_flags_performance_system_info_get.o +"${AR}" -r tx.a tx_event_flags_set.o tx_event_flags_set_notify.o tx_initialize_high_level.o tx_initialize_kernel_enter.o tx_initialize_kernel_setup.o +"${AR}" -r tx.a tx_mutex_cleanup.o tx_mutex_create.o tx_mutex_delete.o tx_mutex_get.o tx_mutex_info_get.o tx_mutex_initialize.o tx_mutex_performance_info_get.o +"${AR}" -r tx.a tx_mutex_performance_system_info_get.o tx_mutex_prioritize.o tx_mutex_priority_change.o tx_mutex_put.o tx_queue_cleanup.o tx_queue_create.o +"${AR}" -r tx.a tx_queue_delete.o tx_queue_flush.o tx_queue_front_send.o tx_queue_info_get.o tx_queue_initialize.o tx_queue_performance_info_get.o +"${AR}" -r tx.a tx_queue_performance_system_info_get.o tx_queue_prioritize.o tx_queue_receive.o tx_queue_send.o tx_queue_send_notify.o tx_semaphore_ceiling_put.o +"${AR}" -r tx.a tx_semaphore_cleanup.o tx_semaphore_create.o tx_semaphore_delete.o tx_semaphore_get.o tx_semaphore_info_get.o tx_semaphore_initialize.o +"${AR}" -r tx.a tx_semaphore_performance_info_get.o tx_semaphore_performance_system_info_get.o tx_semaphore_prioritize.o tx_semaphore_put.o tx_semaphore_put_notify.o +"${AR}" -r tx.a tx_thread_create.o tx_thread_delete.o tx_thread_entry_exit_notify.o tx_thread_identify.o tx_thread_info_get.o tx_thread_initialize.o +"${AR}" -r tx.a tx_thread_performance_info_get.o tx_thread_performance_system_info_get.o tx_thread_preemption_change.o tx_thread_priority_change.o tx_thread_relinquish.o +"${AR}" -r tx.a tx_thread_reset.o tx_thread_resume.o tx_thread_shell_entry.o tx_thread_sleep.o tx_thread_stack_analyze.o tx_thread_stack_error_handler.o +"${AR}" -r tx.a tx_thread_stack_error_notify.o tx_thread_suspend.o tx_thread_system_preempt_check.o tx_thread_system_resume.o tx_thread_system_suspend.o +"${AR}" -r tx.a tx_thread_terminate.o tx_thread_time_slice.o tx_thread_time_slice_change.o tx_thread_timeout.o tx_thread_wait_abort.o tx_time_get.o +"${AR}" -r tx.a tx_time_set.o tx_timer_activate.o tx_timer_change.o tx_timer_create.o tx_timer_deactivate.o tx_timer_delete.o tx_timer_expiration_process.o +"${AR}" -r tx.a tx_timer_info_get.o tx_timer_initialize.o tx_timer_performance_info_get.o tx_timer_performance_system_info_get.o tx_timer_system_activate.o +"${AR}" -r tx.a tx_timer_system_deactivate.o tx_timer_thread_entry.o tx_trace_enable.o tx_trace_disable.o tx_trace_initialize.o tx_trace_interrupt_control.o +"${AR}" -r tx.a tx_trace_isr_enter_insert.o tx_trace_isr_exit_insert.o tx_trace_object_register.o tx_trace_object_unregister.o tx_trace_user_event_insert.o +"${AR}" -r tx.a tx_trace_buffer_full_notify.o tx_trace_event_filter.o tx_trace_event_unfilter.o +"${AR}" -r tx.a txe_block_allocate.o txe_block_pool_create.o txe_block_pool_delete.o txe_block_pool_info_get.o txe_block_pool_prioritize.o txe_block_release.o +"${AR}" -r tx.a txe_byte_allocate.o txe_byte_pool_create.o txe_byte_pool_delete.o txe_byte_pool_info_get.o txe_byte_pool_prioritize.o txe_byte_release.o +"${AR}" -r tx.a txe_event_flags_create.o txe_event_flags_delete.o txe_event_flags_get.o txe_event_flags_info_get.o txe_event_flags_set.o +"${AR}" -r tx.a txe_event_flags_set_notify.o txe_mutex_create.o txe_mutex_delete.o txe_mutex_get.o txe_mutex_info_get.o txe_mutex_prioritize.o +"${AR}" -r tx.a txe_mutex_put.o txe_queue_create.o txe_queue_delete.o txe_queue_flush.o txe_queue_front_send.o txe_queue_info_get.o txe_queue_prioritize.o +"${AR}" -r tx.a txe_queue_receive.o txe_queue_send.o txe_queue_send_notify.o txe_semaphore_ceiling_put.o txe_semaphore_create.o txe_semaphore_delete.o +"${AR}" -r tx.a txe_semaphore_get.o txe_semaphore_info_get.o txe_semaphore_prioritize.o txe_semaphore_put.o txe_semaphore_put_notify.o txe_thread_create.o +"${AR}" -r tx.a txe_thread_delete.o txe_thread_entry_exit_notify.o txe_thread_info_get.o txe_thread_preemption_change.o txe_thread_priority_change.o +"${AR}" -r tx.a txe_thread_relinquish.o txe_thread_reset.o txe_thread_resume.o txe_thread_suspend.o txe_thread_terminate.o txe_thread_time_slice_change.o +"${AR}" -r tx.a txe_thread_wait_abort.o txe_timer_activate.o txe_timer_change.o txe_timer_create.o txe_timer_deactivate.o txe_timer_delete.o txe_timer_info_get.o diff --git a/ports/cortex_m23/gnu/example_build/build_threadx_sample.sh b/ports/cortex_m23/gnu/example_build/build_threadx_sample.sh new file mode 100755 index 00000000..7aa42561 --- /dev/null +++ b/ports/cortex_m23/gnu/example_build/build_threadx_sample.sh @@ -0,0 +1,63 @@ +#!/bin/bash +############################################################################## +# Copyright (c) 2024 Microsoft Corporation +# Copyright (c) 2026 Eclipse ThreadX contributors +# +# This program and the accompanying materials are made available under the +# terms of the MIT License which is available at +# https://opensource.org/licenses/MIT. +# +# SPDX-License-Identifier: MIT +# +# AI Disclosure: This file was largely AI-generated by Copilot (Claude Sonnet 4.6). +# Portions of this file were generated with AI assistance. +# The AI-generated portions may be considered public domain (CC0-1.0) +# and not subject to the project's licence. The human contributor has +# reviewed and verified that the code is correct. +# +# SPDX-License-Identifier: MIT and CC0-1.0 +############################################################################## + +set -e +cd "$(dirname "$0")" + +# Toolchain selection. The default is the GNU toolchain, so an existing +# invocation of this script behaves exactly as before. Set TOOLCHAIN=atfe to +# build with Arm Toolchain for Embedded, which is LLVM based and is the +# successor to Arm Compiler 6: +# +# TOOLCHAIN=atfe ATFE_CLANG=/path/to/clang ./build_threadx_sample.sh +# +: "${TOOLCHAIN:=gnu}" +case "${TOOLCHAIN}" in + gnu) + CC="arm-none-eabi-gcc" + AR="arm-none-eabi-ar" + TARGET_FLAGS="" + ENTRY_FLAG="-ereset_handler" + SYSCALL_LIB="--specs=nosys.specs" + ;; + atfe) + CC="${ATFE_CLANG:-clang}" + # llvm-ar ships beside clang in the toolchain. + case "${CC}" in + */*) AR="$(dirname "${CC}")/llvm-ar" ;; + *) AR="llvm-ar" ;; + esac + TARGET_FLAGS="--target=arm-none-eabi" + ENTRY_FLAG="-Wl,--entry=reset_handler" + # picolibc leaves _exit to the application; the toolchain's own + # semihosting library supplies it, which suits an example that runs on + # a model. + SYSCALL_LIB="-lsemihost" + ;; + *) + echo "Unknown TOOLCHAIN '${TOOLCHAIN}'; expected gnu or atfe" >&2 + exit 1 + ;; +esac + +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -mthumb cortexm23_vectors.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -mthumb cortexm23_crt0.S +"${CC}" ${TARGET_FLAGS} -c -g -mcpu=cortex-m23 -mthumb -I../../../../common/inc -I../inc sample_threadx.c +"${CC}" ${TARGET_FLAGS} -g -mcpu=cortex-m23 -mthumb -T sample_threadx.ld ${ENTRY_FLAG} -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm23_vectors.o cortexm23_crt0.o sample_threadx.o tx.a ${SYSCALL_LIB} diff --git a/ports/cortex_m23/gnu/example_build/cortexm23_crt0.S b/ports/cortex_m23/gnu/example_build/cortexm23_crt0.S new file mode 100644 index 00000000..17c9d6a1 --- /dev/null +++ b/ports/cortex_m23/gnu/example_build/cortexm23_crt0.S @@ -0,0 +1,140 @@ +/* Startup code for the Cortex-M23 example. + * + * This is the Armv7-M crt0 moved to unified assembler syntax. + * + * The Armv7-M file carries no syntax directive, so GNU as reads it in the + * legacy divided syntax, where a Thumb data-processing instruction sets the + * flags whether or not the mnemonic says so: "mov r2, #0" assembles to 2200, + * MOVS. LLVM's integrated assembler implements unified syntax only, and there + * those same mnemonics mean the non-flag-setting forms, which Armv8-M Baseline + * does not provide. It rejects the file rather than guessing. + * + * So this file selects unified syntax and spells every one of those + * instructions with its trailing s. The encodings do not change: disassembling + * the Cortex-M4 object built by GNU shows 2200 movs, 1a52 subs and 3001 adds + * already, so this states explicitly what that toolchain was choosing + * implicitly. The flags are load bearing -- crt0_memory_copy branches on the + * result of "subs r2, r2, r1" and again on "subs r2, #1", so a genuinely + * non-flag-setting form would break both loops. + */ + + .global _start + .extern main + + + .syntax unified + + .section .init, "ax" + .code 16 + .align 2 + .thumb_func + + +_start: + CPSID i + ldr r1, =__stack_end__ + mov sp, r1 + + /* Copy initialised sections into RAM if required. */ + ldr r0, =__data_load_start__ + ldr r1, =__data_start__ + ldr r2, =__data_end__ + bl crt0_memory_copy + ldr r0, =__text_load_start__ + ldr r1, =__text_start__ + ldr r2, =__text_end__ + bl crt0_memory_copy + ldr r0, =__fast_load_start__ + ldr r1, =__fast_start__ + ldr r2, =__fast_end__ + bl crt0_memory_copy + ldr r0, =__ctors_load_start__ + ldr r1, =__ctors_start__ + ldr r2, =__ctors_end__ + bl crt0_memory_copy + ldr r0, =__dtors_load_start__ + ldr r1, =__dtors_start__ + ldr r2, =__dtors_end__ + bl crt0_memory_copy + ldr r0, =__rodata_load_start__ + ldr r1, =__rodata_start__ + ldr r2, =__rodata_end__ + bl crt0_memory_copy + + + /* Zero bss. */ + ldr r0, =__bss_start__ + ldr r1, =__bss_end__ + movs r2, #0 + bl crt0_memory_set + + /* Setup heap - not recommended for Threadx but here for compatibility reasons */ + ldr r0, = __heap_start__ + ldr r1, = __heap_end__ + subs r1, r1, r0 + movs r2, #0 + str r2, [r0] + adds r0, r0, #4 + str r1, [r0] + + /* constructors in case of using C++ */ + ldr r0, =__ctors_start__ + ldr r1, =__ctors_end__ +crt0_ctor_loop: + cmp r0, r1 + beq crt0_ctor_end + ldr r2, [r0] + adds r0, #4 + push {r0-r1} + blx r2 + pop {r0-r1} + b crt0_ctor_loop +crt0_ctor_end: + + /* Setup call frame for main() */ + movs r0, #0 + mov lr, r0 + mov r12, sp + +start: + /* Jump to main() */ + movs r0, #0 + movs r1, #0 + ldr r2, =main + blx r2 + /* when main returns, loop forever. */ +crt0_exit_loop: + b crt0_exit_loop + + + + /* Startup helper functions. */ + +crt0_memory_copy: + cmp r0, r1 + beq memory_copy_done + subs r2, r2, r1 + beq memory_copy_done +memory_copy_loop: + ldrb r3, [r0] + adds r0, r0, #1 + strb r3, [r1] + adds r1, r1, #1 + subs r2, r2, #1 + bne memory_copy_loop +memory_copy_done: + bx lr + +crt0_memory_set: + cmp r0, r1 + beq memory_set_done + strb r2, [r0] + adds r0, r0, #1 + b crt0_memory_set +memory_set_done: + bx lr + + /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ + .section .stack, "wa", %nobits + .section .stack_process, "wa", %nobits + .section .heap, "wa", %nobits diff --git a/ports/cortex_m23/gnu/example_build/cortexm23_vectors.S b/ports/cortex_m23/gnu/example_build/cortexm23_vectors.S new file mode 100644 index 00000000..3c60f953 --- /dev/null +++ b/ports/cortex_m23/gnu/example_build/cortexm23_vectors.S @@ -0,0 +1,106 @@ +/************************************************************************** + * Copyright (c) 2026 Eclipse ThreadX contributors + * + * This program and the accompanying materials are made available under the + * terms of the MIT License which is available at + * https://opensource.org/licenses/MIT. + * + * AI Disclosure: This file was largely AI-generated by Claude Code (Opus 5). + * The AI-generated portions may be considered public domain (CC0-1.0) + * and not subject to the project's licence. The human contributor has + * reviewed and verified that the code is correct. + * + * SPDX-License-Identifier: MIT and CC0-1.0 + **************************************************************************/ + +/* Exception and interrupt vector table for the Cortex-M23 example. + * + * Armv8-M names its exception handlers the CMSIS way, so this table cannot be + * the Armv7-M one with the core name changed: the port and its low level + * initialisation export SVC_Handler, PendSV_Handler, SysTick_Handler and + * HardFault_Handler, where the Cortex-M3, M4 and M7 examples reference + * __tx_SVCallHandler, __tx_PendSVHandler, __tx_SysTickHandler and + * __tx_HardfaultHandler. Linking the Armv7-M table here fails to resolve every + * one of those. + * + * Slot 7 is SecureFault on Armv8-M, where Armv7-M leaves it reserved. + * + * Cortex-M23 is Armv8-M Baseline, which has no configurable faults, so the + * MemManage, BusFault and UsageFault slots go to __tx_BadHandler. This port + * also exports no __tx_NMIHandler or __tx_DBGHandler, unlike the Mainline + * ports, so those two slots take __tx_BadHandler as well. + * + * The SVCall slot is __tx_BadHandler rather than SVC_Handler because this port + * is built with -DTX_SINGLE_MODE_NON_SECURE, and tx_thread_schedule.S compiles + * SVC_Handler only when neither TX_SINGLE_MODE_SECURE nor + * TX_SINGLE_MODE_NON_SECURE is defined. Naming it here does not fail to link + * loudly, it fails to link at all. + */ + + .global reset_handler + .global __tx_BadHandler + .global PendSV_Handler + .global SysTick_Handler + .global HardFault_Handler + + .syntax unified + .section .vectors, "ax" + .code 16 + .align 0 + .global _vectors + +_vectors: + .word __stack_end__ + .word reset_handler + .word __tx_BadHandler + .word HardFault_Handler + .word __tx_BadHandler // MemManage + .word __tx_BadHandler // BusFault + .word __tx_BadHandler + .word __tx_BadHandler // SecureFault, Armv8-M only + .word 0 // Reserved + .word 0 // Reserved + .word 0 // Reserved + .word __tx_BadHandler // SVCall: see the note above + .word __tx_BadHandler + .word 0 // Reserved + .word PendSV_Handler // Used by the ThreadX scheduler + .word SysTick_Handler // Used by the ThreadX timer + .word __tx_BadHandler // Populate with a user interrupt handler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + .word __tx_BadHandler + + .section .init, "ax" + .thumb_func +reset_handler: + // low level hardware config, such as PLL setup goes here + b _start diff --git a/ports/cortex_m23/gnu/example_build/sample_threadx.c b/ports/cortex_m23/gnu/example_build/sample_threadx.c new file mode 100644 index 00000000..b2fe3c89 --- /dev/null +++ b/ports/cortex_m23/gnu/example_build/sample_threadx.c @@ -0,0 +1,381 @@ +/***************************************************************************/ +/* Copyright (c) 2024 Microsoft Corporation */ +/* Copyright (c) 2026 Eclipse ThreadX contributors */ +/* */ +/* This program and the accompanying materials are made available under */ +/* the terms of the MIT License which is available at */ +/* https://opensource.org/licenses/MIT. */ +/* */ +/* SPDX-License-Identifier: MIT */ +/***************************************************************************/ + +/* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight + threads of different priorities, using a message queue, semaphore, mutex, event flags group, + byte pool, and block pool. */ + +#include "tx_api.h" + +#define DEMO_STACK_SIZE 1024 +#define DEMO_BYTE_POOL_SIZE 9120 +#define DEMO_BLOCK_POOL_SIZE 100 +#define DEMO_QUEUE_SIZE 100 + + +/* Define the ThreadX object control blocks... */ + +TX_THREAD thread_0; +TX_THREAD thread_1; +TX_THREAD thread_2; +TX_THREAD thread_3; +TX_THREAD thread_4; +TX_THREAD thread_5; +TX_THREAD thread_6; +TX_THREAD thread_7; +TX_QUEUE queue_0; +TX_SEMAPHORE semaphore_0; +TX_MUTEX mutex_0; +TX_EVENT_FLAGS_GROUP event_flags_0; +TX_BYTE_POOL byte_pool_0; +TX_BLOCK_POOL block_pool_0; +UCHAR memory_area[DEMO_BYTE_POOL_SIZE]; + + +/* Define the counters used in the demo application... */ + +ULONG thread_0_counter; +ULONG thread_1_counter; +ULONG thread_1_messages_sent; +ULONG thread_2_counter; +ULONG thread_2_messages_received; +ULONG thread_3_counter; +ULONG thread_4_counter; +ULONG thread_5_counter; +ULONG thread_6_counter; +ULONG thread_7_counter; + + +/* Define thread prototypes. */ + +void thread_0_entry(ULONG thread_input); +void thread_1_entry(ULONG thread_input); +void thread_2_entry(ULONG thread_input); +void thread_3_and_4_entry(ULONG thread_input); +void thread_5_entry(ULONG thread_input); +void thread_6_and_7_entry(ULONG thread_input); + + +/* Define main entry point. */ + +int main() +{ + + /* Enter the ThreadX kernel. */ + tx_kernel_enter(); +} + + +/* Define what the initial system looks like. */ + +void tx_application_define(void *first_unused_memory) +{ + +CHAR *pointer = TX_NULL; + + + /* Create a byte memory pool from which to allocate the thread stacks. */ + tx_byte_pool_create(&byte_pool_0, "byte pool 0", memory_area, DEMO_BYTE_POOL_SIZE); + + /* Put system definition stuff in here, e.g. thread creates and other assorted + create information. */ + + /* Allocate the stack for thread 0. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + /* Create the main thread. */ + tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, + pointer, DEMO_STACK_SIZE, + 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); + + + /* Allocate the stack for thread 1. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + /* Create threads 1 and 2. These threads pass information through a ThreadX + message queue. It is also interesting to note that these threads have a time + slice. */ + tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, + pointer, DEMO_STACK_SIZE, + 16, 16, 4, TX_AUTO_START); + + /* Allocate the stack for thread 2. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, + 16, 16, 4, TX_AUTO_START); + + /* Allocate the stack for thread 3. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + An interesting thing here is that both threads share the same instruction area. */ + tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, + 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); + + /* Allocate the stack for thread 4. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, + 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); + + /* Allocate the stack for thread 5. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + /* Create thread 5. This thread simply pends on an event flag which will be set + by thread_0. */ + tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, + 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); + + /* Allocate the stack for thread 6. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ + tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, + 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); + + /* Allocate the stack for thread 7. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); + + tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, + 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); + + /* Allocate the message queue. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_QUEUE_SIZE*sizeof(ULONG), TX_NO_WAIT); + + /* Create the message queue shared by threads 1 and 2. */ + tx_queue_create(&queue_0, "queue 0", TX_1_ULONG, pointer, DEMO_QUEUE_SIZE*sizeof(ULONG)); + + /* Create the semaphore used by threads 3 and 4. */ + tx_semaphore_create(&semaphore_0, "semaphore 0", 1); + + /* Create the event flags group used by threads 1 and 5. */ + tx_event_flags_create(&event_flags_0, "event flags 0"); + + /* Create the mutex used by thread 6 and 7 without priority inheritance. */ + tx_mutex_create(&mutex_0, "mutex 0", TX_NO_INHERIT); + + /* Allocate the memory for a small block pool. */ + tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_BLOCK_POOL_SIZE, TX_NO_WAIT); + + /* Create a block memory pool to allocate a message buffer from. */ + tx_block_pool_create(&block_pool_0, "block pool 0", sizeof(ULONG), pointer, DEMO_BLOCK_POOL_SIZE); + + /* Allocate a block and release the block memory. */ + tx_block_allocate(&block_pool_0, (VOID **) &pointer, TX_NO_WAIT); + + /* Release the block back to the pool. */ + tx_block_release(pointer); +} + + + +/* Define the test threads. */ + +void thread_0_entry(ULONG thread_input) +{ + +UINT status; + + + /* This thread simply sits in while-forever-sleep loop. */ + while(1) + { + + /* Increment the thread counter. */ + thread_0_counter++; + + /* Sleep for 10 ticks. */ + tx_thread_sleep(10); + + /* Set event flag 0 to wakeup thread 5. */ + status = tx_event_flags_set(&event_flags_0, 0x1, TX_OR); + + /* Check status. */ + if (status != TX_SUCCESS) + break; + } +} + + +void thread_1_entry(ULONG thread_input) +{ + +UINT status; + + + /* This thread simply sends messages to a queue shared by thread 2. */ + while(1) + { + + /* Increment the thread counter. */ + thread_1_counter++; + + /* Send message to queue 0. */ + status = tx_queue_send(&queue_0, &thread_1_messages_sent, TX_WAIT_FOREVER); + + /* Check completion status. */ + if (status != TX_SUCCESS) + break; + + /* Increment the message sent. */ + thread_1_messages_sent++; + } +} + + +void thread_2_entry(ULONG thread_input) +{ + +ULONG received_message; +UINT status; + + /* This thread retrieves messages placed on the queue by thread 1. */ + while(1) + { + + /* Increment the thread counter. */ + thread_2_counter++; + + /* Retrieve a message from the queue. */ + status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER); + + /* Check completion status and make sure the message is what we + expected. */ + if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) + break; + + /* Otherwise, all is okay. Increment the received message count. */ + thread_2_messages_received++; + } +} + + +void thread_3_and_4_entry(ULONG thread_input) +{ + +UINT status; + + + /* This function is executed from thread 3 and thread 4. As the loop + below shows, these function compete for ownership of semaphore_0. */ + while(1) + { + + /* Increment the thread counter. */ + if (thread_input == 3) + thread_3_counter++; + else + thread_4_counter++; + + /* Get the semaphore with suspension. */ + status = tx_semaphore_get(&semaphore_0, TX_WAIT_FOREVER); + + /* Check status. */ + if (status != TX_SUCCESS) + break; + + /* Sleep for 2 ticks to hold the semaphore. */ + tx_thread_sleep(2); + + /* Release the semaphore. */ + status = tx_semaphore_put(&semaphore_0); + + /* Check status. */ + if (status != TX_SUCCESS) + break; + } +} + + +void thread_5_entry(ULONG thread_input) +{ + +UINT status; +ULONG actual_flags; + + + /* This thread simply waits for an event in a forever loop. */ + while(1) + { + + /* Increment the thread counter. */ + thread_5_counter++; + + /* Wait for event flag 0. */ + status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, + &actual_flags, TX_WAIT_FOREVER); + + /* Check status. */ + if ((status != TX_SUCCESS) || (actual_flags != 0x1)) + break; + } +} + + +void thread_6_and_7_entry(ULONG thread_input) +{ + +UINT status; + + + /* This function is executed from thread 6 and thread 7. As the loop + below shows, these function compete for ownership of mutex_0. */ + while(1) + { + + /* Increment the thread counter. */ + if (thread_input == 6) + thread_6_counter++; + else + thread_7_counter++; + + /* Get the mutex with suspension. */ + status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER); + + /* Check status. */ + if (status != TX_SUCCESS) + break; + + /* Get the mutex again with suspension. This shows + that an owning thread may retrieve the mutex it + owns multiple times. */ + status = tx_mutex_get(&mutex_0, TX_WAIT_FOREVER); + + /* Check status. */ + if (status != TX_SUCCESS) + break; + + /* Sleep for 2 ticks to hold the mutex. */ + tx_thread_sleep(2); + + /* Release the mutex. */ + status = tx_mutex_put(&mutex_0); + + /* Check status. */ + if (status != TX_SUCCESS) + break; + + /* Release the mutex again. This will actually + release ownership since it was obtained twice. */ + status = tx_mutex_put(&mutex_0); + + /* Check status. */ + if (status != TX_SUCCESS) + break; + } +} diff --git a/ports/cortex_m23/gnu/example_build/sample_threadx.ld b/ports/cortex_m23/gnu/example_build/sample_threadx.ld new file mode 100644 index 00000000..531e8227 --- /dev/null +++ b/ports/cortex_m23/gnu/example_build/sample_threadx.ld @@ -0,0 +1,151 @@ +MEMORY +{ + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000 +} + +__STACKSIZE__ = 1024; +__STACKSIZE_PROCESS__ = 0; +__HEAPSIZE__ = 128; + +SECTIONS +{ + .vectors : + { + KEEP(*(.vectors .vectors.*)) + } > FLASH + + .text : + { + __text_start__ = .; + + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + __ctors_load_start__ = .; + __ctors_start__ = ALIGN(4); + *(SORT(.ctors.*)) + *(.ctors) + __ctors_end__ = ALIGN(4); + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + __dtors_load_start__ = .; + __dtors_start__ = ALIGN(4); + *(SORT(.dtors.*)) + *(.dtors) + __dtors_end__ = ALIGN(4); + + KEEP(*(.eh_frame*)) + + __text_end__ = ALIGN(4); + } > FLASH + + __text_load_start__ = LOADADDR(.text); + + .rodata : + { + __rodata_start__ = .; + *(.rodata*) + __rodata_end__ = ALIGN(4); + } > FLASH + + __rodata_load_start__ = LOADADDR(.rodata); + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + __data_load_start__ = ALIGN (4); + + /* Fast section: for time-critical code/data to be copied from FLASH to RAM at startup. + No .fast content in this sample; symbols defined so crt0 startup copy is a no-op. */ + .fast (NOLOAD) : + { + __fast_start__ = .; + *(.fast*) + __fast_end__ = .; + } > RAM + + __fast_load_start__ = __fast_start__; + + .data : AT (__data_load_start__) + { + __data_start__ = .; + + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + + } > RAM + + .heap (COPY): + { + __heap_start__ = ALIGN(4); + *(.heap) + . = ALIGN(. + __HEAPSIZE__, 4); + __heap_end__ = ALIGN(4); + } > RAM + + .stack ALIGN(4) (NOLOAD) : + { + __stack_start__ = ALIGN(4); + *(.stack) + . = ALIGN(. + __STACKSIZE__, 4); + __stack_end__ = ALIGN(4); + } > RAM + + __RAM_segment_used_end__ = .; +} diff --git a/ports/cortex_m23/gnu/inc/tx_port.h b/ports/cortex_m23/gnu/inc/tx_port.h index dac6fbb8..0c1d88d2 100644 --- a/ports/cortex_m23/gnu/inc/tx_port.h +++ b/ports/cortex_m23/gnu/inc/tx_port.h @@ -9,7 +9,7 @@ * SPDX-License-Identifier: MIT **************************************************************************/ -// Some portions generated by Gemini (Gemini 2.0 Flash). +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -391,13 +391,13 @@ unsigned int interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (_get_ipsr() == 0) { interrupt_save = __get_primask_value(); __enable_interrupts(); __restore_interrupts(interrupt_save); - __asm__ volatile ("isb 0xF " : : : "memory"); + __asm__ volatile ("isb sy " : : : "memory"); } } @@ -426,7 +426,7 @@ unsigned int interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/GNU Version 6.5.1.202602a *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/GNU Version 6.5.2.202603 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m23/gnu/src/tx_initialize_low_level.S b/ports/cortex_m23/gnu/src/tx_initialize_low_level.S index ba092253..9efac65f 100644 --- a/ports/cortex_m23/gnu/src/tx_initialize_low_level.S +++ b/ports/cortex_m23/gnu/src/tx_initialize_low_level.S @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -83,15 +84,10 @@ _tx_initialize_low_level: /* Set base of available memory to end of non-initialised RAM area. */ LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer - LDR r1, =Image$$ARM_LIB_STACK$$ZI$$Limit // Build first free address + LDR r1, =__RAM_segment_used_end__ // Build first free address ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - LDR r0, =0xE000ED08 // Build address of NVIC registers - LDR r1, =__Vectors // Pickup address of vector table - STR r1, [r0] // Set vector table address - // /* Enable the cycle count register. */ // // LDR r0, =0xE0001000 // Build address of DWT register @@ -99,14 +95,11 @@ _tx_initialize_low_level: // ORR r1, r1, #1 // Set the CYCCNTENA bit // STR r1, [r0] // Enable the cycle count register - /* Set system stack pointer from vector value. */ - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =__Vectors // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Configure SysTick. */ LDR r0, =0xE000E000 // Build address of NVIC registers + MOVS r1, #0 // Build value for SysTick reset + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] // Setup SysTick Reload Value MOVW r1, #0x7 // Build SysTick Control Enable Value diff --git a/ports/cortex_m23/gnu/src/tx_thread_context_restore.S b/ports/cortex_m23/gnu/src/tx_thread_context_restore.S index 6f2b453c..e8ddac05 100644 --- a/ports/cortex_m23/gnu/src/tx_thread_context_restore.S +++ b/ports/cortex_m23/gnu/src/tx_thread_context_restore.S @@ -73,7 +73,14 @@ _tx_thread_context_restore: /* Call the ISR exit function to indicate an ISR is complete. */ PUSH {r0, lr} // Save return address BL _tx_execution_isr_exit // Call the ISR exit function - POP {r0, lr} // Recover return address + POP {r0, r1} // Recover r0 and the return address + MOV lr, r1 // This core cannot POP into LR: the + // 16-bit Thumb POP takes r0-r7 and + // pc only. MOV to a high register + // is permitted, so restore LR from + // a scratch register. r1 is free -- + // the BL above may clobber r0-r3, + // which is why r0 is saved at all. #endif BX lr diff --git a/ports/cortex_m23/gnu/src/tx_thread_context_save.S b/ports/cortex_m23/gnu/src/tx_thread_context_save.S index 84bf9908..136c6391 100644 --- a/ports/cortex_m23/gnu/src/tx_thread_context_save.S +++ b/ports/cortex_m23/gnu/src/tx_thread_context_save.S @@ -73,7 +73,14 @@ _tx_thread_context_save: /* Call the ISR enter function to indicate an ISR is starting. */ PUSH {r0, lr} // Save return address BL _tx_execution_isr_enter // Call the ISR enter function - POP {r0, lr} // Recover return address + POP {r0, r1} // Recover r0 and the return address + MOV lr, r1 // This core cannot POP into LR: the + // 16-bit Thumb POP takes r0-r7 and + // pc only. MOV to a high register + // is permitted, so restore LR from + // a scratch register. r1 is free -- + // the BL above may clobber r0-r3, + // which is why r0 is saved at all. #endif BX lr diff --git a/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S b/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S index 48aec578..81a1cb2f 100644 --- a/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S +++ b/ports/cortex_m23/gnu/src/tx_thread_secure_stack_initialize.S @@ -70,7 +70,7 @@ _tx_thread_secure_stack_initialize: SVC 3 CPSID i // Disable interrupts #else - MOV r0, #0xFF // Feature not enabled + MOVS r0, #0xFF // Feature not enabled #endif BX lr .end diff --git a/ports/cortex_m23/gnu/src/tx_thread_system_return.S b/ports/cortex_m23/gnu/src/tx_thread_system_return.S index ca5408d7..a486d8b1 100644 --- a/ports/cortex_m23/gnu/src/tx_thread_system_return.S +++ b/ports/cortex_m23/gnu/src/tx_thread_system_return.S @@ -9,7 +9,7 @@ * SPDX-License-Identifier: MIT **************************************************************************/ -// Some portions generated by Gemini (Gemini 2.0 Flash). +// Portions of this file were generated with AI assistance. /**************************************************************************/ diff --git a/ports/cortex_m23/iar/inc/tx_port.h b/ports/cortex_m23/iar/inc/tx_port.h index 38649ac3..c7468b01 100644 --- a/ports/cortex_m23/iar/inc/tx_port.h +++ b/ports/cortex_m23/iar/inc/tx_port.h @@ -9,6 +9,8 @@ * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. + /**************************************************************************/ /**************************************************************************/ @@ -399,7 +401,7 @@ __istate_t interrupt_save; /* Set PendSV to invoke ThreadX scheduler. */ *((volatile ULONG *) 0xE000ED04) = ((ULONG) 0x10000000); - __asm__ volatile ("dsb 0xF \n isb 0xF " : : : "memory"); + __asm__ volatile ("dsb sy \n isb sy " : : : "memory"); if (__get_IPSR() == 0) { interrupt_save = __get_interrupt_state(); @@ -415,7 +417,7 @@ __istate_t interrupt_save; #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/IAR Version 6.5.1.202602a *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M23/IAR Version 6.5.2.202603 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m23/iar/src/tx_iar.c b/ports/cortex_m23/iar/src/tx_iar.c index 238b485e..ab6c209c 100644 --- a/ports/cortex_m23/iar/src/tx_iar.c +++ b/ports/cortex_m23/iar/src/tx_iar.c @@ -9,6 +9,7 @@ * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ /**************************************************************************/ @@ -270,7 +271,7 @@ TX_MUTEX *mutex_ptr; mutex_ptr = &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++]; /* Check for wrap-around on the next free mutex. */ - if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK) + if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK) { /* Yes, set the free index back to 0. */ @@ -287,7 +288,7 @@ TX_MUTEX *mutex_ptr; } /* Determine if a free mutex was found. */ - if (i >= _MAX_LOCK) + if (i >= _MAX_FLOCK) { /* Error! No more free mutexes! */ @@ -678,7 +679,7 @@ TX_MUTEX *mutex_ptr; mutex_ptr = &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++]; /* Check for wrap-around on the next free mutex. */ - if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK) + if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK) { /* Yes, set the free index back to 0. */ @@ -695,7 +696,7 @@ TX_MUTEX *mutex_ptr; } /* Determine if a free mutex was found. */ - if (i >= _MAX_LOCK) + if (i >= _MAX_FLOCK) { /* Error! No more free mutexes! */ diff --git a/ports/cortex_m23/iar/src/tx_initialize_low_level.s b/ports/cortex_m23/iar/src/tx_initialize_low_level.s index fb6a109f..00e53af4 100644 --- a/ports/cortex_m23/iar/src/tx_initialize_low_level.s +++ b/ports/cortex_m23/iar/src/tx_initialize_low_level.s @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -20,11 +21,9 @@ /**************************************************************************/ /**************************************************************************/ - EXTERN _tx_thread_system_stack_ptr EXTERN _tx_initialize_unused_memory EXTERN _tx_timer_interrupt EXTERN __main - EXTERN __vector_table EXTERN _tx_thread_current_ptr EXTERN _tx_thread_stack_error_handler @@ -85,25 +84,17 @@ _tx_initialize_low_level: LDR r1, =__tx_free_memory_start // Build first free address STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - LDR r0, =0xE000ED08 // Build address of NVIC registers - LDR r1, =__vector_table // Pickup address of vector table - STR r1, [r0] // Set vector table address - /* Enable the cycle count register. */ // LDR r0, =0xE0001000 // Build address of DWT register // LDR r1, [r0] // Pickup the current value // ORR r1, r1, #1 // Set the CYCCNTENA bit // STR r1, [r0] // Enable the cycle count register - /* Set system stack pointer from vector value. */ - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =__vector_table // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Configure SysTick. */ LDR r0, =0xE000E000 // Build address of NVIC registers + MOV r1, #0 // Build value for SysTick reset + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES STR r1, [r0, #0x14] // Setup SysTick Reload Value MOV r1, #0x7 // Build SysTick Control Enable Value diff --git a/ports/cortex_m23/iar/src/tx_thread_system_return.s b/ports/cortex_m23/iar/src/tx_thread_system_return.s index da4b6d04..165f71bf 100644 --- a/ports/cortex_m23/iar/src/tx_thread_system_return.s +++ b/ports/cortex_m23/iar/src/tx_thread_system_return.s @@ -9,7 +9,7 @@ ;* SPDX-License-Identifier: MIT ;************************************************************************** -; Some portions generated by Gemini (Gemini 2.0 Flash). +; Portions of this file were generated with AI assistance. ;************************************************************************** |