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Diffstat (limited to 'ports/rxv1/iar/src/tx_thread_interrupt_control.s')
-rw-r--r--ports/rxv1/iar/src/tx_thread_interrupt_control.s34
1 files changed, 11 insertions, 23 deletions
diff --git a/ports/rxv1/iar/src/tx_thread_interrupt_control.s b/ports/rxv1/iar/src/tx_thread_interrupt_control.s
index 3c510df7..bd945bfc 100644
--- a/ports/rxv1/iar/src/tx_thread_interrupt_control.s
+++ b/ports/rxv1/iar/src/tx_thread_interrupt_control.s
@@ -1,18 +1,18 @@
;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation
-; *
+; * Copyright (c) 2024 Microsoft Corporation
+; *
; * This program and the accompanying materials are made available under the
; * terms of the MIT License which is available at
; * https://opensource.org/licenses/MIT.
-; *
+; *
; * SPDX-License-Identifier: MIT
; **************************************************************************/
;
;
;/**************************************************************************/
;/**************************************************************************/
-;/** */
-;/** ThreadX Component */
+;/** */
+;/** ThreadX Component */
;/** */
;/** Thread */
;/** */
@@ -51,18 +51,6 @@
;/* */
;/* Application Code */
;/* */
-;/* RELEASE HISTORY */
-;/* */
-;/* DATE NAME DESCRIPTION */
-;/* */
-;/* 08-02-2021 William E. Lamie Initial Version 6.1.8 */
-;/* 10-15-2021 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.9 */
-;/* 01-31-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.10 */
-;/* 04-25-2022 William E. Lamie Modified comment(s), */
-;/* resulting in version 6.1.11 */
-;/* */
;/**************************************************************************/
;UINT _tx_thread_interrupt_control(UINT new_posture)
;{
@@ -71,20 +59,20 @@ __tx_thread_interrupt_control:
;
; /* Pickup current interrupt lockout posture. */
;
-
+
MVFC PSW, R2 ; Save PSW to R2
MOV.L R2, R3 ; Make a copy of PSW in r3
-
+
;
; /* Apply the new interrupt posture. */
;
-
+
BTST #16, R1 ; Test I bit of PSW of "new posture"
BMNE #16, R2 ; Conditionally set I bit of intermediate posture
-
+
MVTC R2, PSW ; Save intermediate posture to PSW
-
- MOV.L R3,R1 ; Get original SR
+
+ MOV.L R3,R1 ; Get original SR
RTS ; Return to caller
;}
END