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Diffstat (limited to 'ports/xtensa/xcc/src/tx_clib_lock.c')
-rw-r--r--ports/xtensa/xcc/src/tx_clib_lock.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/ports/xtensa/xcc/src/tx_clib_lock.c b/ports/xtensa/xcc/src/tx_clib_lock.c
index 072cbd52..b95bf12b 100644
--- a/ports/xtensa/xcc/src/tx_clib_lock.c
+++ b/ports/xtensa/xcc/src/tx_clib_lock.c
@@ -35,6 +35,10 @@
/* DATE NAME DESCRIPTION */
/* */
/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */
+/* 12-31-2023 Xiuwen Cai Modified comment(s), and */
+/* added error handling in */
+/* lock initialization, */
+/* resulting in version 6.4.0 */
/* */
/**************************************************************************/
@@ -155,6 +159,8 @@ _Mtxinit (_Rmtx * mtx)
if (lcnt >= XT_NUM_CLIB_LOCKS) {
/* Fatal error */
+ *mtx = NULL;
+ return;
}
lock = &(xclib_locks[lcnt]);