diff options
Diffstat (limited to 'ports_module/cortex-m7/ac5')
3 files changed, 22 insertions, 4 deletions
diff --git a/ports_module/cortex-m7/ac5/inc/tx_port.h b/ports_module/cortex-m7/ac5/inc/tx_port.h index 0962e1d9..ee66d1fe 100644 --- a/ports_module/cortex-m7/ac5/inc/tx_port.h +++ b/ports_module/cortex-m7/ac5/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* */ /* AUTHOR */ /* */ @@ -48,6 +48,9 @@ /* DATE NAME DESCRIPTION */ /* */ /* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ +/* macro definition, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ @@ -424,7 +427,7 @@ VOID _tx_thread_interrupt_restore(UIN #else -#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked; +#define TX_INTERRUPT_SAVE_AREA UINT was_masked; #define TX_DISABLE was_masked = __disable_irq(); #define TX_RESTORE if (was_masked == 0) __enable_irq(); diff --git a/ports_module/cortex-m7/ac5/inc/txm_module_port.h b/ports_module/cortex-m7/ac5/inc/txm_module_port.h index defc6a49..d876f338 100644 --- a/ports_module/cortex-m7/ac5/inc/txm_module_port.h +++ b/ports_module/cortex-m7/ac5/inc/txm_module_port.h @@ -107,11 +107,17 @@ The following extensions must also be defined in tx_port.h: /* For the following 3 access control settings, change TEX and C, B, S (bits 21 through 16 of MPU_RASR) * to reflect your system memory attributes (cache, shareable, memory type). */ /* Code region access control: privileged read-only, outer & inner write-back, normal memory, shareable. */ +#ifndef TXM_MODULE_MPU_CODE_ACCESS_CONTROL #define TXM_MODULE_MPU_CODE_ACCESS_CONTROL 0x06070000 +#endif /* Data region access control: execute never, read/write, outer & inner write-back, normal memory, shareable. */ +#ifndef TXM_MODULE_MPU_DATA_ACCESS_CONTROL #define TXM_MODULE_MPU_DATA_ACCESS_CONTROL 0x13070000 +#endif /* Shared region access control: execute never, read-only, outer & inner write-back, normal memory, shareable. */ +#ifndef TXM_MODULE_MPU_SHARED_ACCESS_CONTROL #define TXM_MODULE_MPU_SHARED_ACCESS_CONTROL 0x12070000 +#endif /* Define constants specific to the tools the module can be built with for this particular modules port. */ diff --git a/ports_module/cortex-m7/ac5/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex-m7/ac5/module_manager/src/txm_module_manager_mm_register_setup.c index 8afa4571..3dce9ab7 100644 --- a/ports_module/cortex-m7/ac5/module_manager/src/txm_module_manager_mm_register_setup.c +++ b/ports_module/cortex-m7/ac5/module_manager/src/txm_module_manager_mm_register_setup.c @@ -461,7 +461,7 @@ UINT i; /* FUNCTION RELEASE */ /* */ /* _txm_module_manager_inside_data_check Cortex-M7/MPU/AC5 */ -/* 6.1 */ +/* 6.1.6 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ @@ -493,7 +493,10 @@ UINT i; /* */ /* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* 04-02-2021 Scott Larson Modified comments, added */ +/* check for overflow, */ +/* resulting in version 6.1.6 */ /* */ /**************************************************************************/ UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size) @@ -504,6 +507,12 @@ UINT num_shared_memory_mpu_entries; ALIGN_TYPE shared_memory_address_start; ALIGN_TYPE shared_memory_address_end; + /* Check for overflow. */ + if ((obj_ptr) > ((obj_ptr) + (obj_size))) + { + return(TX_FALSE); + } + /* Check if the object is inside the module data. */ if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) && ((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1))) |