diff options
Diffstat (limited to 'ports_module/cortex_m0+')
16 files changed, 83 insertions, 143 deletions
diff --git a/ports_module/cortex_m0+/ac6/example_build/sample_threadx/tx_initialize_low_level.S b/ports_module/cortex_m0+/ac6/example_build/sample_threadx/tx_initialize_low_level.S index 0c6c1e74..ce314822 100644 --- a/ports_module/cortex_m0+/ac6/example_build/sample_threadx/tx_initialize_low_level.S +++ b/ports_module/cortex_m0+/ac6/example_build/sample_threadx/tx_initialize_low_level.S @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -21,7 +22,6 @@ /**************************************************************************/ - .global _tx_thread_system_stack_ptr .global _tx_initialize_unused_memory .global _tx_timer_interrupt .global __main @@ -93,19 +93,6 @@ _tx_initialize_low_level: ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - - LDR r0, =0xE000ED08 // Build address of NVIC registers - LDR r1, =vector_table // Pickup address of vector table - STR r1, [r0] // Set vector table address - - /* Set system stack pointer from vector value. */ - - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =vector_table // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Enable the cycle count register. */ LDR r0, =0xE0001000 // Build address of DWT register @@ -117,6 +104,9 @@ _tx_initialize_low_level: /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES MOVS r2, #0x14 STR r1, [r0, r2] // Setup SysTick Reload Value diff --git a/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch b/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch index d4fd4e3d..c622a729 100644 --- a/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch +++ b/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch @@ -207,25 +207,10 @@ <listEntry value="element formatter"/> <listEntry value="Hexadecimal"/> </listAttribute> - <listAttribute key="TREE_NODE_PROPERTIES:debugger.view.VariableTreeView"> - <listEntry value="NODE CACHE VERSION 1"/> - <listEntry value="LOCALS:Locals:VALUE:C:/test/common_modules/module_manager/src/txm_module_manager_kernel_dispatch.c::_txm_module_manager_tx_queue_receive_dispatch::param_0"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/test/common_modules/module_lib/src/txm_queue_create.c::_txe_queue_create::extra_parameters"/> - <listEntry value="1"/> - <listEntry value="element formatter"/> - <listEntry value="Unsigned Decimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/test/common_modules/module_lib/src/txm_queue_create.c::_txe_queue_create::queue_control_block_size"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - </listAttribute> <booleanAttribute key="VFS_ENABLED" value="true"/> <stringAttribute key="VFS_LOCAL_DIR" value="${workspace_loc}"/> <stringAttribute key="VFS_REMOTE_MOUNT" value="/writeable"/> - <stringAttribute key="breakpoints" value="<?xml version="1.0" encoding="UTF-8"?> <breakpoints order="ALPHA"> 	<breakpoint ignorecount="0" threadenabled="no" core_list="" continue="no" verboseBreakpoints="yes" kind="SOURCEPOSITION"> 		<master_location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c" hostFile="C:\test\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module_manager\sample_threadx_module_manager.c" line="109"/> 		<location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c" hostFile="C:\test\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module_manager\sample_threadx_module_manager.c" line="109"/> 	</breakpoint> 	<breakpoint ignorecount="0" threadenabled="no" core_list="" continue="no" verboseBreakpoints="yes" kind="SOURCEPOSITION"> 		<master_location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/module_manager/src/tx_thread_schedule.S" hostFile="C:\test\ports_module\cortex_m0+\ac6\module_manager\src\tx_thread_schedule.S" line="118"/> 		<location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/module_manager/src/tx_thread_schedule.S" hostFile="C:\test\ports_module\cortex_m0+\ac6\module_manager\src\tx_thread_schedule.S" line="118"/> 	</breakpoint> 	<breakpoint ignorecount="0" threadenabled="no" core_list="" continue="no" verboseBreakpoints="yes" kind="SOURCEPOSITION"> 		<master_location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c" hostFile="C:\test\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module_manager\sample_threadx_module_manager.c" line="124"/> 		<location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c" hostFile="C:\test\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module_manager\sample_threadx_module_manager.c" line="124"/> 	</breakpoint> 	<breakpoint ignorecount="0" threadenabled="no" core_list="" continue="no" verboseBreakpoints="yes" kind="SOURCEPOSITION"> 		<master_location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module/sample_threadx_module.c" hostFile="C:\test\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module\sample_threadx_module.c" line="298"/> 		<location index="0" enabled="true" version="2" debugFile="C:/test/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module/sample_threadx_module.c" hostFile="C:\test\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module\sample_threadx_module.c" line="298"/> 	</breakpoint> 	<breakpoint ignorecount="0" threadenabled="no" core_list="" continue="no" verboseBreakpoints="yes" kind="SOURCEPOSITION"> 		<master_location index="0" enabled="true" version="2" address="0x000144C2" debugFile="C:/Azure-IoT/threadx/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c" hostFile="C:\Azure-IoT\threadx\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module_manager\sample_threadx_module_manager.c" line="53" function="module_fault_handler"/> 		<location index="0" enabled="true" version="2" address="0x000144C2" debugFile="C:/Azure-IoT/threadx/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c" hostFile="C:\Azure-IoT\threadx\ports_module\cortex_m0+\ac6\example_build\sample_threadx_module_manager\sample_threadx_module_manager.c" line="53" function="module_fault_handler"/> 	</breakpoint> </breakpoints> "/> + <stringAttribute key="breakpoints" value="<?xml version="1.0" encoding="UTF-8"?> <breakpoints order="ALPHA"> </breakpoints> "/> <listAttribute key="com.arm.debug.views.common.AddressTracker.debugger.view.DisassemblyView.addresses"> <listEntry value="<Next Instruction>"/> <listEntry value="<Next Instruction>"/> diff --git a/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S b/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S index dcc369ae..18cce85c 100644 --- a/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S +++ b/ports_module/cortex_m0+/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -21,7 +22,6 @@ /**************************************************************************/ - .global _tx_thread_system_stack_ptr .global _tx_initialize_unused_memory .global _tx_timer_interrupt .global __main @@ -93,20 +93,6 @@ _tx_initialize_low_level: ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - - LDR r0, =0xE000E000 // Build address of NVIC registers - LDR r1, =vector_table // Pickup address of vector table - LDR r2, =0xD08 - STR r1, [r0, r2] // Set vector table address - - /* Set system stack pointer from vector value. */ - - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =vector_table // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Enable the cycle count register. */ LDR r0, =0xE0001000 // Build address of DWT register @@ -118,6 +104,9 @@ _tx_initialize_low_level: /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES MOVS r2, #0x14 STR r1, [r0, r2] // Setup SysTick Reload Value diff --git a/ports_module/cortex_m0+/ac6/inc/tx_port.h b/ports_module/cortex_m0+/ac6/inc/tx_port.h index 233662b4..b7eb1061 100644 --- a/ports_module/cortex_m0+/ac6/inc/tx_port.h +++ b/ports_module/cortex_m0+/ac6/inc/tx_port.h @@ -509,7 +509,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0+/AC6 Version 6.5.1.202602a *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0+/AC6 Version 6.5.2.202603 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports_module/cortex_m0+/gnu/example_build/sample_threadx/sample_threadx.launch b/ports_module/cortex_m0+/gnu/example_build/sample_threadx/sample_threadx.launch index 1dab0b65..8527f632 100644 --- a/ports_module/cortex_m0+/gnu/example_build/sample_threadx/sample_threadx.launch +++ b/ports_module/cortex_m0+/gnu/example_build/sample_threadx/sample_threadx.launch @@ -126,7 +126,7 @@ <booleanAttribute key="VFS_ENABLED" value="true"/> <stringAttribute key="VFS_LOCAL_DIR" value="${workspace_loc}"/> <stringAttribute key="VFS_REMOTE_MOUNT" value="/writeable"/> - <stringAttribute key="breakpoints" value="<?xml version="1.0" encoding="UTF-8"?> <breakpoints order="ALPHA"> 	<breakpoint ignorecount="0" threadenabled="no" core_list="" continue="no" verboseBreakpoints="yes" kind="SOURCEPOSITION"> 		<master_location index="0" enabled="true" version="2" address="0x000008D2" debugFile="C:/azure_rtos/threadx/common/src/tx_thread_initialize.c" hostFile="C:\azure_rtos\threadx\common\src\tx_thread_initialize.c" line="352" function="_tx_thread_initialize"/> 		<location index="0" enabled="false" version="2" address="0x0000092C" debugFile="C:/azure_rtos/threadx/common/src/tx_thread_initialize.c" hostFile="C:\azure_rtos\threadx\common\src\tx_thread_initialize.c" line="352" function="_tx_thread_initialize"/> 	</breakpoint> 	<breakpoint ignorecount="0" threadenabled="no" core_list="" continue="no" verboseBreakpoints="yes" kind="SOURCEPOSITION"> 		<master_location index="0" enabled="true" version="2" address="0x00000880" debugFile="C:/azure_rtos/threadx/common/src/tx_initialize_kernel_enter.c" hostFile="C:\azure_rtos\threadx\common\src\tx_initialize_kernel_enter.c" line="132" function="_tx_initialize_kernel_enter"/> 		<location index="0" enabled="true" version="2" address="0x00000880" debugFile="C:/azure_rtos/threadx/common/src/tx_initialize_kernel_enter.c" hostFile="C:\azure_rtos\threadx\common\src\tx_initialize_kernel_enter.c" line="132" function="_tx_initialize_kernel_enter"/> 	</breakpoint> </breakpoints> "/> + <stringAttribute key="breakpoints" value="<?xml version="1.0" encoding="UTF-8"?> <breakpoints order="ALPHA"> </breakpoints> "/> <listAttribute key="com.arm.debug.views.common.AddressTracker.debugger.view.DisassemblyView.addresses"> <listEntry value="<Next Instruction>"/> <listEntry value="<Next Instruction>"/> diff --git a/ports_module/cortex_m0+/gnu/example_build/sample_threadx/tx_initialize_low_level.S b/ports_module/cortex_m0+/gnu/example_build/sample_threadx/tx_initialize_low_level.S index 445f77cf..45f911be 100644 --- a/ports_module/cortex_m0+/gnu/example_build/sample_threadx/tx_initialize_low_level.S +++ b/ports_module/cortex_m0+/gnu/example_build/sample_threadx/tx_initialize_low_level.S @@ -8,6 +8,7 @@ * * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -21,12 +22,10 @@ /**************************************************************************/ - .global _tx_thread_system_stack_ptr .global _tx_initialize_unused_memory .global __RAM_segment_used_end__ .global _tx_timer_interrupt .global __main - .global _vectors .global __tx_NMIHandler // NMI .global __tx_BadHandler // HardFault .global __tx_SVCallHandler // SVCall @@ -95,19 +94,6 @@ _tx_initialize_low_level: ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - - LDR r0, =0xE000ED08 // Build address of NVIC registers - LDR r1, =_vectors // Pickup address of vector table - STR r1, [r0] // Set vector table address - - /* Set system stack pointer from vector value. */ - - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =_vectors // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Enable the cycle count register. */ LDR r0, =0xE0001000 // Build address of DWT register @@ -119,6 +105,9 @@ _tx_initialize_low_level: /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES MOVS r2, #0x14 STR r1, [r0, r2] // Setup SysTick Reload Value diff --git a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/gcc_setup.s b/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/gcc_setup.s index 013e5825..e5459dae 100644 --- a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/gcc_setup.s +++ b/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/gcc_setup.s @@ -1,4 +1,6 @@ +// Portions of this file were generated with AI assistance. + .text .align 4 .syntax unified @@ -73,6 +75,46 @@ got_setup_done: movs r2, #0 bl crt0_memory_set + /* Apply the R_ARM_RELATIVE relocations that target the module data area. */ + + ldr r3, =__FLASH_segment_start__ // crt0_memory_copy used r3 as a scratch register + ldr r0, =__reldyn_load_start__ + subs r0,r0,r3 + add r0,r0,r5 + ldr r1, =__reldyn_end__ + subs r1,r1,r3 + add r1,r1,r5 + +new_reldyn_setup: + cmp r0, r1 // See if there are more relocation entries + beq reldyn_setup_done // No, done with the relocations + ldr r6, [r0] // Pickup the r_offset field + ldr r7, [r0, #4] // Pickup the r_info field + adds r0, r0, #8 // Move to the next entry + uxtb r7, r7 // The relocation type is in the low byte + cmp r7, #23 // Is it R_ARM_RELATIVE? + bne new_reldyn_setup // No, only R_ARM_RELATIVE is supported + cmp r6, r4 // Does it target the code or the data area? + blt new_reldyn_setup // The code area is shared and read-only, skip it + subs r6, r6, r4 // Compute offset of data area + add r6, r6, r9 // Build the address of the word to relocate + ldr r7, [r6] // Pickup the link time address stored there + cmp r7, #0 // Is it 0? + beq new_reldyn_setup // Yes, just skip the adjustment + cmp r7, r4 // Is it in the code or data area? + blt reldyn_flash_area // If less than, it is a code address + subs r7, r7, r4 // Compute offset of data area + add r7, r7, r9 // Build address based on the loaded data address + b reldyn_built // Finished building address +reldyn_flash_area: + subs r7, r7, r3 // Compute offset of code area + add r7, r7, r5 // Build address based on the loaded code address +reldyn_built: + str r7, [r6] // Store the relocated address back + b new_reldyn_setup // Continue at the top of the loop +reldyn_setup_done: + + /* Setup heap - not recommended for Threadx but here for compatibility reasons */ diff --git a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/sample_threadx_module.ld b/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/sample_threadx_module.ld index 96320525..afc903aa 100644 --- a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/sample_threadx_module.ld +++ b/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module/sample_threadx_module.ld @@ -211,5 +211,13 @@ SECTIONS __data_size__ = __heap_end__ - __RAM_segment_start__; + /* The dynamic linking metadata is not used by the module manager. Discarding + it keeps it out of the binary image produced from this ELF file. */ + + /DISCARD/ : + { + *(.dynamic) + } + } diff --git a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/libgcc.a b/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/libgcc.a Binary files differdeleted file mode 100644 index b2d68d68..00000000 --- a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/libgcc.a +++ /dev/null diff --git a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch b/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch index debe6d72..13be6145 100644 --- a/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch +++ b/ports_module/cortex_m0+/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.launch @@ -209,53 +209,10 @@ <listEntry value="element formatter"/> <listEntry value="Hexadecimal"/> </listAttribute> - <listAttribute key="TREE_NODE_PROPERTIES:debugger.view.VariableTreeView"> - <listEntry value="NODE CACHE VERSION 1"/> - <listEntry value="LOCALS:Locals:VALUE:C:/test/common_modules/module_manager/src/txm_module_manager_kernel_dispatch.c::_txm_module_manager_tx_queue_receive_dispatch::param_0"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/test/common_modules/module_lib/src/txm_queue_create.c::_txe_queue_create::extra_parameters"/> - <listEntry value="1"/> - <listEntry value="element formatter"/> - <listEntry value="Unsigned Decimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/test/common_modules/module_lib/src/txm_queue_create.c::_txe_queue_create::queue_control_block_size"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/azure_rtos/threadx/ports_module/cortex_m0+/gnu/module_manager/src/txm_module_manager_alignment_adjust.c::_txm_module_manager_alignment_adjust::local_code_size"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/azure_rtos/threadx/common_modules/module_manager/src/txm_module_manager_util.c::_txm_module_manager_util_code_allocation_size_and_alignment_get::code_alignment"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/azure_rtos/threadx/common_modules/module_manager/src/txm_module_manager_in_place_load.c::_txm_module_manager_in_place_load::module_preamble:VALUE:C:/azure_rtos/threadx/common_modules/module_manager/src/txm_module_manager_in_place_load.c::_txm_module_manager_in_place_load::module_preamble->txm_module_preamble_reserved_12"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/azure_rtos/threadx/common_modules/module_manager/src/txm_module_manager_in_place_load.c::_txm_module_manager_in_place_load::code_size"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/azure_rtos/threadx/common_modules/module_manager/src/txm_module_manager_in_place_load.c::_txm_module_manager_in_place_load::code_alignment"/> - <listEntry value="1"/> - <listEntry value="formatter"/> - <listEntry value="Hexadecimal"/> - <listEntry value="LOCALS:Locals:VALUE:C:/azure_rtos/threadx/common_modules/module_manager/src/txm_module_manager_in_place_load.c::_txm_module_manager_in_place_load::module_preamble:VALUE:C:/azure_rtos/threadx/common_modules/module_manager/src/txm_module_manager_in_place_load.c::_txm_module_manager_in_place_load::module_preamble->txm_module_preamble_id"/> - <listEntry value="1"/> - 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SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ @@ -21,12 +22,10 @@ /**************************************************************************/ - .global _tx_thread_system_stack_ptr .global _tx_initialize_unused_memory .global __RAM_segment_used_end__ .global _tx_timer_interrupt .global __main - .global _vectors .global __tx_NMIHandler // NMI .global __tx_BadHandler // HardFault .global __tx_SVCallHandler // SVCall @@ -95,19 +94,6 @@ _tx_initialize_low_level: ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - - LDR r0, =0xE000ED08 // Build address of NVIC registers - LDR r1, =_vectors // Pickup address of vector table - STR r1, [r0] // Set vector table address - - /* Set system stack pointer from vector value. */ - - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =_vectors // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Enable the cycle count register. */ LDR r0, =0xE0001000 // Build address of DWT register @@ -119,6 +105,9 @@ _tx_initialize_low_level: /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES MOVS r2, #0x14 STR r1, [r0, r2] // Setup SysTick Reload Value diff --git a/ports_module/cortex_m0+/gnu/inc/tx_port.h b/ports_module/cortex_m0+/gnu/inc/tx_port.h index fa3fd719..6e1d9b76 100644 --- a/ports_module/cortex_m0+/gnu/inc/tx_port.h +++ b/ports_module/cortex_m0+/gnu/inc/tx_port.h @@ -523,7 +523,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0+/AC6 Version 6.5.1.202602a *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0+/AC6 Version 6.5.2.202603 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports_module/cortex_m0+/iar/example_build/tx_initialize_low_level.s b/ports_module/cortex_m0+/iar/example_build/tx_initialize_low_level.s index 16404d63..2f7c98c8 100644 --- a/ports_module/cortex_m0+/iar/example_build/tx_initialize_low_level.s +++ b/ports_module/cortex_m0+/iar/example_build/tx_initialize_low_level.s @@ -1,5 +1,6 @@ ;/*************************************************************************** ; * Copyright (c) 2024 Microsoft Corporation +; * Copyright (c) 2026-present Eclipse ThreadX contributors ; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at @@ -7,6 +8,7 @@ ; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ +; Portions of this file were generated with AI assistance. ; ; ;/**************************************************************************/ @@ -30,10 +32,8 @@ ;#include "tx_timer.h" ; ; - EXTERN _tx_thread_system_stack_ptr EXTERN _tx_initialize_unused_memory EXTERN _tx_timer_interrupt - EXTERN __vector_table EXTERN _tx_execution_isr_enter EXTERN _tx_execution_isr_exit ; @@ -99,19 +99,6 @@ _tx_initialize_low_level: ADDS r1, r1, #4 // STR r1, [r0] // Setup first unused memory pointer - /* Setup Vector Table Offset Register. */ - - LDR r0, =0xE000ED08 // Build address of NVIC registers - LDR r1, =__vector_table // Pickup address of vector table - STR r1, [r0] // Set vector table address - - /* Set system stack pointer from vector value. */ - - LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer - LDR r1, =__vector_table // Pickup address of vector table - LDR r1, [r1] // Pickup reset stack pointer - STR r1, [r0] // Save system stack pointer - /* Enable the cycle count register. */ LDR r0, =0xE0001000 // Build address of DWT register @@ -123,6 +110,9 @@ _tx_initialize_low_level: /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ LDR r0, =0xE000E000 // Build address of NVIC registers + LDR r1, =0 + STR r1, [r0, #0x10] // Reset SysTick Control + STR r1, [r0, #0x18] // Reset SysTick Counter Value LDR r1, =SYSTICK_CYCLES MOVS r2, #0x14 STR r1, [r0, r2] // Setup SysTick Reload Value diff --git a/ports_module/cortex_m0+/iar/example_build/txm.ewp b/ports_module/cortex_m0+/iar/example_build/txm.ewp index e13721eb..12463c9e 100644 --- a/ports_module/cortex_m0+/iar/example_build/txm.ewp +++ b/ports_module/cortex_m0+/iar/example_build/txm.ewp @@ -1048,7 +1048,7 @@ </option> <option> <name>IarchiveOutput</name> - <state>C:\azure_rtos\threadx\ports_module\cortex_m0+\iar\example_build\Debug\Exe\txm.a</state> + <state>###Unitialized###</state> </option> </data> </settings> diff --git a/ports_module/cortex_m0+/iar/inc/tx_port.h b/ports_module/cortex_m0+/iar/inc/tx_port.h index 63ba51e4..15073a78 100644 --- a/ports_module/cortex_m0+/iar/inc/tx_port.h +++ b/ports_module/cortex_m0+/iar/inc/tx_port.h @@ -559,7 +559,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0+/IAR Version 6.5.1.202602a *"; + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-M0+/IAR Version 6.5.2.202603 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports_module/cortex_m0+/iar/module_manager/src/tx_iar.c b/ports_module/cortex_m0+/iar/module_manager/src/tx_iar.c index 238b485e..ab6c209c 100644 --- a/ports_module/cortex_m0+/iar/module_manager/src/tx_iar.c +++ b/ports_module/cortex_m0+/iar/module_manager/src/tx_iar.c @@ -9,6 +9,7 @@ * SPDX-License-Identifier: MIT **************************************************************************/ +// Portions of this file were generated with AI assistance. /**************************************************************************/ /**************************************************************************/ @@ -270,7 +271,7 @@ TX_MUTEX *mutex_ptr; mutex_ptr = &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++]; /* Check for wrap-around on the next free mutex. */ - if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK) + if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK) { /* Yes, set the free index back to 0. */ @@ -287,7 +288,7 @@ TX_MUTEX *mutex_ptr; } /* Determine if a free mutex was found. */ - if (i >= _MAX_LOCK) + if (i >= _MAX_FLOCK) { /* Error! No more free mutexes! */ @@ -678,7 +679,7 @@ TX_MUTEX *mutex_ptr; mutex_ptr = &__tx_iar_file_lock_mutexes[__tx_iar_file_lock_next_free_mutex++]; /* Check for wrap-around on the next free mutex. */ - if (__tx_iar_file_lock_next_free_mutex >= _MAX_LOCK) + if (__tx_iar_file_lock_next_free_mutex >= _MAX_FLOCK) { /* Yes, set the free index back to 0. */ @@ -695,7 +696,7 @@ TX_MUTEX *mutex_ptr; } /* Determine if a free mutex was found. */ - if (i >= _MAX_LOCK) + if (i >= _MAX_FLOCK) { /* Error! No more free mutexes! */ |