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-rw-r--r--ports_module/cortex_m33/ac6/inc/tx_port.h11
-rw-r--r--ports_module/cortex_m33/ac6/module_manager/src/tx_thread_schedule.S7
-rw-r--r--ports_module/cortex_m33/ac6/module_manager/src/txm_module_manager_mm_register_setup.c23
-rw-r--r--ports_module/cortex_m33/gnu/inc/tx_port.h2
-rw-r--r--ports_module/cortex_m33/gnu/module_manager/src/tx_thread_schedule.S7
-rw-r--r--ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_mm_register_setup.c23
-rw-r--r--ports_module/cortex_m33/iar/inc/tx_port.h2
-rw-r--r--ports_module/cortex_m33/iar/module_manager/src/tx_thread_schedule.s7
-rw-r--r--ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_mm_register_setup.c23
9 files changed, 78 insertions, 27 deletions
diff --git a/ports_module/cortex_m33/ac6/inc/tx_port.h b/ports_module/cortex_m33/ac6/inc/tx_port.h
index c0b14d97..c084ba00 100644
--- a/ports_module/cortex_m33/ac6/inc/tx_port.h
+++ b/ports_module/cortex_m33/ac6/inc/tx_port.h
@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M33/AC6 */
-/* 6.1.3 */
+/* 6.1.6 */
/* */
/* AUTHOR */
/* */
@@ -47,7 +47,10 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
-/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 09-30-2020 Scott Larson Initial Version 6.1 */
+/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */
+/* macro definition, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
@@ -538,7 +541,7 @@ VOID _tx_thread_interrupt_restore(UIN
#else
-#define TX_INTERRUPT_SAVE_AREA unsigned int was_masked;
+#define TX_INTERRUPT_SAVE_AREA UINT was_masked;
#define TX_DISABLE was_masked = __disable_irq();
#define TX_RESTORE if (was_masked == 0) __enable_irq();
@@ -567,7 +570,7 @@ unsigned int was_masked;
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
- "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC6 Version 6.1 *";
+ "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M33/AC6 Version 6.1.6 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];
diff --git a/ports_module/cortex_m33/ac6/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_m33/ac6/module_manager/src/tx_thread_schedule.S
index 97c313b4..9a65319b 100644
--- a/ports_module/cortex_m33/ac6/module_manager/src/tx_thread_schedule.S
+++ b/ports_module/cortex_m33/ac6/module_manager/src/tx_thread_schedule.S
@@ -26,7 +26,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M33/MPU/AC6 */
-/* 6.1.3 */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -59,6 +59,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 04-02-2021 Scott Larson Modified comments and fixed */
+/* MPU region configuration, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -379,6 +382,8 @@ _skip_secure_restore:
LDR r1, =0xE000ED9C // Build address of MPU base register
// Use alias registers to quickly load MPU
+ LDR r2, =0xE000ED98 // Get region register
+ STR r3, [r2] // Set region to 0
ADD r0, r0, #0x64 // Build address of MPU register start in thread control block
LDM r0!, {r2-r9} // Load first four MPU regions
STM r1, {r2-r9} // Store first four MPU regions
diff --git a/ports_module/cortex_m33/ac6/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_m33/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
index a38602d9..4bd99c30 100644
--- a/ports_module/cortex_m33/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
+++ b/ports_module/cortex_m33/ac6/module_manager/src/txm_module_manager_mm_register_setup.c
@@ -29,8 +29,8 @@
/* */
/* FUNCTION RELEASE */
/* */
-/* _txm_module_manager_mm_register_setup Cortex-M33/MPU */
-/* 6.1.3 */
+/* _txm_module_manager_mm_register_setup Cortex-M33/Generic */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -60,7 +60,10 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
-/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 04-02-2021 Scott Larson Modified comments and check */
+/* for overflow, */
+/* resulting 6.1.6 */
/* */
/**************************************************************************/
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
@@ -120,8 +123,8 @@ ULONG callback_stack_size;
/* */
/* FUNCTION RELEASE */
/* */
-/* _txm_module_manager_inside_data_check Cortex-M33/MPU/AC6 */
-/* 6.1.3 */
+/* _txm_module_manager_inside_data_check Cortex-M33/Generic */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -153,7 +156,9 @@ ULONG callback_stack_size;
/* */
/* DATE NAME DESCRIPTION */
/* */
-/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 04-02-2021 Scott Larson Modified comments, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
@@ -164,6 +169,12 @@ UINT num_shared_memory_mpu_entries;
ALIGN_TYPE shared_memory_address_start;
ALIGN_TYPE shared_memory_address_end;
+ /* Check for overflow. */
+ if ((obj_ptr) > ((obj_ptr) + (obj_size)))
+ {
+ return(TX_FALSE);
+ }
+
/* Check if the object is inside the module data. */
if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) &&
((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1)))
diff --git a/ports_module/cortex_m33/gnu/inc/tx_port.h b/ports_module/cortex_m33/gnu/inc/tx_port.h
index 54b785b9..3b336daa 100644
--- a/ports_module/cortex_m33/gnu/inc/tx_port.h
+++ b/ports_module/cortex_m33/gnu/inc/tx_port.h
@@ -648,7 +648,7 @@ unsigned int interrupt_save;
}
-#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
+#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupt();
#define TX_RESTORE __restore_interrupt(interrupt_save);
diff --git a/ports_module/cortex_m33/gnu/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_m33/gnu/module_manager/src/tx_thread_schedule.S
index 179c80b8..f5c6224f 100644
--- a/ports_module/cortex_m33/gnu/module_manager/src/tx_thread_schedule.S
+++ b/ports_module/cortex_m33/gnu/module_manager/src/tx_thread_schedule.S
@@ -29,7 +29,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M33/MPU/GNU */
-/* 6.1.5 */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -62,6 +62,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
+/* 04-02-2021 Scott Larson Modified comments and fixed */
+/* MPU region configuration, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -382,6 +385,8 @@ _skip_secure_restore:
LDR r1, =0xE000ED9C // Build address of MPU base register
// Use alias registers to quickly load MPU
+ LDR r2, =0xE000ED98 // Get region register
+ STR r3, [r2] // Set region to 0
ADD r0, r0, #0x64 // Build address of MPU register start in thread control block
LDM r0!, {r2-r9} // Load first four MPU regions
STM r1, {r2-r9} // Store first four MPU regions
diff --git a/ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_mm_register_setup.c
index 3670dabb..4bd99c30 100644
--- a/ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_mm_register_setup.c
+++ b/ports_module/cortex_m33/gnu/module_manager/src/txm_module_manager_mm_register_setup.c
@@ -29,8 +29,8 @@
/* */
/* FUNCTION RELEASE */
/* */
-/* _txm_module_manager_mm_register_setup Cortex-M33/MPU */
-/* 6.1.5 */
+/* _txm_module_manager_mm_register_setup Cortex-M33/Generic */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -60,7 +60,10 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
-/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
+/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 04-02-2021 Scott Larson Modified comments and check */
+/* for overflow, */
+/* resulting 6.1.6 */
/* */
/**************************************************************************/
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
@@ -120,8 +123,8 @@ ULONG callback_stack_size;
/* */
/* FUNCTION RELEASE */
/* */
-/* _txm_module_manager_inside_data_check Cortex-M33/MPU */
-/* 6.1.5 */
+/* _txm_module_manager_inside_data_check Cortex-M33/Generic */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -153,7 +156,9 @@ ULONG callback_stack_size;
/* */
/* DATE NAME DESCRIPTION */
/* */
-/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
+/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 04-02-2021 Scott Larson Modified comments, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
@@ -164,6 +169,12 @@ UINT num_shared_memory_mpu_entries;
ALIGN_TYPE shared_memory_address_start;
ALIGN_TYPE shared_memory_address_end;
+ /* Check for overflow. */
+ if ((obj_ptr) > ((obj_ptr) + (obj_size)))
+ {
+ return(TX_FALSE);
+ }
+
/* Check if the object is inside the module data. */
if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) &&
((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1)))
diff --git a/ports_module/cortex_m33/iar/inc/tx_port.h b/ports_module/cortex_m33/iar/inc/tx_port.h
index 1a2730d2..5f592d5b 100644
--- a/ports_module/cortex_m33/iar/inc/tx_port.h
+++ b/ports_module/cortex_m33/iar/inc/tx_port.h
@@ -648,7 +648,7 @@ unsigned int interrupt_save;
}
-#define TX_INTERRUPT_SAVE_AREA unsigned int interrupt_save;
+#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
#define TX_DISABLE interrupt_save = __disable_interrupt();
#define TX_RESTORE __restore_interrupt(interrupt_save);
diff --git a/ports_module/cortex_m33/iar/module_manager/src/tx_thread_schedule.s b/ports_module/cortex_m33/iar/module_manager/src/tx_thread_schedule.s
index dc41aca1..09419cf0 100644
--- a/ports_module/cortex_m33/iar/module_manager/src/tx_thread_schedule.s
+++ b/ports_module/cortex_m33/iar/module_manager/src/tx_thread_schedule.s
@@ -42,7 +42,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_schedule Cortex-M33/MPU/IAR */
-/* 6.1.5 */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -75,6 +75,9 @@
/* DATE NAME DESCRIPTION */
/* */
/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
+/* 04-02-2021 Scott Larson Modified comments and fixed */
+/* MPU region configuration, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
// VOID _tx_thread_schedule(VOID)
@@ -383,6 +386,8 @@ _skip_secure_restore:
LDR r1, =0xE000ED9C // Build address of MPU base register
// Use alias registers to quickly load MPU
+ LDR r2, =0xE000ED98 // Get region register
+ STR r3, [r2] // Set region to 0
ADD r0, r0, #0x64 // Build address of MPU register start in thread control block
LDM r0!, {r2-r9} // Load first four MPU regions
STM r1, {r2-r9} // Store first four MPU regions
diff --git a/ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_mm_register_setup.c
index 0e844131..4bd99c30 100644
--- a/ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_mm_register_setup.c
+++ b/ports_module/cortex_m33/iar/module_manager/src/txm_module_manager_mm_register_setup.c
@@ -29,8 +29,8 @@
/* */
/* FUNCTION RELEASE */
/* */
-/* _txm_module_manager_mm_register_setup Cortex-M33/MPU */
-/* 6.1.5 */
+/* _txm_module_manager_mm_register_setup Cortex-M33/Generic */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -60,7 +60,10 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
-/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
+/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 04-02-2021 Scott Larson Modified comments and check */
+/* for overflow, */
+/* resulting 6.1.6 */
/* */
/**************************************************************************/
VOID _txm_module_manager_mm_register_setup(TXM_MODULE_INSTANCE *module_instance)
@@ -120,8 +123,8 @@ ULONG callback_stack_size;
/* */
/* FUNCTION RELEASE */
/* */
-/* _txm_module_manager_inside_data_check Cortex-M33/MPU/IAR */
-/* 6.1.5 */
+/* _txm_module_manager_inside_data_check Cortex-M33/Generic */
+/* 6.1.6 */
/* AUTHOR */
/* */
/* Scott Larson, Microsoft Corporation */
@@ -153,7 +156,9 @@ ULONG callback_stack_size;
/* */
/* DATE NAME DESCRIPTION */
/* */
-/* 03-02-2021 Scott Larson Initial Version 6.1.5 */
+/* 12-31-2020 Scott Larson Initial Version 6.1.3 */
+/* 04-02-2021 Scott Larson Modified comments, */
+/* resulting in version 6.1.6 */
/* */
/**************************************************************************/
UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance, ALIGN_TYPE obj_ptr, UINT obj_size)
@@ -164,6 +169,12 @@ UINT num_shared_memory_mpu_entries;
ALIGN_TYPE shared_memory_address_start;
ALIGN_TYPE shared_memory_address_end;
+ /* Check for overflow. */
+ if ((obj_ptr) > ((obj_ptr) + (obj_size)))
+ {
+ return(TX_FALSE);
+ }
+
/* Check if the object is inside the module data. */
if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) &&
((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1)))
generated by cgit v1.3.1 (git 2.54.0) at 2026-08-28 14:59:51 +0000