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* Updated version number constants
* Updated port version strings
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Co-authored-by: Copilot <[email protected]>
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* Fixed #else replaced with #endif in tx_port.h for cortex_m3/m4/m7 gnu/ac6/iar ports
In the __set_basepri_value/#ifdef TX_PORT_USE_BASEPRI block, an #else
directive was incorrectly replaced with #endif in a prior commit.
This caused the TX_PORT_USE_BASEPRI guard to close prematurely and
left __enable_interrupts unconditionally visible (or triggered an
orphaned #endif / missing #endif error at compile time).
Affected ports: cortex_m3/ac6, cortex_m3/iar, cortex_m4/ac6,
cortex_m4/gnu, cortex_m4/iar, cortex_m7/ac6, cortex_m7/gnu,
cortex_m7/iar.
For cortex_m3/gnu and cortex_m4/gnu the fix restores the #else and
the existing second #endif now correctly closes the block.
For the ac6/iar variants of m3/m4 and all m7 variants, the #else is
restored and a missing closing #endif is added after __enable_interrupts.
Also adds Linux shell build scripts (build_threadx.sh and
build_threadx_sample.sh) for the cortex_m3/gnu, cortex_m4/gnu, and
cortex_m7/gnu example_build directories as Linux equivalents of the
existing .bat files.
* Fixed missing linker script symbols in cortex_m4/gnu example_build
cortexm4_crt0.S references several symbols that were absent from
sample_threadx.ld, causing undefined-reference linker errors when
building the sample:
- __text_load_start__, __text_start__, __text_end__
- __rodata_load_start__, __rodata_start__, __rodata_end__
- __fast_load_start__, __fast_start__, __fast_end__
- __ctors_load_start__, __dtors_load_start__
Changes:
- Added __text_start__/__text_end__ bounds to the .text section and
__text_load_start__ via LOADADDR(.text).
- Moved .rodata out of .text into its own section with start/end/load
- Added __ctors_load_start__ and __dtors_load_start__ markers within
.text (load address == VMA since the section is XIP in FLASH; the
crt0 copy call becomes a no-op).
- Added an empty .fast section in RAM with __fast_load_start__ pointing
to __fast_start__ so the crt0 fast-copy call is a no-op.
* Added Linux build scripts and fixed path bug in cortex_m23 for all ports changed between v6.5.0 and v6.5.1
Added build_threadx.sh (and build_threadx_sample.sh where applicable)
as Linux equivalents of the Windows .bat scripts for all GNU-toolchain
ports touched between v6.5.0.202601_rel and v6.5.1.202602_rel:
arm9, arm11, cortex_a5/a7/a8/a9/a12/a15/a17,
cortex_m0, cortex_m23, cortex_r4, cortex_r5
For cortex_m33/m55/m85 (which had no .bat equivalent), build_threadx.sh
was written from scratch using the port CMakeLists.txt source lists and
the correct CPU flags (-mcpu=cortex-m33/m55/m85 -mthumb).
Also fixed a pre-existing bug in cortex_m23/gnu/example_build/
build_threadx.bat (and the generated .sh): tx_thread_stack_error_handler.c
and tx_thread_stack_error_notify.c were referenced as ../src/ (port
directory) instead of ../../../../common/src/ where they actually live.
All 16 newly added build_threadx.sh scripts were verified to compile
successfully with arm-none-eabi-gcc 13.2.1.
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Closes #545
Co-authored-by: Copilot <[email protected]>
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Applied the standard MIT license header to all project-owned C, header,
assembly, shell, and Python files that were missing a copyright notice.
Third-party, toolchain startup, and auto-generated files were excluded.
Co-authored-by: Copilot <[email protected]>
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* Updated version number constants
* Updated port version strings
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Co-authored-by: Copilot <[email protected]>
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- Introduce THREADX_SMP option in root CMakeLists.txt.
- Implement conditional source and port directory selection for SMP builds.
- Add CMake support for common_smp and Cortex-A9 SMP port.
- Fix linker flags in Cortex-A9 SMP sample build script.
- Remove duplicate invalidateCaches_IS declarations in v7.h headers.
Assisted-by: Gemini (Experimental)
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* Updated version number constants
* Removed revision history from all files
* Added Eclipse ThreadX contributors' copyright header
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When TX_ENABLE_VFP_SUPPORT is defined, the build fails due to missing
IRQ_MASK and FIQ_MASK symbols in the restore logic.
This adds the local definitions (0x80 and 0x40) to tx_thread_schedule.S
to match tx_thread_interrupt_restore.S, enabling successful compilation
on GNU and AC6 Cortex-A ports.
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* Update version number in API header
* Update release date and version
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* Added thumb mode support for threadX GNU ports on armv7a platforms.
https://msazure.visualstudio.com/One/_workitems/edit/26105175/
* move the swi interrupt to tx_initialize_low_level.S.
* update the test log.
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* Fixed the issue of the data/bss section cannot be read from ARM FVP debug tool in cortex-A7 GNU port.
https://msazure.visualstudio.com/One/_workitems/edit/24597276/
* remove untracked files.
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files (#250)
* Release ARMv7-A architecture ports
* Add tx_user.h to GNU port assembly files
* Update GitHub action to perform check for Cortex-A ports
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cee19603d Include tx_user.h conditionally.
e40e08007 Update owners
d69641273 Update release date and version
394aee52f Add tx_user.h to GNU port assembly files
5cca2ddd0 RISC-V 64 bit port for Microchip
e0f2c373c Link Winmm.lib that required by the high-resolution timer.
6af472a68 Update Win32 port with high resolution timer.
aea7b556a Add DMB ISH barrier inst in ARMv8-A SMP scheduler
19091a262 Add .section .preamble to m3 m4 m7 module ports
ced60e1b7 Add missing parenthesis in ports assembly file
309dc77ca Modules Cortex-A7 IAR new port
c752a4063 Modules Cortex-A7 GNU new port
dc224b90f Fix race condition in tx_thread_wait_abort and update regression test
6e261f5b7 create threadx cmsis-pack
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