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2026-06-08Release 6.5.1.202602a preparation (#547)Frédéric Desbiens
* Updated version number constants * Updated port version strings --------- Co-authored-by: Copilot <[email protected]>
2026-06-06Added copyright headers to files missing themFrédéric Desbiens
Applied the standard MIT license header to all project-owned C, header, assembly, shell, and Python files that were missing a copyright notice. Third-party, toolchain startup, and auto-generated files were excluded. Co-authored-by: Copilot <[email protected]>
2026-06-03Release 6.5.1.202602 preparation (#543)Frédéric Desbiens
* Updated version number constants * Updated port version strings --------- Co-authored-by: Copilot <[email protected]>
2026-04-15Merge pull request #278 from Polarisru/masterFrédéric Desbiens
Fixed SysTick initialization problem in tx_initialize_low_level.s for Cortex-M0.
2026-03-05Updated copyright headers and version number constants (#509)Frédéric Desbiens
* Updated version number constants * Removed revision history from all files * Added Eclipse ThreadX contributors' copyright header
2025-02-24Updated ports version to v6.4.2.Frédéric Desbiens
2024-09-05Comment style changed according to conversationAlex Kiselev
2024-02-27Update version number to 6.4.1TiejunZhou
2024-02-23Update the copyright for all assembly files.bo chen
2024-01-30Update version id string.Bo Chen (from Dev Box)
2024-01-29Update copyright.Bo Chen (from Dev Box)
2023-12-28Update release date and version (#338)TiejunZhou
* Update version number in API header * Update release date and version
2023-10-23Update release version to 6.3.0 and date to 10-31-2023 (#308)v6.3.0_relTiejunZhou
2023-06-21SysTick initialization problem fixed in tx_initialize_low_level.sAlex Kiselev
Problem with first system tick was detected, it needs much more time for the first tick as it's defined. The reason for this behavior is incorrect initialization of the SysTick timer in the port file for the Cortex-M0. It doesn't reset the SysTick Current Value Register despite the fact that its value is not initialized at startup (see https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/system-timer--systick). So if we have 0xFFFFFF (this register has 24-bit), it means we will get about 256*256*256 / 48000000 for the tact frequency of 48MHz to reach the zero, that makes 350ms delay at startup.
2023-03-08Release 6.2.1 on 08 Mar 2023. Expand to see details.v6.2.1_relTiejun Zhou
cee19603d Include tx_user.h conditionally. e40e08007 Update owners d69641273 Update release date and version 394aee52f Add tx_user.h to GNU port assembly files 5cca2ddd0 RISC-V 64 bit port for Microchip e0f2c373c Link Winmm.lib that required by the high-resolution timer. 6af472a68 Update Win32 port with high resolution timer. aea7b556a Add DMB ISH barrier inst in ARMv8-A SMP scheduler 19091a262 Add .section .preamble to m3 m4 m7 module ports ced60e1b7 Add missing parenthesis in ports assembly file 309dc77ca Modules Cortex-A7 IAR new port c752a4063 Modules Cortex-A7 GNU new port dc224b90f Fix race condition in tx_thread_wait_abort and update regression test 6e261f5b7 create threadx cmsis-pack
2022-04-20Release 6.1.11Yuxin Zhou
2021-10-14Release 6.1.9Yuxin Zhou
2021-07-28Release 6.1.8v6.1.8_relYuxin Zhou
2021-06-02Release 6.1.7Bo Chen
2021-04-03Release 6.1.6v6.1.6_relYuxin Zhou
2021-03-05update readmes and fix compilation for Keil/AC5Scott Larson
2021-03-05Release 6.1.5v6.1.5_relYuxin Zhou
2020-09-306.1 minor releaseScott Larson
2020-08-14apply 6.0.2 patchScott Larson
2020-07-16updated to 6.0.1 and added additional processors/toolchainstameraw