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ThreadX still declares 6.5.1.202602 with hotfix 'a', which is the previous
release rather than the one being cut.
prepare_release.sh updated the five version constants in tx_api.h and the
version string in 211 port headers across ports, ports_smp, ports_arch and
ports_module. The hotfix letter is cleared, since the target has none. Nothing
else changed: every line in the port commit carries a version, and no file
outside an inc/tx_port.h was touched.
The port consistency checks passed before the branch was cut, which is what the
script gates on. Host regression 113/113 with zero warnings, and the AI
disclosure check passes.
Assisted-by: Claude Code (Opus 5) <[email protected]>
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The per-edit disclosure named the product and model, so every agent and every
model version appended another line. 74 files carried two to four of them, and
the same five products had accumulated 13 spellings -- Copilot against GitHub
Copilot, Claude Sonnet 4.6 against claude-sonnet-4.6, four spellings of Codex.
Twenty assembly lines carried a doubled comment marker, `; //` or `@ //`.
Every file now carries exactly one line, fixed text naming no product:
Portions of this file were generated with AI assistance.
It is written with the comment character that file already uses, so the `;`
and `@` assembly files keep theirs and the doubled markers are gone. Precise
attribution stays on the commit, where the Assisted-by trailer is per-change,
dated and attached to the diff it describes. A header line cannot hold that
record honestly, because the code it names gets rewritten and the line stays.
A file-level flag answers whether; the history answers who.
Comment-only. 455 files, 455 insertions and 574 deletions: every removed line
was a disclosure line, every added line is the fixed text, and no file is left
with zero or with more than one. `scripts/check_ports.sh` passes, including the
reproducibility check that would catch a ports_arch master and its generated
copies drifting apart. Recompiled against dev, every file that builds without a
vendor toolchain gives a byte-identical object: 19 of 19 C files under common,
100 of 100 GNU assembly files, and all 16 assemblable files whose comment
marker changed. The 10 remaining marker changes are ac5 and IAR sources where
`;` already started the comment and only the redundant `//` was removed.
Assisted-by: Claude Code (Opus 5) <[email protected]>
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Fixes #551
`_tx_thread_system_return_inline()` in the Cortex-M `tx_port.h` headers spells
its barriers `dsb 0xF` and `isb 0xF`. A bare hexadecimal operand is a GNU
assembler extension, and IAR rejects it with `operand syntax error`, so the
header cannot be included at all. The block is guarded for GCC, armclang and IAR
together, so every IAR user of an affected port hits it -- four independent
reports on Cortex-M33 and M7 with EWARM 9.50 and 9.70.
Both operands become `sy`, the Arm UAL name for exactly what `0xF` encodes. The
generated instruction is unchanged. Applied to the two `ports_arch` masters and
all 32 copies under `ports`, covering M0, M23, M3, M33, M4, M52, M55, M7 and M85
across ac5, ac6, gnu, iar and keil, plus the `scripts/check_ports.sh` probes that
matched the old spelling.
`check_ports.sh` passes, the copy scripts still reproduce every generated port
byte for byte, and `arm-none-eabi-gcc -O2` compiles a caller for every patched
header, emitting `dsb sy` and `isb sy`. Three headers that need toolchain
intrinsics GCC does not ship fail identically on `dev`.
Assisted-by: Copilot (Opus 5) <[email protected]>
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* ports: add Cortex-M52 (Armv8.1-M) port support
Add ThreadX port for Cortex-M52, supporting three toolchains:
- GNU (GCC)
- AC6 (Arm Compiler 6)
- IAR
Cortex-M52 is an Armv8.1-M Mainline processor sharing the same
architecture profile as Cortex-M55 and Cortex-M85. The port is
functionally identical to the existing Cortex-M85 port.
* ports: update cortex_m52 port copy script,using it update content
-Add cortex_m52 in threadx/scriprts/copy_armv8m.sh
-Using updated copy_armv8m.sh to generate new cortex_m52 port content
* Regenerated the Cortex-M52 port against dev and wired it into the checks
The port was generated from ports_arch/ARMv8-M as it stood on master, which has
since moved on. Rebasing onto dev and running scripts/copy_armv8_m.sh again
brings the twelve stale files into line, which is the point of generating them:
the core picks up every ARMv8-M fix made since without anyone porting it by hand.
Among what it picks up: "MOV r0, 0" becomes "MOV r0, #0" in the schedule and
system-return paths, the non-canonical immediate form that GNU as tolerates and
LLVM's assembler rejects; and gnu/src/tx_initialize_low_level.S goes away, since
the shared source no longer has it.
Two integration points exist only on dev, so the original change could not have
included them.
cmake/cortex_m52.cmake, so the port can be selected the documented way. Every
other Cortex-M core has one. It uses the hard float ABI, as Cortex-M55 and
Cortex-M85 do.
An entry in scripts/check_clang.sh, likewise with -mfloat-abi=hard. That flag is
not decoration: -mcpu=cortex-m52 implies Helium, and building it soft-float ends
in "multilib configuration error: No library available for MVE with soft-float
ABI" on every file, which reads as a broken port rather than a missing flag.
Verified after regenerating: scripts/copy_armv8_m.sh is a no-op, so the tree
matches its source; all 14 assembly sources and 188 C sources compile for
cortex-m52 with Arm Toolchain for Embedded 22.1.0.
Note for anyone building with GNU tools: arm-none-eabi-gcc 13.2.1 rejects
-mcpu=cortex-m52 outright. Support arrives in GCC 14.
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Co-authored-by: Frédéric Desbiens <[email protected]>
Assisted-by: Claude Code (Opus 5) <[email protected]>
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