| Age | Commit message (Expand) | Author |
|---|
| 10 days | Removed internal milestone labels from the Cortex-R52 port (#803) | Frédéric Desbiens |
| 10 days | Aligned the banner comments in the Cortex-R52 ports (#785) | Frédéric Desbiens |
| 2026-09-30 | Fixed Erbium interrupt masking and PLIC update races | Frédéric Desbiens |
| 2026-09-30 | Added simulator tests for Erbium interrupt regressions | Frédéric Desbiens |
| 2026-09-30 | Added an Erbium example to the RISC-V64 GNU port | Afonso Oliveira |
| 2026-09-28 | Stopped the version pass skipping ports in silence (#786) | Frédéric Desbiens |
| 2026-09-28 | Updated ThreadX version constants and port strings to 6.5.2.202603 (#781) | Frédéric Desbiens |
| 2026-09-28 | Normalized the AI disclosure comment and added a check that keeps it so (#762) | Frédéric Desbiens |
| 2026-09-28 | Enabled execution profiling for Cortex-R5 (#766) | Frédéric Desbiens |
| 2026-09-28 | Stopped the Linux port losing a mutex wake-up to a suspend signal (#754) | Frédéric Desbiens |
| 2026-09-17 | Added a ThreadX module manager port for the Cortex-R52 (#639) | Frédéric Desbiens |
| 2026-09-16 | Fixed the zero trace time stamps in the Linux ports' MISRA builds (#749) | Frédéric Desbiens |
| 2026-09-15 | Fixed the simulator ports and thread create paths so they compile when TX_MIS... | Frédéric Desbiens |
| 2026-09-15 | Normalized the AI disclosure comment to one fixed line per file (#740) | Frédéric Desbiens |
| 2026-09-15 | Completed Windows simulator support and regression coverage (#736) | Frédéric Desbiens |
| 2026-09-15 | Replaced the GNU-only dsb/isb 0xF operands with the UAL sy form (#729) | Frédéric Desbiens |
| 2026-09-15 | Fixed the garbage _tx_initialize_unused_memory in the GNU Cortex-A ports (#726) | Frédéric Desbiens |
| 2026-09-11 | Replaced the stale system stack switch pseudo-code in the ARMv7-A ports with ... | Frédéric Desbiens |
| 2026-09-09 | Added the missing VFP enable field to the Cortex-R5/AC5 thread control block,... | Frédéric Desbiens |
| 2026-09-09 | Removed the vector table offset register and system stack pointer setup from ... | Frédéric Desbiens |
| 2026-09-09 | Added lazy FPU stacking and QEMU functional tests for RV64 GNU port (#549) | Wei-Chen Lai |
| 2026-09-09 | Marked every published ThreadX include directory as SYSTEM so applications no... | Frédéric Desbiens |
| 2026-09-09 | Stopped the win32 and win64 ports from enabling performance metrics and event... | Spencer Oliver |
| 2026-09-09 | riscv32: spec compliance and regression test fix (#691) | Akif Ejaz |
| 2026-09-09 | Allowed a BASEPRI-masked interrupt to wake the Cortex-M idle loop from WFI (#... | Frédéric Desbiens |
| 2026-09-09 | Fixed the RISC-V64 trap frame size mismatch in the regression test BSP (#708) | Frédéric Desbiens |
| 2026-09-09 | Aligned the simulator ports' fake stack pointer so ThreadX no longer performs... | Frédéric Desbiens |
| 2026-09-09 | riscv64: spec compliance and regression test fix (#698) | Akif Ejaz |
| 2026-09-08 | Moved the ARC ISR enter callout onto the system stack (#700) | Frédéric Desbiens |
| 2026-09-03 | Fixed the clobbered return address in the RISC-V context save (#696) | Frédéric Desbiens |
| 2026-09-03 | Fixed the incorrect loop bound constant in the IAR file lock support (#695) | Frédéric Desbiens |
| 2026-09-03 | Fixed the missing immediate prefix on MOV in Cortex-M schedulers (#693) | Frédéric Desbiens |
| 2026-09-02 | Added the boot-at-EL1 option to the S32Z280 entry path (#690) | Frédéric Desbiens |
| 2026-09-01 | Refused the Cortex-R52 VFP option without a hard float ABI (#686) | Frédéric Desbiens |
| 2026-08-28 | Fixed the AArch64 samples, none of which had ever linked with GCC (#673) | Frédéric Desbiens |
| 2026-08-18 | Swept the stack-heavy measurement across placements, and qualified its result... | Frédéric Desbiens |
| 2026-08-17 | Gave each thread its own MPU window, and made a violation fault (#637) | Frédéric Desbiens |
| 2026-08-17 | Measured stack-heavy work against the memory holding the stack (#636) | Frédéric Desbiens |
| 2026-08-17 | Measured context-switch cost against the memory holding the stack (#635) | Frédéric Desbiens |
| 2026-08-17 | Enabled BTCM, measured it, and put a ThreadX thread stack in it (#634) | Frédéric Desbiens |
| 2026-08-17 | Retracted the claim that a second TCM bank costs the data cache (#633) | Frédéric Desbiens |
| 2026-08-17 | Revalidated the ATCM handler result across four placements, and it holds (#632) | Frédéric Desbiens |
| 2026-08-17 | Measured the cache benchmark at four alignments, because one is not enough (#... | Frédéric Desbiens |
| 2026-08-17 | Ran the interrupt handler from ATCM, and measured what that buys (#630) | Frédéric Desbiens |
| 2026-08-17 | Configured the LINFlexD console twice, because once is not enough at -O2 (#629) | Frédéric Desbiens |
| 2026-08-16 | Stopped the generated Armv8-M readmes claiming a false origin date (#623) | Frédéric Desbiens |
| 2026-08-16 | Added Cortex-M52 (Armv8.1-M) port (#519) | Armchina_JidongMei |
| 2026-08-15 | Added a CMake target for the Linux sample program (#622) | Frédéric Desbiens |
| 2026-08-15 | Corrected the S32Z280 data SRAM map against the Reference Manual and the part... | Frédéric Desbiens |
| 2026-08-15 | Stopped the remaining example scripts naming archives that were deleted (#620) | Frédéric Desbiens |
