components « xuantie_smartl_fpga « example_build « gnu « risc-v32 « ports - threadx.git - Unnamed repository; edit this file 'description' to name the repository.

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path: root/ports/risc-v32/gnu/example_build/xuantie_smartl_fpga/components

Mode	Name	Size
d---------	chip_riscv_dummy	111	log plain
d---------	csi / csi2	31	log plain
d---------	libc_threadx	152	log plain