summaryrefslogtreecommitdiff
path: root/ports/risc-v64/gnu/example_build/erbium/uart.h
blob: 74a6c1d05e198405315668e54a3dd0693f7491be (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
/***************************************************************************
 * Copyright (c) 2026 Eclipse ThreadX contributors
 *
 * This program and the accompanying materials are made available under the
 * terms of the MIT License which is available at
 * https://opensource.org/licenses/MIT.
 *
 * AI Disclosure: This file was largely AI-generated by Claude Code (Opus 5.5).
 * The AI-generated portions may be considered public domain (CC0-1.0)
 * and not subject to the project's licence. The human contributor has
 * reviewed and verified that the code is correct.
 *
 * SPDX-License-Identifier: MIT and CC0-1.0
 **************************************************************************/

#ifndef RISCV_UART_H
#define RISCV_UART_H

/* Erbium UART0: the original Shakti UART integration, with 32-bit registers
   at eight-byte intervals.  It is PLIC source 3.  */
#define UART0                   0x02004000UL
#define UART0_IRQ               3

/* The UART input clock and the console rate.  The defaults match the
   public et-platform simulator; define these on the command line when the
   boot firmware programs a different peripheral clock.  */
#ifndef ERBIUM_UART_CLOCK_HZ
#define ERBIUM_UART_CLOCK_HZ    400000000UL
#endif
#ifndef ERBIUM_UART_BAUD
#define ERBIUM_UART_BAUD        115200UL
#endif

#define puts                    uart_puts

int  uart_init(void);
int  uart_putc(int ch);
int  uart_puts(const char *str);

#endif /* RISCV_UART_H */