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authorhathach <[email protected]>2023-09-27 16:19:39 +0700
committerhathach <[email protected]>2023-09-27 16:19:39 +0700
commit0a4fb6963de9a62be613cab5ab33f70c2e836b3d (patch)
tree98711a9fcacfd5dc23d71746816c0bf74893fcd3
parent3b0ffd0f488671f1bafa4bcd9e22dd51f8bb6dee (diff)
fix build with lpc54
-rw-r--r--.github/workflows/build_arm.yml2
-rw-r--r--.github/workflows/cmake_arm.yml2
-rw-r--r--hw/bsp/family_support.cmake1
-rw-r--r--hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h165
-rw-r--r--hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake21
-rw-r--r--hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake22
-rw-r--r--hw/bsp/lpc54/family.cmake138
7 files changed, 281 insertions, 70 deletions
diff --git a/.github/workflows/build_arm.yml b/.github/workflows/build_arm.yml
index 975f351a0..c7462f0d7 100644
--- a/.github/workflows/build_arm.yml
+++ b/.github/workflows/build_arm.yml
@@ -36,7 +36,7 @@ jobs:
- 'broadcom_32bit'
- 'kinetis_k32l2'
- 'lpc11 lpc13 lpc15 lpc17'
- - 'lpc51 lpc54'
+ - 'lpc51'
- 'mm32 msp432e4'
- 'samd11 same5x saml2x'
- 'stm32f2 stm32f3'
diff --git a/.github/workflows/cmake_arm.yml b/.github/workflows/cmake_arm.yml
index 4b788a213..5dc36ee2c 100644
--- a/.github/workflows/cmake_arm.yml
+++ b/.github/workflows/cmake_arm.yml
@@ -36,7 +36,7 @@ jobs:
- 'imxrt'
- 'kinetis_kl'
- 'lpc18 lpc40 lpc43'
- - 'lpc55'
+ - 'lpc54 lpc55'
- 'mcx'
- 'nrf'
- 'ra'
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 642282b0e..9c625b58e 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -40,6 +40,7 @@ if (NOT FAMILY STREQUAL rp2040)
# enable LTO if supported skip rp2040
include(CheckIPOSupported)
check_ipo_supported(RESULT IPO_SUPPORTED)
+ cmake_print_variables(IPO_SUPPORTED)
if (IPO_SUPPORTED)
set(CMAKE_INTERPROCEDURAL_OPTIMIZATION TRUE)
endif()
diff --git a/hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..fc0ab1f2d
--- /dev/null
+++ b/hw/bsp/lpc54/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+ #include "fsl_device_registers.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU 0
+#define configENABLE_FPU 1
+#define configENABLE_TRUSTZONE 0
+#define configMINIMAL_SECURE_STACK_SIZE (1024)
+
+#define configUSE_PREEMPTION 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ SystemCoreClock
+#define configTICK_RATE_HZ ( 1000 )
+#define configMAX_PRIORITIES ( 5 )
+#define configMINIMAL_STACK_SIZE ( 128 )
+#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN 16
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 1
+#define configUSE_MUTEXES 1
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configQUEUE_REGISTRY_SIZE 4
+#define configUSE_QUEUE_SETS 0
+#define configUSE_TIME_SLICING 0
+#define configUSE_NEWLIB_REENTRANT 0
+#define configENABLE_BACKWARD_COMPATIBILITY 1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
+
+#define configSUPPORT_STATIC_ALLOCATION 0
+#define configSUPPORT_DYNAMIC_ALLOCATION 1
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW 2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS 0
+#define configRECORD_STACK_HIGH_ADDRESS 1
+#define configUSE_TRACE_FACILITY 1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES 2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH 32
+#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet 0
+#define INCLUDE_uxTaskPriorityGet 0
+#define INCLUDE_vTaskDelete 0
+#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR 0
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 0
+#define INCLUDE_xTaskGetCurrentTaskHandle 1
+#define INCLUDE_uxTaskGetStackHighWaterMark 0
+#define INCLUDE_xTaskGetIdleTaskHandle 0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName 0
+#define INCLUDE_eTaskGetState 0
+#define INCLUDE_xEventGroupSetBitFromISR 0
+#define INCLUDE_xTimerPendFunctionCall 0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+ #define configASSERT(_exp) \
+ do {\
+ if ( !(_exp) ) { \
+ volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+ if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
+ taskDISABLE_INTERRUPTS(); \
+ __asm("BKPT #0\n"); \
+ }\
+ }\
+ } while(0)
+#else
+ #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler PendSV_Handler
+#define xPortSysTickHandler SysTick_Handler
+#define vPortSVCHandler SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS 3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
new file mode 100644
index 000000000..c0bbeecd5
--- /dev/null
+++ b/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
@@ -0,0 +1,21 @@
+set(MCU_VARIANT LPC54114)
+set(MCU_CORE LPC54114_cm4)
+
+set(JLINK_DEVICE LPC54114J256_M4)
+set(PYOCD_TARGET LPC54114)
+
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54114J256_cm4_flash.ld)
+
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+ set(PORT 1)
+endif()
+
+function(update_board TARGET)
+ target_compile_definitions(${TARGET} PUBLIC
+ CPU_LPC54114J256BD64_cm4
+ )
+ target_link_libraries(${TARGET} PUBLIC
+ ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower_cm4_hardabi.a
+ )
+endfunction()
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake
new file mode 100644
index 000000000..f0715fa12
--- /dev/null
+++ b/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake
@@ -0,0 +1,22 @@
+set(MCU_VARIANT LPC54608)
+set(MCU_CORE LPC54608)
+
+set(JLINK_DEVICE LPC54608J512)
+set(PYOCD_TARGET LPC54608)
+set(NXPLINK_DEVICE LPC54608:LPCXpresso54608)
+
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54608J512_flash.ld)
+
+# Device port default to PORT1 Highspeed
+if (NOT DEFINED PORT)
+ set(PORT 1)
+endif()
+
+function(update_board TARGET)
+ target_compile_definitions(${TARGET} PUBLIC
+ CPU_LPC54608J512ET180
+ )
+ target_link_libraries(${TARGET} PUBLIC
+ ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower_hardabi.a
+ )
+endfunction()
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index b016441c1..a1f876844 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -28,83 +28,85 @@ set(HOST_PORT $<NOT:${PORT}>)
#------------------------------------
# only need to be built ONCE for all examples
function(add_board_target BOARD_TARGET)
- if (NOT TARGET ${BOARD_TARGET})
- add_library(${BOARD_TARGET} STATIC
- # driver
- ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
- ${SDK_DIR}/drivers/common/fsl_common_arm.c
- ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
- ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
- # mcu
- ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
- ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
- ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
- ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
- )
+ if (TARGET ${BOARD_TARGET})
+ return()
+ endif()
+
+ add_library(${BOARD_TARGET} STATIC
+ # driver
+ ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
+ ${SDK_DIR}/drivers/common/fsl_common_arm.c
+ ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
+ ${SDK_DIR}/drivers/flexcomm/fsl_usart.c
+ # mcu
+ ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+ ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+ ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
+ ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+ )
+ target_compile_definitions(${BOARD_TARGET} PUBLIC
+ CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
+ BOARD_TUD_RHPORT=${PORT}
+ BOARD_TUH_RHPORT=${HOST_PORT}
+ )
+ # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
+ if (PORT EQUAL 1)
target_compile_definitions(${BOARD_TARGET} PUBLIC
- CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
- BOARD_TUD_RHPORT=${PORT}
- BOARD_TUH_RHPORT=${HOST_PORT}
+ BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+ BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
+ CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
)
- # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
- if (PORT EQUAL 1)
- target_compile_definitions(${BOARD_TARGET} PUBLIC
- BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
- BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
- CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
- )
- else ()
- target_compile_definitions(${BOARD_TARGET} PUBLIC
- BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
- BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
- CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
- #CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
- )
- endif ()
-
- target_include_directories(${BOARD_TARGET} PUBLIC
- ${TOP}/lib/sct_neopixel
- # driver
- ${SDK_DIR}/drivers/common
- ${SDK_DIR}/drivers/flexcomm
- ${SDK_DIR}/drivers/lpc_iocon
- ${SDK_DIR}/drivers/lpc_gpio
- ${SDK_DIR}/drivers/lpuart
- ${SDK_DIR}/drivers/sctimer
- # mcu
- ${CMSIS_DIR}/CMSIS/Core/Include
- ${SDK_DIR}/devices/${MCU_VARIANT}
- ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+ else ()
+ target_compile_definitions(${BOARD_TARGET} PUBLIC
+ BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+ BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
+ CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+ #CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
)
+ endif ()
+
+ target_include_directories(${BOARD_TARGET} PUBLIC
+ ${TOP}/lib/sct_neopixel
+ # driver
+ ${SDK_DIR}/drivers/common
+ ${SDK_DIR}/drivers/flexcomm
+ ${SDK_DIR}/drivers/lpc_iocon
+ ${SDK_DIR}/drivers/lpc_gpio
+ ${SDK_DIR}/drivers/lpuart
+ ${SDK_DIR}/drivers/sctimer
+ # mcu
+ ${CMSIS_DIR}/CMSIS/Core/Include
+ ${SDK_DIR}/devices/${MCU_VARIANT}
+ ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+ )
- update_board(${BOARD_TARGET})
+ update_board(${BOARD_TARGET})
- if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
- set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
- endif ()
+ if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+ set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+ endif ()
- if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
- set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
- endif ()
+ if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+ set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+ endif ()
- target_sources(${BOARD_TARGET} PUBLIC
- ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
- )
+ target_sources(${BOARD_TARGET} PUBLIC
+ ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+ )
- if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
- target_link_options(${BOARD_TARGET} PUBLIC
- # linker file
- "LINKER:--script=${LD_FILE_GNU}"
- # nanolib
- --specs=nosys.specs
- --specs=nano.specs
- )
- elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
- target_link_options(${BOARD_TARGET} PUBLIC
- "LINKER:--config=${LD_FILE_IAR}"
- )
- endif ()
+ if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ # linker file
+ "LINKER:--script=${LD_FILE_GNU}"
+ # nanolib
+ --specs=nosys.specs
+ --specs=nano.specs
+ )
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--config=${LD_FILE_IAR}"
+ )
endif ()
endfunction()