summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorhathach <[email protected]>2021-08-19 18:02:16 +0700
committerhathach <[email protected]>2021-08-19 18:02:16 +0700
commit1992f49343fa7f5b73ae4e938a620e01900d2362 (patch)
treea20dbe18209c73e8948822d01860b339c66341e1
parentc4a9a04d67ffa64adf784c71b12e6c1b7bf260c3 (diff)
group stm32f1 board
-rw-r--r--hw/bsp/stm32f0/family.c5
-rw-r--r--hw/bsp/stm32f1/boards/stm32f103bluepill/STM32F103XB_FLASH.ld (renamed from hw/bsp/stm32f103bluepill/STM32F103XB_FLASH.ld)0
-rw-r--r--hw/bsp/stm32f1/boards/stm32f103bluepill/board.h92
-rw-r--r--hw/bsp/stm32f1/boards/stm32f103bluepill/board.mk11
-rw-r--r--hw/bsp/stm32f1/family.c (renamed from hw/bsp/stm32f103bluepill/stm32f103bluepill.c)78
-rw-r--r--hw/bsp/stm32f1/family.mk (renamed from hw/bsp/stm32f103bluepill/board.mk)14
-rw-r--r--hw/bsp/stm32f1/stm32f1xx_hal_conf.h (renamed from hw/bsp/stm32f103bluepill/stm32f1xx_hal_conf.h)0
7 files changed, 128 insertions, 72 deletions
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index b2e0453c5..853bb9d64 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -55,12 +55,13 @@ void board_init(void)
// Enable UART Clock
UART_CLK_EN();
+#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
- NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+ NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
// LED
diff --git a/hw/bsp/stm32f103bluepill/STM32F103XB_FLASH.ld b/hw/bsp/stm32f1/boards/stm32f103bluepill/STM32F103XB_FLASH.ld
index 4be9df61b..4be9df61b 100644
--- a/hw/bsp/stm32f103bluepill/STM32F103XB_FLASH.ld
+++ b/hw/bsp/stm32f1/boards/stm32f103bluepill/STM32F103XB_FLASH.ld
diff --git a/hw/bsp/stm32f1/boards/stm32f103bluepill/board.h b/hw/bsp/stm32f1/boards/stm32f103bluepill/board.h
new file mode 100644
index 000000000..57a607ed5
--- /dev/null
+++ b/hw/bsp/stm32f1/boards/stm32f103bluepill/board.h
@@ -0,0 +1,92 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PORT GPIOC
+#define LED_PIN GPIO_PIN_13
+#define LED_STATE_ON 0
+
+// Button
+#define BUTTON_PORT GPIOA
+#define BUTTON_PIN GPIO_PIN_0
+#define BUTTON_STATE_ACTIVE 1
+
+// UART
+//#define UART_DEV USART1
+//#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
+//#define UART_GPIO_PORT GPIOA
+//#define UART_GPIO_AF GPIO_AF1_USART1
+//#define UART_TX_PIN GPIO_PIN_9
+//#define UART_RX_PIN GPIO_PIN_10
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void board_stm32f1_clock_init(void)
+{
+ RCC_ClkInitTypeDef clkinitstruct = {0};
+ RCC_OscInitTypeDef oscinitstruct = {0};
+ RCC_PeriphCLKInitTypeDef rccperiphclkinit = {0};
+
+ /* Enable HSE Oscillator and activate PLL with HSE as source */
+ oscinitstruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ oscinitstruct.HSEState = RCC_HSE_ON;
+ oscinitstruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+ oscinitstruct.PLL.PLLMUL = RCC_PLL_MUL9;
+ oscinitstruct.PLL.PLLState = RCC_PLL_ON;
+ oscinitstruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ HAL_RCC_OscConfig(&oscinitstruct);
+
+ /* USB clock selection */
+ rccperiphclkinit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ rccperiphclkinit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
+ HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit);
+
+ /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
+ clkinitstruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+ clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_2);
+}
+
+static inline void board_vbus_sense_init(void)
+{
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32f1/boards/stm32f103bluepill/board.mk b/hw/bsp/stm32f1/boards/stm32f103bluepill/board.mk
new file mode 100644
index 000000000..1f8564c1a
--- /dev/null
+++ b/hw/bsp/stm32f1/boards/stm32f103bluepill/board.mk
@@ -0,0 +1,11 @@
+CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32F103XB_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s
+
+# For flash-jlink target
+JLINK_DEVICE = stm32f103c8
+
+# flash target ROM bootloader
+flash: flash-dfu-util
diff --git a/hw/bsp/stm32f103bluepill/stm32f103bluepill.c b/hw/bsp/stm32f1/family.c
index 600f3aaef..d4ae098b2 100644
--- a/hw/bsp/stm32f103bluepill/stm32f103bluepill.c
+++ b/hw/bsp/stm32f1/family.c
@@ -24,8 +24,9 @@
* This file is part of the TinyUSB stack.
*/
-#include "../board.h"
#include "stm32f1xx_hal.h"
+#include "bsp/board.h"
+#include "board.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
@@ -48,72 +49,29 @@ void USBWakeUp_IRQHandler(void)
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
-#define LED_PORT GPIOC
-#define LED_PIN GPIO_PIN_13
-#define LED_STATE_ON 0
-
-#define BUTTON_PORT GPIOA
-#define BUTTON_PIN GPIO_PIN_0
-#define BUTTON_STATE_ACTIVE 1
-
-
-/**
- * @brief System Clock Configuration
- * The system Clock is configured as follow :
- * System Clock source = PLL (HSE)
- * SYSCLK(Hz) = 72000000
- * HCLK(Hz) = 72000000
- * AHB Prescaler = 1
- * APB1 Prescaler = 2
- * APB2 Prescaler = 1
- * HSE Frequency(Hz) = 8000000
- * HSE PREDIV1 = 1
- * PLLMUL = 9
- * Flash Latency(WS) = 2
- * @param None
- * @retval None
- */
-void SystemClock_Config(void)
-{
- RCC_ClkInitTypeDef clkinitstruct = {0};
- RCC_OscInitTypeDef oscinitstruct = {0};
- RCC_PeriphCLKInitTypeDef rccperiphclkinit = {0};
-
- /* Enable HSE Oscillator and activate PLL with HSE as source */
- oscinitstruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- oscinitstruct.HSEState = RCC_HSE_ON;
- oscinitstruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
- oscinitstruct.PLL.PLLMUL = RCC_PLL_MUL9;
- oscinitstruct.PLL.PLLState = RCC_PLL_ON;
- oscinitstruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- HAL_RCC_OscConfig(&oscinitstruct);
-
- /* USB clock selection */
- rccperiphclkinit.PeriphClockSelection = RCC_PERIPHCLK_USB;
- rccperiphclkinit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
- HAL_RCCEx_PeriphCLKConfig(&rccperiphclkinit);
-
- /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
- clkinitstruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
- clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV2;
- clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
- HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_2);
-}
void board_init(void)
{
-
- SystemClock_Config();
+ board_stm32f1_clock_init();
- #if CFG_TUSB_OS == OPT_OS_NONE
+ // Enable All GPIOs clocks
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
// 1ms tick timer
SysTick_Config(SystemCoreClock / 1000);
- #endif
+
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+ // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+ NVIC_SetPriority(USB_HP_CAN1_TX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+ NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+ NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
// LED
- __HAL_RCC_GPIOC_CLK_ENABLE();
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Pin = LED_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
@@ -122,7 +80,6 @@ void board_init(void)
HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
// Button
- __HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = BUTTON_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
@@ -131,7 +88,6 @@ void board_init(void)
// USB Pins
// Configure USB DM and DP pins.
- __HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
diff --git a/hw/bsp/stm32f103bluepill/board.mk b/hw/bsp/stm32f1/family.mk
index 656a37323..aebd6d2ff 100644
--- a/hw/bsp/stm32f103bluepill/board.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -4,6 +4,8 @@ DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/st/cmsis_device_$(ST_FAMILY) hw/mcu/st/stm
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+include $(TOP)/$(BOARD_PATH)/board.mk
+
CFLAGS += \
-flto \
-mthumb \
@@ -11,15 +13,12 @@ CFLAGS += \
-mcpu=cortex-m3 \
-mfloat-abi=soft \
-nostdlib -nostartfiles \
- -DSTM32F103xB \
-DCFG_TUSB_MCU=OPT_MCU_STM32F1
# mcu driver cause following warnings
#CFLAGS += -Wno-error=unused-parameter
# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/STM32F103XB_FLASH.ld
-
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
@@ -29,14 +28,11 @@ SRC_C += \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
-SRC_S += \
- $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f103xb.s
-
INC += \
+ $(TOP)/$(BOARD_PATH) \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(ST_CMSIS)/Include \
- $(TOP)/$(ST_HAL_DRIVER)/Inc \
- $(TOP)/hw/bsp/$(BOARD)
+ $(TOP)/$(ST_HAL_DRIVER)/Inc
# For freeRTOS port source
FREERTOS_PORT = ARM_CM3
@@ -45,5 +41,5 @@ FREERTOS_PORT = ARM_CM3
JLINK_DEVICE = stm32f103c8
# flash target ROM bootloader
-flash: $(BUILD)/$(PROJECT).bin
+flash-dfu-util: $(BUILD)/$(PROJECT).bin
dfu-util -R -a 0 --dfuse-address 0x08000000 -D $<
diff --git a/hw/bsp/stm32f103bluepill/stm32f1xx_hal_conf.h b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h
index a4a3f3086..a4a3f3086 100644
--- a/hw/bsp/stm32f103bluepill/stm32f1xx_hal_conf.h
+++ b/hw/bsp/stm32f1/stm32f1xx_hal_conf.h