diff options
| author | hathach <[email protected]> | 2023-09-08 18:39:09 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2023-09-08 18:39:09 +0700 |
| commit | 1d68f2a3280cdc76912ec7e89238640e950e542c (patch) | |
| tree | c43c430fa47c93d6058bc76eabc1047f942c0202 | |
| parent | bcc77a60e047837a82b0719ffa95a4d6f688468d (diff) | |
metro m4 working with max3421e
| -rw-r--r-- | hw/bsp/samd51/family.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/hw/bsp/samd51/family.c b/hw/bsp/samd51/family.c index 45a9aa5e0..51cfd19ba 100644 --- a/hw/bsp/samd51/family.c +++ b/hw/bsp/samd51/family.c @@ -294,7 +294,7 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l size_t count = 0; while (count < tx_len || count < rx_len) { // Wait for the transmit buffer to be empty -// while (!SERCOM2->SPI.INTFLAG.bit.DRE); + while (!SERCOM2->SPI.INTFLAG.bit.DRE); // Write data to be transmitted uint8_t data = 0x00; @@ -302,19 +302,24 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const *tx_buf, size_t tx_l data = tx_buf[count]; } - SERCOM2->SPI.DATA.bit.DATA = data; + SERCOM2->SPI.DATA.reg = (uint32_t) data; // Wait for the receive buffer to be filled while (!SERCOM2->SPI.INTFLAG.bit.RXC); // Read received data - if (rx_buf) { - rx_buf[count] = SERCOM2->SPI.DATA.bit.DATA; + data = (uint8_t) SERCOM2->SPI.DATA.reg; + if (count < rx_len) { + rx_buf[count] = data; } count++; } + // wait for bus idle and clear flags + while (!(SERCOM2->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE))); + SERCOM2->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE; + return true; } #endif |