diff options
| author | Steven Grunza <[email protected]> | 2026-06-26 10:11:02 -0400 |
|---|---|---|
| committer | Steven Grunza <[email protected]> | 2026-06-26 10:11:02 -0400 |
| commit | 2e2baaecfd8d6f3463c91b418ac3dc981c296e4a (patch) | |
| tree | f6b443fef6d97a528d66033bf5b1c27709da5d8d | |
| parent | 0a25cc27d7d3699536f6df01e80af3eb0423ce58 (diff) | |
Added files by copying and modifying files from stm32h503nucleo direcotry to stm32h533nucleo
| -rw-r--r-- | hw/bsp/stm32h5/boards/stm32h533nucleo/board.cmake | 12 | ||||
| -rw-r--r-- | hw/bsp/stm32h5/boards/stm32h533nucleo/board.h | 145 | ||||
| -rw-r--r-- | hw/bsp/stm32h5/boards/stm32h533nucleo/board.mk | 9 |
3 files changed, 166 insertions, 0 deletions
diff --git a/hw/bsp/stm32h5/boards/stm32h533nucleo/board.cmake b/hw/bsp/stm32h5/boards/stm32h533nucleo/board.cmake new file mode 100644 index 000000000..79157cc86 --- /dev/null +++ b/hw/bsp/stm32h5/boards/stm32h533nucleo/board.cmake @@ -0,0 +1,12 @@ +set(MCU_VARIANT stm32h533xx) +set(JLINK_DEVICE stm32h533re) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32H533xx + HSE_VALUE=24000000 + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + CFG_EXAMPLE_VIDEO_READONLY + ) +endfunction() diff --git a/hw/bsp/stm32h5/boards/stm32h533nucleo/board.h b/hw/bsp/stm32h5/boards/stm32h533nucleo/board.h new file mode 100644 index 000000000..38d4647d8 --- /dev/null +++ b/hw/bsp/stm32h5/boards/stm32h533nucleo/board.h @@ -0,0 +1,145 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020, Ha Thach (tinyusb.org) + * Copyright (c) 2023, HiFiPhile + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* metadata: + name: STM32 H533 Nucleo + url: https://www.st.com/en/evaluation-tools/nucleo-h533re.html +*/ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define PINID_LED 0 +#define PINID_BUTTON 1 +#define PINID_UART_TX 2 +#define PINID_UART_RX 3 + +static board_pindef_t board_pindef[] = { + { // LED + .port = GPIOA, + .pin_init = { .Pin = GPIO_PIN_5, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 }, + .active_state = 0 + }, + { // Button + .port = GPIOC, + .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 }, + .active_state = 1 + }, + { // UART TX + .port = GPIOA, + .pin_init = { .Pin = GPIO_PIN_2, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART3 }, + .active_state = 0 + }, + { // UART RX + .port = GPIOA, + .pin_init = { .Pin = GPIO_PIN_3, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART3 }, + .active_state = 0 + }, +}; + +//--------------------------------------------------------------------+ +// RCC Clock +//--------------------------------------------------------------------+ +static inline void SystemClock_Config(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 12; + RCC_OscInitStruct.PLL.PLLN = 250; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 2; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + |RCC_CLOCKTYPE_PCLK3; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1; + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5); + + // Configure CRS clock source + __HAL_RCC_CRS_CLK_ENABLE(); + RCC_CRSInitTypeDef RCC_CRSInitStruct = {0}; + RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1; + RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB; + RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING; + RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000, 1000); + RCC_CRSInitStruct.ErrorLimitValue = 34; + RCC_CRSInitStruct.HSI48CalibrationValue = 32; + HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct); + + /* Select HSI48 as USB clock source */ + RCC_PeriphCLKInitTypeDef usb_clk = {0 }; + usb_clk.PeriphClockSelection = RCC_PERIPHCLK_USB; + usb_clk.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + HAL_RCCEx_PeriphCLKConfig(&usb_clk); + + /* Peripheral clock enable */ + __HAL_RCC_USB_CLK_ENABLE(); +} + +static inline void board_init2(void) { + // Empty for this board +} + +void board_vbus_set(uint8_t rhport, bool state) { + (void) rhport; + (void) state; +} + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/stm32h5/boards/stm32h533nucleo/board.mk b/hw/bsp/stm32h5/boards/stm32h533nucleo/board.mk new file mode 100644 index 000000000..7b5a3486d --- /dev/null +++ b/hw/bsp/stm32h5/boards/stm32h533nucleo/board.mk @@ -0,0 +1,9 @@ +MCU_VARIANT = stm32h533xx + +CFLAGS += \ + -DSTM32H533xx \ + -DHSE_VALUE=24000000 \ + -DCFG_EXAMPLE_VIDEO_READONLY \ + +# For flash-jlink target +JLINK_DEVICE = stm32h533re |
