fix hil board_test duplication, add cdc_msc_freertos test

2 files changed, 30 insertions, 7 deletions

diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index c8a04bb74..d2f8628f1 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -28,6 +28,9 @@
 
 #if CFG_TUD_MSC
 
+// whether host does safe-eject
+static bool ejected = false;
+
 // Some MCU doesn't have enough 8KB SRAM to store the whole disk
 // We will use Flash as read-only disk with board that has
 // CFG_EXAMPLE_MSC_READONLY defined
@@ -137,7 +140,14 @@ bool tud_msc_test_unit_ready_cb(uint8_t lun)
 {
   (void) lun;
 
-  return true; // RAM disk is always ready
+  // RAM disk is ready until ejected
+  if (ejected) {
+    // Additional Sense 3A-00 is NOT_FOUND
+    tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3a, 0x00);
+    return false;
+  }
+
+  return true;
 }
 
 // Invoked when received SCSI_CMD_READ_CAPACITY_10 and SCSI_CMD_READ_FORMAT_CAPACITY to determine the disk size
@@ -166,6 +176,7 @@ bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, boo
     }else
     {
       // unload disk storage
+      ejected = true;
     }
   }
 
@@ -187,6 +198,17 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
   return (int32_t) bufsize;
 }
 
+bool tud_msc_is_writable_cb (uint8_t lun)
+{
+  (void) lun;
+
+#ifdef CFG_EXAMPLE_MSC_READONLY
+  return false;
+#else
+  return true;
+#endif
+}
+
 // Callback invoked when received WRITE10 command.
 // Process data in buffer to disk's storage and return number of written bytes
 int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize)
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index f571e6e02..87cf5d0f6 100644
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -335,9 +335,13 @@ def main():
     with open(config_file) as f:
         config = json.load(f)
 
-    # all possible tests
+    # all possible tests: board_test is added last to disable board's usb
     all_tests = [
-        'cdc_dual_ports', 'cdc_msc', 'dfu', 'dfu_runtime', 'hid_boot_interface',
+        'cdc_dual_ports',
+        'cdc_msc', 'cdc_msc_freertos',
+        'dfu', 'dfu_runtime',
+        'hid_boot_interface',
+        'board_test'
     ]
 
     if len(boards) == 0:
@@ -352,13 +356,10 @@ def main():
 
         # default to all tests
         if 'tests' in item:
-            test_list = item['tests']
+            test_list = item['tests'] + ['board_test']
         else:
             test_list = all_tests
 
-        # board_test is added last to disable board's usb
-        test_list.append('board_test')
-
         # remove skip_tests
         if 'tests_skip' in item:
             for skip in item['tests_skip']: