Merge pull request #3721 from renjieah/pr-osal-spin-deinit

fix: release hardware spinlock in tud_deinit/tuh_deinit

11 files changed, 42 insertions, 1 deletions

diff --git a/src/device/usbd.c b/src/device/usbd.c
index f87b63111..c4c418cb5 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -636,6 +636,8 @@ bool tud_deinit(uint8_t rhport) {
   _usbd_mutex = NULL;
 #endif
 
+  osal_spin_deinit(&_usbd_spin);
+
   _usbd_rhport = RHPORT_INVALID;
 
   if (cfg_num > 0) {
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 9d159985e..de53bfd03 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -652,6 +652,8 @@ bool tuh_deinit(uint8_t rhport) {
     osal_mutex_delete(_usbh_mutex);
     _usbh_mutex = NULL;
   #endif
+
+    osal_spin_deinit(&_usbh_spin);
   }
 
   return true;
diff --git a/src/osal/osal.h b/src/osal/osal.h
index 69cb356d4..2114c0a61 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -82,7 +82,8 @@ typedef void (*osal_task_func_t)(void* param);
     osal_task_handle_t osal_task_get_current_handle(void);
 
     void osal_spin_init(osal_spinlock_t *ctx);
-    void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr)
+    void osal_spin_deinit(osal_spinlock_t *ctx);
+    void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr);
     void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr);
 
     osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef);
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 2f36aa9e8..128626159 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -130,6 +130,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   spinlock_initialize(ctx);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
     return; // single core MCU does not need to lock in ISR
@@ -152,6 +156,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   (void) ctx;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   if (in_isr) {
   #if TUP_MCU_MULTIPLE_CORE
diff --git a/src/osal/osal_mynewt.h b/src/osal/osal_mynewt.h
index d1fa77ecb..5dd275cc4 100644
--- a/src/osal/osal_mynewt.h
+++ b/src/osal/osal_mynewt.h
@@ -62,6 +62,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
  (void) ctx;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
     return; // single core MCU does not need to lock in ISR
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index e174d3518..49439cef0 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -70,6 +70,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   (void) ctx;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   // Disable interrupts first to make nested_count increment atomic
   if (!in_isr && ctx->nested_count == 0) {
diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h
index 364c38b01..12dce839f 100644
--- a/src/osal/osal_pico.h
+++ b/src/osal/osal_pico.h
@@ -64,6 +64,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   critical_section_init(ctx);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  critical_section_deinit(ctx);
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   (void)in_isr;
   critical_section_enter_blocking(ctx);
diff --git a/src/osal/osal_rtthread.h b/src/osal/osal_rtthread.h
index a151a7d70..d65a2a783 100644
--- a/src/osal/osal_rtthread.h
+++ b/src/osal/osal_rtthread.h
@@ -64,6 +64,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   rt_spin_lock_init(ctx);
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
     return; // single core MCU does not need to lock in ISR
diff --git a/src/osal/osal_rtx4.h b/src/osal/osal_rtx4.h
index e5b708a2c..ba082998a 100644
--- a/src/osal/osal_rtx4.h
+++ b/src/osal/osal_rtx4.h
@@ -77,6 +77,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   (void) ctx;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   (void) ctx; (void) in_isr;
 }
diff --git a/src/osal/osal_threadx.h b/src/osal/osal_threadx.h
index cca4eb487..020fd26aa 100644
--- a/src/osal/osal_threadx.h
+++ b/src/osal/osal_threadx.h
@@ -88,6 +88,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   (void) ctx;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
  if (!in_isr) {
    ctx->interrupt_set(false);
diff --git a/src/osal/osal_zephyr.h b/src/osal/osal_zephyr.h
index 6ea45131e..c84ce3970 100644
--- a/src/osal/osal_zephyr.h
+++ b/src/osal/osal_zephyr.h
@@ -60,6 +60,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
   (void) ctx;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
+  (void) ctx;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
     return; // single core MCU does not need to lock in ISR