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authorhathach <[email protected]>2013-03-12 12:06:40 +0700
committerhathach <[email protected]>2013-03-12 12:06:40 +0700
commit453ea3986563c11c74ab3bf9d773a90458635ede (patch)
tree458c107257cb73cfcdb5b77aa2ef7131e19dbdd8
parent38ff7123b4f43aa85ce1848a0cb99bb73303cadd (diff)
add project file for keil
fix binary.h compiler specific add hal_init code to reset & set usbmode --> able to get USB ISR remove const qualifier from return function of - get_operational_register - get_period_frame_list - get_async_head - get_period_head - get_control_qhd add stub for - hcd_port_connect_status - hcd_port_speed
-rw-r--r--demos/bsp/boards/board.c1
-rw-r--r--demos/bsp/lpc43xx/startup_keil/startup_LPC43xx_arm.s346
-rw-r--r--demos/host/.cproject17
-rw-r--r--demos/host/.project11
-rw-r--r--demos/host/host.uvopt832
-rw-r--r--demos/host/host.uvproj640
-rw-r--r--demos/host/main.c5
-rw-r--r--demos/host/tusb_config.h14
-rw-r--r--tinyusb/class/hid.h16
-rw-r--r--tinyusb/class/msc_host.c59
-rw-r--r--tinyusb/class/msc_host.h83
-rw-r--r--tinyusb/common/binary.h20
-rw-r--r--tinyusb/hal/hal_lpc43xx.c16
-rw-r--r--tinyusb/host/ehci/ehci.c43
-rw-r--r--tinyusb/host/ehci/ehci.h3
-rw-r--r--tinyusb/host/hcd.h1
-rw-r--r--tinyusb/host/usbh.c9
-rw-r--r--tinyusb/host/usbh.h12
-rw-r--r--tinyusb/osal/osal_common.h2
-rw-r--r--tinyusb/osal/osal_none.h2
20 files changed, 2074 insertions, 58 deletions
diff --git a/demos/bsp/boards/board.c b/demos/bsp/boards/board.c
index aca9f16e2..4bc7ea051 100644
--- a/demos/bsp/boards/board.c
+++ b/demos/bsp/boards/board.c
@@ -42,6 +42,7 @@ volatile uint32_t system_ticks = 0;
void SysTick_Handler (void)
{
system_ticks++;
+ tusb_tick_tock(); // TODO temporarily
}
void check_failed(uint8_t *file, uint32_t line)
diff --git a/demos/bsp/lpc43xx/startup_keil/startup_LPC43xx_arm.s b/demos/bsp/lpc43xx/startup_keil/startup_LPC43xx_arm.s
new file mode 100644
index 000000000..0353860e1
--- /dev/null
+++ b/demos/bsp/lpc43xx/startup_keil/startup_LPC43xx_arm.s
@@ -0,0 +1,346 @@
+;/***********************************************************************
+; * $Id: startup_LPC43xx.s 6473 2011-02-16 17:40:54Z nxp27266 $
+; *
+; * Project: LPC43xx CMSIS Package
+; *
+; * Description: Cortex-M3 Core Device Startup File for the NXP LPC43xx
+; * Device Series.
+; *
+; * Copyright(C) 2011, NXP Semiconductor
+; * All rights reserved.
+; *
+; * modified by KEIL
+; ***********************************************************************
+; * Software that is described herein is for illustrative purposes only
+; * which provides customers with programming information regarding the
+; * products. This software is supplied "AS IS" without any warranties.
+; * NXP Semiconductors assumes no responsibility or liability for the
+; * use of the software, conveys no license or title under any patent,
+; * copyright, or mask work right to the product. NXP Semiconductors
+; * reserves the right to make changes in the software without
+; * notification. NXP Semiconductors also make no representation or
+; * warranty that such application will be suitable for the specified
+; * use without further testing or modification.
+; **********************************************************************/
+
+; <h> Stack Configuration
+; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Stack_Size EQU 0x00000400
+
+ AREA STACK, NOINIT, READWRITE, ALIGN=3
+Stack_Mem SPACE Stack_Size
+__initial_sp
+
+
+; <h> Heap Configuration
+; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
+; </h>
+
+Heap_Size EQU 0x00000200
+
+ AREA HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem SPACE Heap_Size
+__heap_limit
+
+ PRESERVE8
+ THUMB
+
+; Vector Table Mapped to Address 0 at Reset
+
+ AREA RESET, DATA, READONLY
+ EXPORT __Vectors
+
+Sign_Value EQU 0x5A5A5A5A
+
+__Vectors DCD __initial_sp ; 0 Top of Stack
+ DCD Reset_Handler ; 1 Reset Handler
+ DCD NMI_Handler ; 2 NMI Handler
+ DCD HardFault_Handler ; 3 Hard Fault Handler
+ DCD MemManage_Handler ; 4 MPU Fault Handler
+ DCD BusFault_Handler ; 5 Bus Fault Handler
+ DCD UsageFault_Handler ; 6 Usage Fault Handler
+ DCD Sign_Value ; 7 Reserved
+ DCD 0 ; 8 Reserved
+ DCD 0 ; 9 Reserved
+ DCD 0 ; 10 Reserved
+ DCD SVC_Handler ; 11 SVCall Handler
+ DCD DebugMon_Handler ; 12 Debug Monitor Handler
+ DCD 0 ; 13 Reserved
+ DCD PendSV_Handler ; 14 PendSV Handler
+ DCD SysTick_Handler ; 15 SysTick Handler
+
+ ; External Interrupts
+ DCD DAC_IRQHandler ; 16 D/A Converter
+ DCD M0CORE_IRQHandler ; 17 M0 Core
+ DCD DMA_IRQHandler ; 18 General Purpose DMA
+ DCD EZH_IRQHandler ; 19 EZH/EDM
+ DCD FLASH_EEPROM_IRQHandler ; 20 Reserved for Typhoon
+ DCD ETH_IRQHandler ; 21 Ethernet
+ DCD SDIO_IRQHandler ; 22 SD/MMC
+ DCD LCD_IRQHandler ; 23 LCD
+ DCD USB0_IRQHandler ; 24 USB0
+ DCD USB1_IRQHandler ; 25 USB1
+ DCD SCT_IRQHandler ; 26 State Configurable Timer
+ DCD RIT_IRQHandler ; 27 Repetitive Interrupt Timer
+ DCD TIMER0_IRQHandler ; 28 Timer0
+ DCD TIMER1_IRQHandler ; 29 Timer1
+ DCD TIMER2_IRQHandler ; 30 Timer2
+ DCD TIMER3_IRQHandler ; 31 Timer3
+ DCD MCPWM_IRQHandler ; 32 Motor Control PWM
+ DCD ADC0_IRQHandler ; 33 A/D Converter 0
+ DCD I2C0_IRQHandler ; 34 I2C0
+ DCD I2C1_IRQHandler ; 35 I2C1
+ DCD SPI_IRQHandler ; 36 SPI
+ DCD ADC1_IRQHandler ; 37 A/D Converter 1
+ DCD SSP0_IRQHandler ; 38 SSP0
+ DCD SSP1_IRQHandler ; 39 SSP1
+ DCD UART0_IRQHandler ; 40 UART0
+ DCD UART1_IRQHandler ; 41 UART1
+ DCD UART2_IRQHandler ; 42 UART2
+ DCD UART3_IRQHandler ; 43 UART3
+ DCD I2S0_IRQHandler ; 44 I2S0
+ DCD I2S1_IRQHandler ; 45 I2S1
+ DCD SPIFI_IRQHandler ; 46 SPI Flash Interface
+ DCD SGPIO_IRQHandler ; 47 SGPIO
+ DCD GPIO0_IRQHandler ; 48 GPIO0
+ DCD GPIO1_IRQHandler ; 49 GPIO1
+ DCD GPIO2_IRQHandler ; 50 GPIO2
+ DCD GPIO3_IRQHandler ; 51 GPIO3
+ DCD GPIO4_IRQHandler ; 52 GPIO4
+ DCD GPIO5_IRQHandler ; 53 GPIO5
+ DCD GPIO6_IRQHandler ; 54 GPIO6
+ DCD GPIO7_IRQHandler ; 55 GPIO7
+ DCD GINT0_IRQHandler ; 56 GINT0
+ DCD GINT1_IRQHandler ; 57 GINT1
+ DCD EVRT_IRQHandler ; 58 Event Router
+ DCD CAN1_IRQHandler ; 59 C_CAN1
+ DCD 0 ; 60 Reserved
+ DCD VADC_IRQHandler ; 61 VADC
+ DCD ATIMER_IRQHandler ; 62 ATIMER
+ DCD RTC_IRQHandler ; 63 RTC
+ DCD 0 ; 64 Reserved
+ DCD WDT_IRQHandler ; 65 WDT
+ DCD M0s_IRQHandler ; 66 M0s
+ DCD CAN0_IRQHandler ; 67 C_CAN0
+ DCD QEI_IRQHandler ; 68 QEI
+
+
+;CRP address at offset 0x2FC relative to the BOOT Bank address
+ IF :LNOT::DEF:NO_CRP
+ SPACE (0x2FC - (. - __Vectors))
+; EXPORT CRP_Key
+CRP_Key DCD 0xFFFFFFFF
+; 0xFFFFFFFF => CRP Disabled
+; 0x12345678 => CRP Level 1
+; 0x87654321 => CRP Level 2
+; 0x43218765 => CRP Level 3 (ARE YOU SURE?)
+; 0x4E697370 => NO ISP (ARE YOU SURE?)
+ ENDIF
+
+ AREA |.text|, CODE, READONLY
+
+; Reset Handler
+
+Reset_Handler PROC
+ EXPORT Reset_Handler [WEAK]
+ IMPORT SystemInit
+ IMPORT __main
+ LDR R0, =SystemInit
+ BLX R0
+ LDR R0, =__main
+ BX R0
+ ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler PROC
+ EXPORT NMI_Handler [WEAK]
+ B .
+ ENDP
+HardFault_Handler\
+ PROC
+ EXPORT HardFault_Handler [WEAK]
+ B .
+ ENDP
+MemManage_Handler\
+ PROC
+ EXPORT MemManage_Handler [WEAK]
+ B .
+ ENDP
+BusFault_Handler\
+ PROC
+ EXPORT BusFault_Handler [WEAK]
+ B .
+ ENDP
+UsageFault_Handler\
+ PROC
+ EXPORT UsageFault_Handler [WEAK]
+ B .
+ ENDP
+SVC_Handler PROC
+ EXPORT SVC_Handler [WEAK]
+ B .
+ ENDP
+DebugMon_Handler\
+ PROC
+ EXPORT DebugMon_Handler [WEAK]
+ B .
+ ENDP
+PendSV_Handler PROC
+ EXPORT PendSV_Handler [WEAK]
+ B .
+ ENDP
+SysTick_Handler PROC
+ EXPORT SysTick_Handler [WEAK]
+ B .
+ ENDP
+
+Default_Handler PROC
+
+ EXPORT DAC_IRQHandler [WEAK]
+ EXPORT M0CORE_IRQHandler [WEAK]
+ EXPORT DMA_IRQHandler [WEAK]
+ EXPORT EZH_IRQHandler [WEAK]
+ EXPORT FLASH_EEPROM_IRQHandler [WEAK]
+ EXPORT ETH_IRQHandler [WEAK]
+ EXPORT SDIO_IRQHandler [WEAK]
+ EXPORT LCD_IRQHandler [WEAK]
+ EXPORT USB0_IRQHandler [WEAK]
+ EXPORT USB1_IRQHandler [WEAK]
+ EXPORT SCT_IRQHandler [WEAK]
+ EXPORT RIT_IRQHandler [WEAK]
+ EXPORT TIMER0_IRQHandler [WEAK]
+ EXPORT TIMER1_IRQHandler [WEAK]
+ EXPORT TIMER2_IRQHandler [WEAK]
+ EXPORT TIMER3_IRQHandler [WEAK]
+ EXPORT MCPWM_IRQHandler [WEAK]
+ EXPORT ADC0_IRQHandler [WEAK]
+ EXPORT I2C0_IRQHandler [WEAK]
+ EXPORT I2C1_IRQHandler [WEAK]
+ EXPORT SPI_IRQHandler [WEAK]
+ EXPORT ADC1_IRQHandler [WEAK]
+ EXPORT SSP0_IRQHandler [WEAK]
+ EXPORT SSP1_IRQHandler [WEAK]
+ EXPORT UART0_IRQHandler [WEAK]
+ EXPORT UART1_IRQHandler [WEAK]
+ EXPORT UART2_IRQHandler [WEAK]
+ EXPORT UART3_IRQHandler [WEAK]
+ EXPORT I2S0_IRQHandler [WEAK]
+ EXPORT I2S1_IRQHandler [WEAK]
+ EXPORT SPIFI_IRQHandler [WEAK]
+ EXPORT SGPIO_IRQHandler [WEAK]
+ EXPORT GPIO0_IRQHandler [WEAK]
+ EXPORT GPIO1_IRQHandler [WEAK]
+ EXPORT GPIO2_IRQHandler [WEAK]
+ EXPORT GPIO3_IRQHandler [WEAK]
+ EXPORT GPIO4_IRQHandler [WEAK]
+ EXPORT GPIO5_IRQHandler [WEAK]
+ EXPORT GPIO6_IRQHandler [WEAK]
+ EXPORT GPIO7_IRQHandler [WEAK]
+ EXPORT GINT0_IRQHandler [WEAK]
+ EXPORT GINT1_IRQHandler [WEAK]
+ EXPORT EVRT_IRQHandler [WEAK]
+ EXPORT CAN1_IRQHandler [WEAK]
+ EXPORT VADC_IRQHandler [WEAK]
+ EXPORT ATIMER_IRQHandler [WEAK]
+ EXPORT RTC_IRQHandler [WEAK]
+ EXPORT WDT_IRQHandler [WEAK]
+ EXPORT M0s_IRQHandler [WEAK]
+ EXPORT CAN0_IRQHandler [WEAK]
+ EXPORT QEI_IRQHandler [WEAK]
+
+DAC_IRQHandler
+M0CORE_IRQHandler
+DMA_IRQHandler
+EZH_IRQHandler
+FLASH_EEPROM_IRQHandler
+ETH_IRQHandler
+SDIO_IRQHandler
+LCD_IRQHandler
+USB0_IRQHandler
+USB1_IRQHandler
+SCT_IRQHandler
+RIT_IRQHandler
+TIMER0_IRQHandler
+TIMER1_IRQHandler
+TIMER2_IRQHandler
+TIMER3_IRQHandler
+MCPWM_IRQHandler
+ADC0_IRQHandler
+I2C0_IRQHandler
+I2C1_IRQHandler
+SPI_IRQHandler
+ADC1_IRQHandler
+SSP0_IRQHandler
+SSP1_IRQHandler
+UART0_IRQHandler
+UART1_IRQHandler
+UART2_IRQHandler
+UART3_IRQHandler
+I2S0_IRQHandler
+I2S1_IRQHandler
+SPIFI_IRQHandler
+SGPIO_IRQHandler
+GPIO0_IRQHandler
+GPIO1_IRQHandler
+GPIO2_IRQHandler
+GPIO3_IRQHandler
+GPIO4_IRQHandler
+GPIO5_IRQHandler
+GPIO6_IRQHandler
+GPIO7_IRQHandler
+GINT0_IRQHandler
+GINT1_IRQHandler
+EVRT_IRQHandler
+CAN1_IRQHandler
+VADC_IRQHandler
+ATIMER_IRQHandler
+RTC_IRQHandler
+WDT_IRQHandler
+M0s_IRQHandler
+CAN0_IRQHandler
+QEI_IRQHandler
+
+ B .
+
+ ENDP
+
+ ALIGN
+
+; User Initial Stack & Heap
+
+ IF :DEF:__MICROLIB
+
+ EXPORT __initial_sp
+ EXPORT __heap_base
+ EXPORT __heap_limit
+
+ ELSE
+
+ IMPORT __use_two_region_memory
+ EXPORT __user_initial_stackheap
+__user_initial_stackheap
+
+ LDR R0, = Heap_Mem
+ LDR R1, =(Stack_Mem + Stack_Size)
+ LDR R2, = (Heap_Mem + Heap_Size)
+ LDR R3, = Stack_Mem
+ BX LR
+
+ ALIGN
+
+ ENDIF
+
+ AREA |.text|,CODE, READONLY
+getPC PROC
+ EXPORT getPC
+
+ MOV R0,LR
+ BX LR
+
+ ENDP
+
+ END
diff --git a/demos/host/.cproject b/demos/host/.cproject
index 015a21dfb..76da339f4 100644
--- a/demos/host/.cproject
+++ b/demos/host/.cproject
@@ -1318,8 +1318,8 @@
<storageModule moduleId="com.crt.config">
<projectStorage>&lt;?xml version="1.0" encoding="UTF-8"?&gt;&#13;
&lt;TargetConfig&gt;&#13;
-&lt;Properties property_0="" property_3="NXP" property_4="LPC4330" property_count="5" version="1"/&gt;&#13;
-&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC4330" match_id="0x0" name="LPC4330" stub="crt_emu_lpc18_43_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC4330&lt;/name&gt;&#13;
+&lt;Properties property_0="" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="1"/&gt;&#13;
+&lt;infoList vendor="NXP"&gt;&lt;info chip="LPC4357" flash_driver="LPC18x7_43x7_2x512_BootA.cfx" match_id="0x0" name="LPC4357" stub="crt_emu_lpc18_43_nxp"&gt;&lt;chip&gt;&lt;name&gt;LPC4357&lt;/name&gt;&#13;
&lt;family&gt;LPC43xx&lt;/family&gt;&#13;
&lt;vendor&gt;NXP (formerly Philips)&lt;/vendor&gt;&#13;
&lt;reset board="None" core="Real" sys="Real"/&gt;&#13;
@@ -1327,11 +1327,17 @@
&lt;memory can_program="true" id="Flash" is_ro="true" type="Flash"/&gt;&#13;
&lt;memory id="RAM" type="RAM"/&gt;&#13;
&lt;memory id="Periph" is_volatile="true" type="Peripheral"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc128" location="0x10000000" size="0x20000"/&gt;&#13;
-&lt;memoryInstance derived_from="RAM" id="RamLoc72" location="0x10080000" size="0x12000"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlashA512" location="0x1a000000" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="Flash" id="MFlashB512" location="0x1b000000" size="0x80000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/&gt;&#13;
+&lt;memoryInstance derived_from="RAM" id="RamLoc40" location="0x10080000" size="0xa000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamAHB32" location="0x20000000" size="0x8000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamAHB16" location="0x20008000" size="0x4000"/&gt;&#13;
&lt;memoryInstance derived_from="RAM" id="RamAHB_ETB16" location="0x2000c000" size="0x4000"/&gt;&#13;
+&lt;prog_flash blocksz="0x2000" location="0x1a000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x10000" location="0x1a010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/&gt;&#13;
+&lt;prog_flash blocksz="0x2000" location="0x1b000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/&gt;&#13;
+&lt;prog_flash blocksz="0x10000" location="0x1b010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/&gt;&#13;
&lt;peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/&gt;&#13;
@@ -1342,6 +1348,7 @@
&lt;peripheralInstance derived_from="EMC" id="EMC" location="0x40005000"/&gt;&#13;
&lt;peripheralInstance derived_from="USB0" id="USB0" location="0x40006000"/&gt;&#13;
&lt;peripheralInstance derived_from="USB1" id="USB1" location="0x40007000"/&gt;&#13;
+&lt;peripheralInstance derived_from="LCD" id="LCD" location="0x40008000"/&gt;&#13;
&lt;peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x40010000"/&gt;&#13;
&lt;peripheralInstance derived_from="ATIMER" id="ATIMER" location="0x40040000"/&gt;&#13;
&lt;peripheralInstance derived_from="REGFILE" id="REGFILE" location="0x40041000"/&gt;&#13;
@@ -1382,8 +1389,6 @@
&lt;peripheralInstance derived_from="ADC0" id="ADC0" location="0x400e3000"/&gt;&#13;
&lt;peripheralInstance derived_from="ADC1" id="ADC1" location="0x400e4000"/&gt;&#13;
&lt;peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x400f4000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SPI" id="SPI" location="0x40100000"/&gt;&#13;
-&lt;peripheralInstance derived_from="SGPIO" id="SGPIO" location="0x40101000"/&gt;&#13;
&lt;/chip&gt;&#13;
&lt;processor&gt;&lt;name gcc_name="cortex-m4"&gt;Cortex-M4&lt;/name&gt;&#13;
&lt;family&gt;Cortex-M&lt;/family&gt;&#13;
diff --git a/demos/host/.project b/demos/host/.project
index a74d2a05b..a2f5345a9 100644
--- a/demos/host/.project
+++ b/demos/host/.project
@@ -94,7 +94,7 @@
</linkedResources>
<filteredResources>
<filter>
- <id>1359278214124</id>
+ <id>1363062796914</id>
<name></name>
<type>26</type>
<matcher>
@@ -102,5 +102,14 @@
<arguments>1.0-name-matches-false-false-startup_keil</arguments>
</matcher>
</filter>
+ <filter>
+ <id>1363062796957</id>
+ <name></name>
+ <type>26</type>
+ <matcher>
+ <id>org.eclipse.ui.ide.multiFilter</id>
+ <arguments>1.0-name-matches-false-false-UV4Build</arguments>
+ </matcher>
+ </filter>
</filteredResources>
</projectDescription>
diff --git a/demos/host/host.uvopt b/demos/host/host.uvopt
new file mode 100644
index 000000000..f5da91fdf
--- /dev/null
+++ b/demos/host/host.uvopt
@@ -0,0 +1,832 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+ <SchemaVersion>1.0</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Extensions>
+ <cExt>*.c</cExt>
+ <aExt>*.s*; *.src; *.a*</aExt>
+ <oExt>*.obj</oExt>
+ <lExt>*.lib</lExt>
+ <tExt>*.txt; *.h; *.inc</tExt>
+ <pExt>*.plm</pExt>
+ <CppX>*.cpp</CppX>
+ </Extensions>
+
+ <DaveTm>
+ <dwLowDateTime>0</dwLowDateTime>
+ <dwHighDateTime>0</dwHighDateTime>
+ </DaveTm>
+
+ <Target>
+ <TargetName>LPC4357</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <CLKADS>12000000</CLKADS>
+ <OPTTT>
+ <gFlags>0</gFlags>
+ <BeepAtEnd>1</BeepAtEnd>
+ <RunSim>0</RunSim>
+ <RunTarget>1</RunTarget>
+ </OPTTT>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <FlashByte>65535</FlashByte>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ </OPTHX>
+ <OPTLEX>
+ <PageWidth>79</PageWidth>
+ <PageLength>66</PageLength>
+ <TabStop>8</TabStop>
+ <ListingPath>.\</ListingPath>
+ </OPTLEX>
+ <ListingPage>
+ <CreateCListing>1</CreateCListing>
+ <CreateAListing>1</CreateAListing>
+ <CreateLListing>1</CreateLListing>
+ <CreateIListing>0</CreateIListing>
+ <AsmCond>1</AsmCond>
+ <AsmSymb>1</AsmSymb>
+ <AsmXref>0</AsmXref>
+ <CCond>1</CCond>
+ <CCode>0</CCode>
+ <CListInc>0</CListInc>
+ <CSymb>0</CSymb>
+ <LinkerCodeListing>0</LinkerCodeListing>
+ </ListingPage>
+ <OPTXL>
+ <LMap>1</LMap>
+ <LComments>1</LComments>
+ <LGenerateSymbols>1</LGenerateSymbols>
+ <LLibSym>1</LLibSym>
+ <LLines>1</LLines>
+ <LLocSym>1</LLocSym>
+ <LPubSym>1</LPubSym>
+ <LXref>0</LXref>
+ <LExpSel>0</LExpSel>
+ </OPTXL>
+ <OPTFL>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <IsCurrentTarget>1</IsCurrentTarget>
+ </OPTFL>
+ <CpuCode>8</CpuCode>
+ <Books>
+ <Book>
+ <Number>0</Number>
+ <Title>Technical Reference Manual</Title>
+ <Path>datashts\arm\cortex_m4\r0p1\DDI0439C_CORTEX_M4_R0P1_TRM.PDF</Path>
+ </Book>
+ <Book>
+ <Number>1</Number>
+ <Title>Generic User Guide</Title>
+ <Path>datashts\arm\cortex_m4\r0p1\DUI0553A_CORTEX_M4_DGUG.PDF</Path>
+ </Book>
+ </Books>
+ <DllOpt>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments>-MPU</SimDllArguments>
+ <SimDlgDllName>DCM.DLL</SimDlgDllName>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments>-MPU</TargetDllArguments>
+ <TargetDlgDllName>TCM.DLL</TargetDlgDllName>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOpt>
+ <DebugOpt>
+ <uSim>0</uSim>
+ <uTrg>1</uTrg>
+ <sLdApp>1</sLdApp>
+ <sGomain>1</sGomain>
+ <sRbreak>1</sRbreak>
+ <sRwatch>1</sRwatch>
+ <sRmem>1</sRmem>
+ <sRfunc>1</sRfunc>
+ <sRbox>1</sRbox>
+ <tLdApp>1</tLdApp>
+ <tGomain>0</tGomain>
+ <tRbreak>1</tRbreak>
+ <tRwatch>1</tRwatch>
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+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../tinyusb/host/hcd.c</PathWithFileName>
+ <FilenameWithoutPath>hcd.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ <File>
+ <GroupNumber>14</GroupNumber>
+ <FileNumber>31</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../tinyusb/host/usbh.c</PathWithFileName>
+ <FilenameWithoutPath>usbh.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>tinyusb_host_ehci</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>15</GroupNumber>
+ <FileNumber>32</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../tinyusb/host/ehci/ehci.c</PathWithFileName>
+ <FilenameWithoutPath>ehci.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+ <Group>
+ <GroupName>tinyusb_osal</GroupName>
+ <tvExp>0</tvExp>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <cbSel>0</cbSel>
+ <RteFlg>0</RteFlg>
+ <File>
+ <GroupNumber>16</GroupNumber>
+ <FileNumber>33</FileNumber>
+ <FileType>1</FileType>
+ <tvExp>0</tvExp>
+ <Focus>0</Focus>
+ <ColumnNumber>0</ColumnNumber>
+ <tvExpOptDlg>0</tvExpOptDlg>
+ <TopLine>0</TopLine>
+ <CurrentLine>0</CurrentLine>
+ <bDave2>0</bDave2>
+ <PathWithFileName>../../tinyusb/osal/osal_none.c</PathWithFileName>
+ <FilenameWithoutPath>osal_none.c</FilenameWithoutPath>
+ <RteFlg>0</RteFlg>
+ <bShared>0</bShared>
+ </File>
+ </Group>
+
+</ProjectOpt>
diff --git a/demos/host/host.uvproj b/demos/host/host.uvproj
new file mode 100644
index 000000000..23baa0f06
--- /dev/null
+++ b/demos/host/host.uvproj
@@ -0,0 +1,640 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd">
+
+ <SchemaVersion>1.1</SchemaVersion>
+
+ <Header>### uVision Project, (C) Keil Software</Header>
+
+ <Targets>
+ <Target>
+ <TargetName>LPC4357</TargetName>
+ <ToolsetNumber>0x4</ToolsetNumber>
+ <ToolsetName>ARM-ADS</ToolsetName>
+ <TargetOption>
+ <TargetCommonOption>
+ <Device>LPC4357</Device>
+ <Vendor>NXP (founded by Philips)</Vendor>
+ <Cpu>IRAM(0x10000000-0x10007FFF) IRAM2(0x20000000-0x2000FFFF) IROM(0x1A000000-0x1A07FFFF) IROM2(0x1B000000-0x1B07FFFF) CLOCK(12000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
+ <FlashUtilSpec></FlashUtilSpec>
+ <StartupFile>"STARTUP\NXP\LPC43xx\startup_LPC43xx.s" ("NXP LPC43xx Startup Code")</StartupFile>
+ <FlashDriverDll>UL2CM3(-O975 -S0 -C0 -FO7 -FD10000000 -FC800 -FN2 -FF0LPC18xx43xx_512_BA -FS01A000000 -FL080000 -FF1LPC18xx43xx_512_BB -FS11B000000 -FL180000)</FlashDriverDll>
+ <DeviceId>6414</DeviceId>
+ <RegisterFile>LPC43xx.H</RegisterFile>
+ <MemoryEnv></MemoryEnv>
+ <Cmp></Cmp>
+ <Asm></Asm>
+ <Linker></Linker>
+ <OHString></OHString>
+ <InfinionOptionDll></InfinionOptionDll>
+ <SLE66CMisc></SLE66CMisc>
+ <SLE66AMisc></SLE66AMisc>
+ <SLE66LinkerMisc></SLE66LinkerMisc>
+ <SFDFile>SFD\NXP\LPC43xx\LPC43xx.SFR</SFDFile>
+ <UseEnv>0</UseEnv>
+ <BinPath></BinPath>
+ <IncludePath></IncludePath>
+ <LibPath></LibPath>
+ <RegisterFilePath>NXP\LPC43xx\</RegisterFilePath>
+ <DBRegisterFilePath>NXP\LPC43xx\</DBRegisterFilePath>
+ <TargetStatus>
+ <Error>0</Error>
+ <ExitCodeStop>0</ExitCodeStop>
+ <ButtonStop>0</ButtonStop>
+ <NotGenerated>0</NotGenerated>
+ <InvalidFlash>1</InvalidFlash>
+ </TargetStatus>
+ <OutputDirectory>.\UV4Build\</OutputDirectory>
+ <OutputName>host</OutputName>
+ <CreateExecutable>1</CreateExecutable>
+ <CreateLib>0</CreateLib>
+ <CreateHexFile>0</CreateHexFile>
+ <DebugInformation>1</DebugInformation>
+ <BrowseInformation>1</BrowseInformation>
+ <ListingPath>.\</ListingPath>
+ <HexFormatSelection>1</HexFormatSelection>
+ <Merge32K>0</Merge32K>
+ <CreateBatchFile>0</CreateBatchFile>
+ <BeforeCompile>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ <nStopU1X>0</nStopU1X>
+ <nStopU2X>0</nStopU2X>
+ </BeforeCompile>
+ <BeforeMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </BeforeMake>
+ <AfterMake>
+ <RunUserProg1>0</RunUserProg1>
+ <RunUserProg2>0</RunUserProg2>
+ <UserProg1Name></UserProg1Name>
+ <UserProg2Name></UserProg2Name>
+ <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+ <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+ </AfterMake>
+ <SelectedForBatchBuild>0</SelectedForBatchBuild>
+ <SVCSIdString></SVCSIdString>
+ </TargetCommonOption>
+ <CommonProperty>
+ <UseCPPCompiler>0</UseCPPCompiler>
+ <RVCTCodeConst>0</RVCTCodeConst>
+ <RVCTZI>0</RVCTZI>
+ <RVCTOtherData>0</RVCTOtherData>
+ <ModuleSelection>0</ModuleSelection>
+ <IncludeInBuild>1</IncludeInBuild>
+ <AlwaysBuild>0</AlwaysBuild>
+ <GenerateAssemblyFile>0</GenerateAssemblyFile>
+ <AssembleAssemblyFile>0</AssembleAssemblyFile>
+ <PublicsOnly>0</PublicsOnly>
+ <StopOnExitCode>3</StopOnExitCode>
+ <CustomArgument></CustomArgument>
+ <IncludeLibraryModules></IncludeLibraryModules>
+ </CommonProperty>
+ <DllOption>
+ <SimDllName>SARMCM3.DLL</SimDllName>
+ <SimDllArguments>-MPU</SimDllArguments>
+ <SimDlgDll>DCM.DLL</SimDlgDll>
+ <SimDlgDllArguments>-pCM4</SimDlgDllArguments>
+ <TargetDllName>SARMCM3.DLL</TargetDllName>
+ <TargetDllArguments>-MPU</TargetDllArguments>
+ <TargetDlgDll>TCM.DLL</TargetDlgDll>
+ <TargetDlgDllArguments>-pCM4</TargetDlgDllArguments>
+ </DllOption>
+ <DebugOption>
+ <OPTHX>
+ <HexSelection>1</HexSelection>
+ <HexRangeLowAddress>0</HexRangeLowAddress>
+ <HexRangeHighAddress>0</HexRangeHighAddress>
+ <HexOffset>0</HexOffset>
+ <Oh166RecLen>16</Oh166RecLen>
+ </OPTHX>
+ <Simulator>
+ <UseSimulator>0</UseSimulator>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>1</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>1</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <LimitSpeedToRealTime>0</LimitSpeedToRealTime>
+ </Simulator>
+ <Target>
+ <UseTarget>1</UseTarget>
+ <LoadApplicationAtStartup>1</LoadApplicationAtStartup>
+ <RunToMain>0</RunToMain>
+ <RestoreBreakpoints>1</RestoreBreakpoints>
+ <RestoreWatchpoints>1</RestoreWatchpoints>
+ <RestoreMemoryDisplay>1</RestoreMemoryDisplay>
+ <RestoreFunctions>0</RestoreFunctions>
+ <RestoreToolbox>1</RestoreToolbox>
+ <RestoreTracepoints>1</RestoreTracepoints>
+ </Target>
+ <RunDebugAfterBuild>0</RunDebugAfterBuild>
+ <TargetSelection>1</TargetSelection>
+ <SimDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ </SimDlls>
+ <TargetDlls>
+ <CpuDll></CpuDll>
+ <CpuDllArguments></CpuDllArguments>
+ <PeripheralDll></PeripheralDll>
+ <PeripheralDllArguments></PeripheralDllArguments>
+ <InitializationFile></InitializationFile>
+ <Driver>BIN\UL2CM3.DLL</Driver>
+ </TargetDlls>
+ </DebugOption>
+ <Utilities>
+ <Flash1>
+ <UseTargetDll>1</UseTargetDll>
+ <UseExternalTool>0</UseExternalTool>
+ <RunIndependent>0</RunIndependent>
+ <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+ <Capability>0</Capability>
+ <DriverSelection>-1</DriverSelection>
+ </Flash1>
+ <Flash2>BIN\UL2CM3.DLL</Flash2>
+ <Flash3></Flash3>
+ <Flash4></Flash4>
+ </Utilities>
+ <TargetArmAds>
+ <ArmAdsMisc>
+ <GenerateListings>0</GenerateListings>
+ <asHll>1</asHll>
+ <asAsm>1</asAsm>
+ <asMacX>1</asMacX>
+ <asSyms>1</asSyms>
+ <asFals>1</asFals>
+ <asDbgD>1</asDbgD>
+ <asForm>1</asForm>
+ <ldLst>0</ldLst>
+ <ldmm>1</ldmm>
+ <ldXref>1</ldXref>
+ <BigEnd>0</BigEnd>
+ <AdsALst>1</AdsALst>
+ <AdsACrf>1</AdsACrf>
+ <AdsANop>0</AdsANop>
+ <AdsANot>0</AdsANot>
+ <AdsLLst>1</AdsLLst>
+ <AdsLmap>1</AdsLmap>
+ <AdsLcgr>1</AdsLcgr>
+ <AdsLsym>1</AdsLsym>
+ <AdsLszi>1</AdsLszi>
+ <AdsLtoi>1</AdsLtoi>
+ <AdsLsun>1</AdsLsun>
+ <AdsLven>1</AdsLven>
+ <AdsLsxf>1</AdsLsxf>
+ <RvctClst>0</RvctClst>
+ <GenPPlst>0</GenPPlst>
+ <AdsCpuType>"Cortex-M4"</AdsCpuType>
+ <RvctDeviceName></RvctDeviceName>
+ <mOS>0</mOS>
+ <uocRom>0</uocRom>
+ <uocRam>0</uocRam>
+ <hadIROM>1</hadIROM>
+ <hadIRAM>1</hadIRAM>
+ <hadXRAM>0</hadXRAM>
+ <uocXRam>0</uocXRam>
+ <RvdsVP>2</RvdsVP>
+ <hadIRAM2>1</hadIRAM2>
+ <hadIROM2>1</hadIROM2>
+ <StupSel>8</StupSel>
+ <useUlib>1</useUlib>
+ <EndSel>0</EndSel>
+ <uLtcg>0</uLtcg>
+ <RoSelD>3</RoSelD>
+ <RwSelD>3</RwSelD>
+ <CodeSel>0</CodeSel>
+ <OptFeed>0</OptFeed>
+ <NoZi1>0</NoZi1>
+ <NoZi2>0</NoZi2>
+ <NoZi3>0</NoZi3>
+ <NoZi4>0</NoZi4>
+ <NoZi5>0</NoZi5>
+ <Ro1Chk>0</Ro1Chk>
+ <Ro2Chk>0</Ro2Chk>
+ <Ro3Chk>0</Ro3Chk>
+ <Ir1Chk>1</Ir1Chk>
+ <Ir2Chk>0</Ir2Chk>
+ <Ra1Chk>0</Ra1Chk>
+ <Ra2Chk>0</Ra2Chk>
+ <Ra3Chk>0</Ra3Chk>
+ <Im1Chk>1</Im1Chk>
+ <Im2Chk>0</Im2Chk>
+ <OnChipMemories>
+ <Ocm1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm1>
+ <Ocm2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm2>
+ <Ocm3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm3>
+ <Ocm4>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm4>
+ <Ocm5>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm5>
+ <Ocm6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </Ocm6>
+ <IRAM>
+ <Type>0</Type>
+ <StartAddress>0x10000000</StartAddress>
+ <Size>0x8000</Size>
+ </IRAM>
+ <IROM>
+ <Type>1</Type>
+ <StartAddress>0x1a000000</StartAddress>
+ <Size>0x80000</Size>
+ </IROM>
+ <XRAM>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </XRAM>
+ <OCR_RVCT1>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT1>
+ <OCR_RVCT2>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT2>
+ <OCR_RVCT3>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT3>
+ <OCR_RVCT4>
+ <Type>1</Type>
+ <StartAddress>0x1a000000</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT4>
+ <OCR_RVCT5>
+ <Type>1</Type>
+ <StartAddress>0x1b000000</StartAddress>
+ <Size>0x80000</Size>
+ </OCR_RVCT5>
+ <OCR_RVCT6>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT6>
+ <OCR_RVCT7>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT7>
+ <OCR_RVCT8>
+ <Type>0</Type>
+ <StartAddress>0x0</StartAddress>
+ <Size>0x0</Size>
+ </OCR_RVCT8>
+ <OCR_RVCT9>
+ <Type>0</Type>
+ <StartAddress>0x10000000</StartAddress>
+ <Size>0x8000</Size>
+ </OCR_RVCT9>
+ <OCR_RVCT10>
+ <Type>0</Type>
+ <StartAddress>0x20000000</StartAddress>
+ <Size>0x10000</Size>
+ </OCR_RVCT10>
+ </OnChipMemories>
+ <RvctStartVector></RvctStartVector>
+ </ArmAdsMisc>
+ <Cads>
+ <interw>1</interw>
+ <Optim>1</Optim>
+ <oTime>0</oTime>
+ <SplitLS>0</SplitLS>
+ <OneElfS>0</OneElfS>
+ <Strict>0</Strict>
+ <EnumInt>0</EnumInt>
+ <PlainCh>0</PlainCh>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <wLevel>0</wLevel>
+ <uThumb>0</uThumb>
+ <uSurpInc>0</uSurpInc>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath>C:/Users/hathach/Dropbox/tinyusb/workspace/CMSISv2p10_LPC43xx_DriverLib/inc;C:/Users/hathach/Dropbox/tinyusb/workspace/tinyusb/demos/bsp;C:/Users/hathach/Dropbox/tinyusb/workspace/tinyusb/tinyusb</IncludePath>
+ </VariousControls>
+ </Cads>
+ <Aads>
+ <interw>1</interw>
+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
+ <thumb>0</thumb>
+ <SplitLS>0</SplitLS>
+ <SwStkChk>0</SwStkChk>
+ <NoWarn>0</NoWarn>
+ <uSurpInc>0</uSurpInc>
+ <VariousControls>
+ <MiscControls></MiscControls>
+ <Define></Define>
+ <Undefine></Undefine>
+ <IncludePath>C:/Users/hathach/Dropbox/tinyusb/workspace/CMSISv2p10_LPC43xx_DriverLib/inc;C:/Users/hathach/Dropbox/tinyusb/workspace/tinyusb/demos/bsp;C:/Users/hathach/Dropbox/tinyusb/workspace/tinyusb/tinyusb</IncludePath>
+ </VariousControls>
+ </Aads>
+ <LDads>
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+ <Ropi>0</Ropi>
+ <Rwpi>0</Rwpi>
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+ <RepFail>1</RepFail>
+ <useFile>0</useFile>
+ <TextAddressRange>0x1A000000</TextAddressRange>
+ <DataAddressRange>0x10000000</DataAddressRange>
+ <ScatterFile></ScatterFile>
+ <IncludeLibs></IncludeLibs>
+ <IncludeLibsPath></IncludeLibsPath>
+ <Misc></Misc>
+ <LinkerInputFile></LinkerInputFile>
+ <DisabledWarnings></DisabledWarnings>
+ </LDads>
+ </TargetArmAds>
+ </TargetOption>
+ <Groups>
+ <Group>
+ <GroupName>Startup</GroupName>
+ <Files>
+ <File>
+ <FileName>startup_LPC43xx_arm.s</FileName>
+ <FileType>2</FileType>
+ <FilePath>./Startup/startup_LPC43xx_arm.s</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>bsp_boards</GroupName>
+ <Files>
+ <File>
+ <FileName>board.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/boards/board.c</FilePath>
+ </File>
+ <File>
+ <FileName>board_at86rf2xx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/boards/board_at86rf2xx.c</FilePath>
+ </File>
+ <File>
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+ <FilePath>../bsp/boards/board_ea4357.c</FilePath>
+ </File>
+ <File>
+ <FileName>board_lpcxpresso1347.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/boards/board_lpcxpresso1347.c</FilePath>
+ </File>
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+ <FileType>1</FileType>
+ <FilePath>../bsp/boards/board_ngx4330.c</FilePath>
+ </File>
+ <File>
+ <FileName>printf_retarget.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/boards/printf_retarget.c</FilePath>
+ </File>
+ </Files>
+ </Group>
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+ <GroupName>bsp_lpc11uxx</GroupName>
+ <Files>
+ <File>
+ <FileName>gpio.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc11uxx/gpio.c</FilePath>
+ </File>
+ <File>
+ <FileName>uart.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc11uxx/uart.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>bsp_lpc11uxx_startup_xpresso</GroupName>
+ <Files>
+ <File>
+ <FileName>cr_startup_lpc11u.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc11uxx/startup_xpresso/cr_startup_lpc11u.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>bsp_lpc13uxx</GroupName>
+ <Files>
+ <File>
+ <FileName>Serial.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc13uxx/Serial.c</FilePath>
+ </File>
+ <File>
+ <FileName>clkconfig.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc13uxx/clkconfig.c</FilePath>
+ </File>
+ <File>
+ <FileName>nmi.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc13uxx/nmi.c</FilePath>
+ </File>
+ <File>
+ <FileName>timer16.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc13uxx/timer16.c</FilePath>
+ </File>
+ <File>
+ <FileName>timer32.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc13uxx/timer32.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>bsp_lpc13uxx_startup_xpresso</GroupName>
+ <Files>
+ <File>
+ <FileName>cr_startup_lpc13u.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc13uxx/startup_xpresso/cr_startup_lpc13u.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>bsp_lpc43xx_startup_xpresso</GroupName>
+ <Files>
+ <File>
+ <FileName>cr_startup_lpc43xx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../bsp/lpc43xx/startup_xpresso/cr_startup_lpc43xx.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>host</GroupName>
+ <Files>
+ <File>
+ <FileName>main.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>./main.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb</GroupName>
+ <Files>
+ <File>
+ <FileName>tusb.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/tusb.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb_class</GroupName>
+ <Files>
+ <File>
+ <FileName>cdc.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/class/cdc.c</FilePath>
+ </File>
+ <File>
+ <FileName>hid.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/class/hid.c</FilePath>
+ </File>
+ <File>
+ <FileName>hid_host.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/class/hid_host.c</FilePath>
+ </File>
+ <File>
+ <FileName>msc_host.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/class/msc_host.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb_common</GroupName>
+ <Files>
+ <File>
+ <FileName>errors.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/common/errors.c</FilePath>
+ </File>
+ <File>
+ <FileName>fifo.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/common/fifo.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb_device</GroupName>
+ <Files>
+ <File>
+ <FileName>dcd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/device/dcd.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb_hal</GroupName>
+ <Files>
+ <File>
+ <FileName>hal_lpc11uxx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/hal/hal_lpc11uxx.c</FilePath>
+ </File>
+ <File>
+ <FileName>hal_lpc13uxx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/hal/hal_lpc13uxx.c</FilePath>
+ </File>
+ <File>
+ <FileName>hal_lpc43xx.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/hal/hal_lpc43xx.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb_host</GroupName>
+ <Files>
+ <File>
+ <FileName>hcd.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/host/hcd.c</FilePath>
+ </File>
+ <File>
+ <FileName>usbh.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/host/usbh.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb_host_ehci</GroupName>
+ <Files>
+ <File>
+ <FileName>ehci.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/host/ehci/ehci.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ <Group>
+ <GroupName>tinyusb_osal</GroupName>
+ <Files>
+ <File>
+ <FileName>osal_none.c</FileName>
+ <FileType>1</FileType>
+ <FilePath>../../tinyusb/osal/osal_none.c</FilePath>
+ </File>
+ </Files>
+ </Group>
+ </Groups>
+ </Target>
+ </Targets>
+
+</Project>
diff --git a/demos/host/main.c b/demos/host/main.c
index a96f9cbb9..e2cb25b67 100644
--- a/demos/host/main.c
+++ b/demos/host/main.c
@@ -21,11 +21,12 @@ int main(void)
board_init();
tusb_init();
+ printf("reset\n");
while (1)
{
- if (current_tick + 1000 < system_ticks)
+ if (current_tick + 30*1000 < system_ticks)
{
- current_tick += 1000;
+ current_tick += 30*1000;
board_leds(0x01, (current_tick/1000)%2); /* Toggle LED once per second */
printf("tinyusb: " __DATE__ "\t" __TIME__ "\n");
diff --git a/demos/host/tusb_config.h b/demos/host/tusb_config.h
index 207b6330a..3a1f6c0d0 100644
--- a/demos/host/tusb_config.h
+++ b/demos/host/tusb_config.h
@@ -58,8 +58,8 @@
//--------------------------------------------------------------------+
// CONTROLLER CONFIGURATION
//--------------------------------------------------------------------+
-#define TUSB_CFG_CONTROLLER0_MODE (TUSB_MODE_NONE)
-#define TUSB_CFG_CONTROLLER1_MODE (TUSB_MODE_HOST)
+#define TUSB_CFG_CONTROLLER0_MODE (TUSB_MODE_HOST)
+#define TUSB_CFG_CONTROLLER1_MODE (TUSB_MODE_NONE)
//--------------------------------------------------------------------+
// HOST CONFIGURATION
@@ -90,10 +90,10 @@
// COMMON CONFIGURATION
//--------------------------------------------------------------------+
-#define TUSB_CFG_DEBUG 3
+#define TUSB_CFG_DEBUG 3
-#define TUSB_CFG_OS TUSB_OS_NONE
-#define TUSB_CFG_OS_TICKS_PER_SECOND 1000
+#define TUSB_CFG_OS TUSB_OS_NONE
+#define TUSB_CFG_OS_TICKS_PER_SECOND 1000
#ifdef __CODE_RED // make use of code red's support for ram region macros
#if (MCU == MCU_LPC11UXX) || (MCU == MCU_LPC13UXX)
@@ -103,6 +103,10 @@
#endif
#define TUSB_CFG_ATTR_USBRAM __attribute__ ((section(TUSB_RAM_SECTION)))
+#elif defined __CC_ARM // Compiled with Keil armcc
+ #define TUSB_CFG_ATTR_USBRAM
+#else
+ #error compiler not specified
#endif
diff --git a/tinyusb/class/hid.h b/tinyusb/class/hid.h
index 93438a264..f658c4f97 100644
--- a/tinyusb/class/hid.h
+++ b/tinyusb/class/hid.h
@@ -124,14 +124,14 @@ enum
*/
enum
{
- KEYBOARD_MODIFIER_LEFTCTRL = BIN8(00000001),
- KEYBOARD_MODIFIER_LEFTSHIFT = BIN8(00000010),
- KEYBOARD_MODIFIER_LEFTALT = BIN8(00000100),
- KEYBOARD_MODIFIER_LEFTGUI = BIN8(00001000),
- KEYBOARD_MODIFIER_RIGHTCTRL = BIN8(00010000),
- KEYBOARD_MODIFIER_RIGHTSHIFT = BIN8(00100000),
- KEYBOARD_MODIFIER_RIGHTALT = BIN8(01000000),
- KEYBOARD_MODIFIER_RIGHTGUI = BIN8(10000000)
+ KEYBOARD_MODIFIER_LEFTCTRL = BIT_(0),
+ KEYBOARD_MODIFIER_LEFTSHIFT = BIT_(1),
+ KEYBOARD_MODIFIER_LEFTALT = BIT_(2),
+ KEYBOARD_MODIFIER_LEFTGUI = BIT_(3),
+ KEYBOARD_MODIFIER_RIGHTCTRL = BIT_(4),
+ KEYBOARD_MODIFIER_RIGHTSHIFT = BIT_(5),
+ KEYBOARD_MODIFIER_RIGHTALT = BIT_(6),
+ KEYBOARD_MODIFIER_RIGHTGUI = BIT_(7)
};
enum
diff --git a/tinyusb/class/msc_host.c b/tinyusb/class/msc_host.c
new file mode 100644
index 000000000..f4e8b5cd5
--- /dev/null
+++ b/tinyusb/class/msc_host.c
@@ -0,0 +1,59 @@
+/*
+ * msc_host.c
+ *
+ * Created on: Mar 8, 2013
+ * Author: hathach
+ */
+
+/*
+ * Software License Agreement (BSD License)
+ * Copyright (c) 2012, hathach (tinyusb.net)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the tiny usb stack.
+ */
+
+#include "tusb_option.h"
+
+
+
+#define _TINY_USB_SOURCE_FILE_
+
+
+//--------------------------------------------------------------------+
+// INCLUDE
+//--------------------------------------------------------------------+
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+
+//--------------------------------------------------------------------+
+// INTERNAL OBJECT & FUNCTION DECLARATION
+//--------------------------------------------------------------------+
+
+//--------------------------------------------------------------------+
+// IMPLEMENTATION
+//--------------------------------------------------------------------+
diff --git a/tinyusb/class/msc_host.h b/tinyusb/class/msc_host.h
new file mode 100644
index 000000000..7fc1ce48c
--- /dev/null
+++ b/tinyusb/class/msc_host.h
@@ -0,0 +1,83 @@
+/*
+ * msc_host.h
+ *
+ * Created on: Mar 8, 2013
+ * Author: hathach
+ */
+
+/*
+ * Software License Agreement (BSD License)
+ * Copyright (c) 2012, hathach (tinyusb.net)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the tiny usb stack.
+ */
+
+/** \file
+ * \brief TBD
+ *
+ * \note TBD
+ */
+
+/** \ingroup TBD
+ * \defgroup TBD
+ * \brief TBD
+ *
+ * @{
+ */
+
+#ifndef _TUSB_MSC_HOST_H_
+#define _TUSB_MSC_HOST_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "common/common.h"
+#include "host/usbh.h"
+#include "hid.h"
+
+//--------------------------------------------------------------------+
+// APPLICATION API
+//--------------------------------------------------------------------+
+
+//--------------------------------------------------------------------+
+// INTERNAL API
+//--------------------------------------------------------------------+
+#ifdef _TINY_USB_SOURCE_FILE_
+
+void msch_init(void) ATTR_WEAK;
+tusb_error_t msch_install_subtask(uint8_t dev_addr, uint8_t const *descriptor, uint16_t *p_length) ATTR_WEAK ATTR_WARN_UNUSED_RESULT;
+void msch_isr(pipe_handle_t pipe_hdl) ATTR_WEAK;
+
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* _TUSB_MSC_HOST_H_ */
+
+/** @} */
diff --git a/tinyusb/common/binary.h b/tinyusb/common/binary.h
index f2e12acee..e9bd51e5e 100644
--- a/tinyusb/common/binary.h
+++ b/tinyusb/common/binary.h
@@ -65,7 +65,7 @@
#define BIT_CLR_(x, n) ( (x) & (~BIT_(n)) )
-#if defined(__GNUC__)
+#if defined(__GNUC__) && !defined(__CC_ARM)
#define BIN8(x) (0b##x)
#define BIN16(b1, b2) (0b##b1##b2)
@@ -74,16 +74,16 @@
#else
// internal macro of B8, B16, B32
-#define _B8__(x) ((x&0x0000000FLU)?1:0) \
- +((x&0x000000F0LU)?2:0) \
- +((x&0x00000F00LU)?4:0) \
- +((x&0x0000F000LU)?8:0) \
- +((x&0x000F0000LU)?16:0) \
- +((x&0x00F00000LU)?32:0) \
- +((x&0x0F000000LU)?64:0) \
- +((x&0xF0000000LU)?128:0)
+#define _B8__(x) (((x&0x0000000FUL)?1:0) \
+ +((x&0x000000F0UL)?2:0) \
+ +((x&0x00000F00UL)?4:0) \
+ +((x&0x0000F000UL)?8:0) \
+ +((x&0x000F0000UL)?16:0) \
+ +((x&0x00F00000UL)?32:0) \
+ +((x&0x0F000000UL)?64:0) \
+ +((x&0xF0000000UL)?128:0))
-#define BIN8(d) ((uint8_t)_B8__(0x##d##LU))
+#define BIN8(d) ((uint8_t) _B8__(0x##d##UL))
#define BIN16(dmsb,dlsb) (((uint16_t)BIN8(dmsb)<<8) + BIN8(dlsb))
#define BIN32(dmsb,db2,db3,dlsb) \
(((uint32_t)BIN8(dmsb)<<24) \
diff --git a/tinyusb/hal/hal_lpc43xx.c b/tinyusb/hal/hal_lpc43xx.c
index 770ffd4ce..f86d5ec2a 100644
--- a/tinyusb/hal/hal_lpc43xx.c
+++ b/tinyusb/hal/hal_lpc43xx.c
@@ -42,6 +42,16 @@
#include "lpc43xx_cgu.h"
+enum {
+ LPC43XX_USBMODE_DEVICE = 2,
+ LPC43XX_USBMODE_HOST = 3
+};
+
+enum {
+ LPC43XX_USBMODE_VBUS_LOW = 0,
+ LPC43XX_USBMODE_VBUS_HIGH = 1
+};
+
tusb_error_t hal_init()
{
/* Set up USB0 clock */
@@ -51,6 +61,12 @@ tusb_error_t hal_init()
CGU_EnableEntity(CGU_CLKSRC_PLL0, ENABLE); /* Enable PLL after all setting is done */
LPC_CREG->CREG0 &= ~(1<<5); /* Turn on the phy */
+ //------------- reset controller & set role -------------//
+ hcd_controller_reset(0);
+ LPC_USB0->USBMODE_H = LPC43XX_USBMODE_HOST | (LPC43XX_USBMODE_VBUS_HIGH << 5);
+
+ hal_interrupt_enable();
+
return TUSB_ERROR_NONE;
}
diff --git a/tinyusb/host/ehci/ehci.c b/tinyusb/host/ehci/ehci.c
index faabb4a55..2fefed23e 100644
--- a/tinyusb/host/ehci/ehci.c
+++ b/tinyusb/host/ehci/ehci.c
@@ -71,14 +71,14 @@ STATIC_ASSERT( ALIGN_OF(period_frame_list1) == 4096, "Period Framelist must be 4
//--------------------------------------------------------------------+
// IMPLEMENTATION
//--------------------------------------------------------------------+
-STATIC_ INLINE_ ehci_registers_t* const get_operational_register(uint8_t hostid) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;
-STATIC_ INLINE_ ehci_registers_t* const get_operational_register(uint8_t hostid)
+STATIC_ INLINE_ ehci_registers_t* get_operational_register(uint8_t hostid) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;
+STATIC_ INLINE_ ehci_registers_t* get_operational_register(uint8_t hostid)
{
- return (ehci_registers_t* const) (hostid ? (&LPC_USB1->USBCMD_H) : (&LPC_USB0->USBCMD_H) );
+ return (ehci_registers_t*) (hostid ? (&LPC_USB1->USBCMD_H) : (&LPC_USB0->USBCMD_H) );
}
-STATIC_ INLINE_ ehci_link_t* const get_period_frame_list(uint8_t list_idx) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;
-STATIC_ INLINE_ ehci_link_t* const get_period_frame_list(uint8_t list_idx)
+STATIC_ INLINE_ ehci_link_t* get_period_frame_list(uint8_t list_idx) ATTR_PURE ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;
+STATIC_ INLINE_ ehci_link_t* get_period_frame_list(uint8_t list_idx)
{
#if CONTROLLER_HOST_NUMBER > 1
return list_idx ? period_frame_list1 : period_frame_list0; // TODO more than 2 controller
@@ -98,14 +98,14 @@ STATIC_ INLINE_ uint8_t hostid_to_data_idx(uint8_t hostid)
#endif
}
-STATIC_ INLINE_ ehci_qhd_t* const get_async_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
-STATIC_ INLINE_ ehci_qhd_t* const get_async_head(uint8_t hostid)
+STATIC_ INLINE_ ehci_qhd_t* get_async_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
+STATIC_ INLINE_ ehci_qhd_t* get_async_head(uint8_t hostid)
{
return &ehci_data.async_head[ hostid_to_data_idx(hostid) ];
}
-STATIC_ INLINE_ ehci_qhd_t* const get_period_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
-STATIC_ INLINE_ ehci_qhd_t* const get_period_head(uint8_t hostid)
+STATIC_ INLINE_ ehci_qhd_t* get_period_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
+STATIC_ INLINE_ ehci_qhd_t* get_period_head(uint8_t hostid)
{
return &ehci_data.period_head[ hostid_to_data_idx(hostid) ];
}
@@ -211,7 +211,7 @@ void hcd_isr(uint8_t hostid)
if (int_status & EHCI_INT_MASK_PORT_CHANGE)
{
-
+// port_status_change_isr(h)
}
if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE)
@@ -304,17 +304,16 @@ tusb_error_t hcd_controller_stop(uint8_t hostid)
return timeout_expired(&timeout) ? TUSB_ERROR_OSAL_TIMEOUT : TUSB_ERROR_NONE;
}
-//TODO host/device mode must be set immediately after a reset
-tusb_error_t hcd_controller_reset(uint8_t hostid) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_controller_reset(uint8_t hostid)
{
ehci_registers_t* const regs = get_operational_register(hostid);
timeout_timer_t timeout;
- if (regs->usb_sts_bit.hc_halted == 0) // need to stop before reset
- {
- ASSERT_STATUS( hcd_controller_stop(hostid) );
- }
+// NXP chip powered with non-host mode --> sts bit is not correctly reflected
+// if (regs->usb_sts_bit.hc_halted == 0) // need to stop before reset
+// {
+// ASSERT_STATUS( hcd_controller_stop(hostid) );
+// }
regs->usb_cmd_bit.reset = 1;
@@ -327,14 +326,22 @@ tusb_error_t hcd_controller_reset(uint8_t hostid)
//--------------------------------------------------------------------+
// PORT API
//--------------------------------------------------------------------+
+bool hcd_port_connect_status(uint8_t core_id)
+{
+ return false;
+}
+tusb_speed_t hcd_port_speed(uint8_t core_id)
+{
+ return TUSB_SPEED_HIGH;
+}
//--------------------------------------------------------------------+
// PIPE API
//--------------------------------------------------------------------+
static void init_qhd(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type);
-static inline ehci_qhd_t* const get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
+static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
//--------------------------------------------------------------------+
@@ -522,7 +529,7 @@ tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t t
//--------------------------------------------------------------------+
// HELPER
//--------------------------------------------------------------------+
-static inline ehci_qhd_t* const get_control_qhd(uint8_t dev_addr)
+static inline ehci_qhd_t* get_control_qhd(uint8_t dev_addr)
{
return (dev_addr == 0) ?
get_async_head( usbh_device_info_pool[dev_addr].core_id ) :
diff --git a/tinyusb/host/ehci/ehci.h b/tinyusb/host/ehci/ehci.h
index 8ff1f52ea..cd03c2b96 100644
--- a/tinyusb/host/ehci/ehci.h
+++ b/tinyusb/host/ehci/ehci.h
@@ -453,6 +453,9 @@ typedef struct {
}device[TUSB_CFG_HOST_DEVICE_MAX];
}ehci_data_t;
+//For NXP's MCU, host/device mode must be set immediately after a reset
+tusb_error_t hcd_controller_reset(uint8_t hostid) ATTR_WARN_UNUSED_RESULT;
+
#ifdef __cplusplus
}
#endif
diff --git a/tinyusb/host/hcd.h b/tinyusb/host/hcd.h
index 7091e6c54..95eea8718 100644
--- a/tinyusb/host/hcd.h
+++ b/tinyusb/host/hcd.h
@@ -93,6 +93,7 @@ tusb_error_t hcd_pipe_cancel()ATTR_WARN_UNUSED_RESULT;
/// return the current connect status of roothub port
bool hcd_port_connect_status(uint8_t core_id) ATTR_WARN_UNUSED_RESULT;
tusb_speed_t hcd_port_speed(uint8_t core_id) ATTR_WARN_UNUSED_RESULT;
+//tusb_error_t hcd_port_reset(uint8_t core_id) ATTR_WARN_UNUSED_RESULT;
#ifdef __cplusplus
}
diff --git a/tinyusb/host/usbh.c b/tinyusb/host/usbh.c
index fa16e5403..f0b79dabd 100644
--- a/tinyusb/host/usbh.c
+++ b/tinyusb/host/usbh.c
@@ -47,6 +47,10 @@
#include "tusb.h"
#include "usbh_hcd.h"
+void tusb_tick_tock(void)
+{
+ osal_tick_tock();
+}
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
@@ -165,6 +169,11 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
return TUSB_ERROR_NONE;
}
+pipe_status_t usbh_pipe_status_get(pipe_handle_t pipe_hdl)
+{
+ return PIPE_STATUS_BUSY;
+}
+
//--------------------------------------------------------------------+
// ENUMERATION TASK
//--------------------------------------------------------------------+
diff --git a/tinyusb/host/usbh.h b/tinyusb/host/usbh.h
index 2c367d743..b89cc3bb9 100644
--- a/tinyusb/host/usbh.h
+++ b/tinyusb/host/usbh.h
@@ -125,7 +125,7 @@ enum {
TUSB_FLAGS_CLASS_WIRELESS_CONTROLLER = BIT_(28),
TUSB_FLAGS_CLASS_MISC = BIT_(29),
TUSB_FLAGS_CLASS_APPLICATION_SPECIFIC = BIT_(30),
- TUSB_FLAGS_CLASS_VENDOR_SPECIFIC = BIT_(31)
+ TUSB_FLAGS_CLASS_VENDOR_SPECIFIC = BIT_(31) // TODO out of range for int type
};
/// Device Status
@@ -169,11 +169,11 @@ tusb_error_t tusbh_configuration_set (tusb_handle_device_t device_hdl, uint8
tusbh_device_status_t tusbh_device_status_get (tusb_handle_device_t const device_hdl) ATTR_WARN_UNUSED_RESULT;
#if TUSB_CFG_OS == TUSB_OS_NONE // TODO move later
-static inline void tusb_tick_tock(void) ATTR_ALWAYS_INLINE;
-static inline void tusb_tick_tock(void)
-{
- osal_tick_tock();
-}
+//static inline void tusb_tick_tock(void) ATTR_ALWAYS_INLINE;
+//static inline void tusb_tick_tock(void)
+//{
+// osal_tick_tock();
+//}
#endif
//--------------------------------------------------------------------+
diff --git a/tinyusb/osal/osal_common.h b/tinyusb/osal/osal_common.h
index 55860cb68..d896b2c01 100644
--- a/tinyusb/osal/osal_common.h
+++ b/tinyusb/osal/osal_common.h
@@ -61,7 +61,7 @@ enum
{
OSAL_TIMEOUT_NOTIMEOUT = 0, // for use within ISR, return immediately
OSAL_TIMEOUT_NORMAL = 10, // default is 10 msec
- OSAL_TIMEOUT_WAIT_FOREVER = 0xFFFF0000
+ OSAL_TIMEOUT_WAIT_FOREVER = 0x0EEEEEEE
};
typedef enum {
diff --git a/tinyusb/osal/osal_none.h b/tinyusb/osal/osal_none.h
index af96213f5..27f460ed9 100644
--- a/tinyusb/osal/osal_none.h
+++ b/tinyusb/osal/osal_none.h
@@ -120,7 +120,7 @@ static inline uint32_t osal_tick_get(void)
return status;\
}/* sub task finished ok --> continue */\
}\
- }while(1)
+ }while(0)
#define OSAL_SUBTASK_BEGIN OSAL_TASK_LOOP_BEGIN
#define OSAL_SUBTASK_END OSAL_TASK_LOOP_END