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authorHa Thach <[email protected]>2026-04-10 17:07:03 +0700
committerGitHub <[email protected]>2026-04-10 17:07:03 +0700
commit470715ad8cb07b496ad2c2e9bf0b95d32cf768c7 (patch)
tree1b59ce6001a11b6695771dff7422121fede78c3f
parent7c3f5979ff9be05b7938f10dbaa6e55daaf8bdc1 (diff)
parent8320d8f8f49232c25476f8efdde55e7bedec11e3 (diff)
Merge pull request #3593 from hathach/worktree-fix-stm32h5-uid-icache
fix stm32h5 hard fault when reading UID with ICACHE enabled
-rw-r--r--hw/bsp/stm32h5/family.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index 234a089eb..8298dfaab 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -46,6 +46,10 @@
TU_ATTR_UNUSED static void Error_Handler(void) {
}
+// STM32H5 errata: reading UID_BASE with ICACHE enabled causes hard fault.
+// Cache the unique ID early in board_init() before ICACHE may be enabled.
+static uint32_t cached_uid[3];
+
typedef struct {
GPIO_TypeDef* port;
GPIO_InitTypeDef pin_init;
@@ -94,6 +98,12 @@ static UART_HandleTypeDef UartHandle = {
#endif
void board_init(void) {
+ // Cache UID before ICACHE is enabled (STM32H5 errata: reading UID_BASE with ICACHE causes hard fault)
+ volatile uint32_t* stm32_uuid = (volatile uint32_t*) UID_BASE;
+ cached_uid[0] = stm32_uuid[0];
+ cached_uid[1] = stm32_uuid[1];
+ cached_uid[2] = stm32_uuid[2];
+
HAL_Init(); // required for HAL_RCC_Osc TODO check with freeRTOS
SystemClock_Config(); // implemented in board.h
SystemCoreClockUpdate();
@@ -185,13 +195,12 @@ uint32_t board_button_read(void) {
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
(void) max_len;
- volatile uint32_t* stm32_uuid = (volatile uint32_t*) UID_BASE;
uint32_t* id32 = (uint32_t*) (uintptr_t) id;
uint8_t const len = 12;
- id32[0] = stm32_uuid[0];
- id32[1] = stm32_uuid[1];
- id32[2] = stm32_uuid[2];
+ id32[0] = cached_uid[0];
+ id32[1] = cached_uid[1];
+ id32[2] = cached_uid[2];
return len;
}