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authorhathach <[email protected]>2024-12-13 08:53:54 +0700
committerhathach <[email protected]>2024-12-13 08:53:54 +0700
commit4b39ecc519735e5d4d2d9bfda7f24ae39faab077 (patch)
treede594e012a5ebd9e56de85b6f7e5f265d52a30f3
parentec2f2f3523c8a685bb56f5443faf92307f74a308 (diff)
update make build for ra
-rw-r--r--hw/bsp/ra/boards/portenta_c33/board.mk2
-rw-r--r--hw/bsp/ra/boards/uno_r4/board.mk2
-rw-r--r--hw/bsp/ra/family.cmake2
-rw-r--r--hw/bsp/ra/family.mk16
4 files changed, 10 insertions, 12 deletions
diff --git a/hw/bsp/ra/boards/portenta_c33/board.mk b/hw/bsp/ra/boards/portenta_c33/board.mk
index 6a5c2ffce..4da34306e 100644
--- a/hw/bsp/ra/boards/portenta_c33/board.mk
+++ b/hw/bsp/ra/boards/portenta_c33/board.mk
@@ -1,8 +1,6 @@
CPU_CORE = cortex-m33
MCU_VARIANT = ra6m5
-LD_FILE = ${BOARD_PATH}/${BOARD}.ld
-
# Port 1 is highspeed
PORT ?= 1
diff --git a/hw/bsp/ra/boards/uno_r4/board.mk b/hw/bsp/ra/boards/uno_r4/board.mk
index b7075eec0..f257c0000 100644
--- a/hw/bsp/ra/boards/uno_r4/board.mk
+++ b/hw/bsp/ra/boards/uno_r4/board.mk
@@ -1,8 +1,6 @@
CPU_CORE = cortex-m4
MCU_VARIANT = ra4m1
-LD_FILE = ${BOARD_PATH}/${BOARD}.ld
-
# For flash-jlink target
JLINK_DEVICE = R7FA4M1AB
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 56c0487c1..e234c7b16 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -36,8 +36,8 @@ function(add_board_target BOARD_TARGET)
${FSP_RA}/src/bsp/mcu/all/bsp_sbrk.c
${FSP_RA}/src/bsp/mcu/all/bsp_security.c
${FSP_RA}/src/r_ioport/r_ioport.c
- ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen/pin_data.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen/common_data.c
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen/pin_data.c
)
target_compile_options(${BOARD_TARGET} PUBLIC
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 4447e8499..5c7305912 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -1,5 +1,3 @@
-DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
-
FSP_RA = hw/mcu/renesas/fsp/ra/fsp
include $(TOP)/$(BOARD_PATH)/board.mk
@@ -37,6 +35,8 @@ SRC_C += \
src/portable/renesas/rusb2/dcd_rusb2.c \
src/portable/renesas/rusb2/hcd_rusb2.c \
src/portable/renesas/rusb2/rusb2_common.c \
+ ${BOARD_PATH}/ra_gen/common_data.c \
+ ${BOARD_PATH}/ra_gen/pin_data.c \
$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/startup.c \
$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Source/system.c \
$(FSP_RA)/src/bsp/mcu/all/bsp_clocks.c \
@@ -53,10 +53,11 @@ SRC_C += \
$(FSP_RA)/src/r_ioport/r_ioport.c \
INC += \
- $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
$(TOP)/$(BOARD_PATH) \
- $(TOP)/$(BOARD_PATH)/fsp_cfg \
- $(TOP)/$(BOARD_PATH)/fsp_cfg/bsp \
+ $(TOP)/$(BOARD_PATH)/ra_cfg/fsp_cfg \
+ $(TOP)/$(BOARD_PATH)/ra_cfg/fsp_cfg/bsp \
+ $(TOP)/$(BOARD_PATH)/ra_gen \
+ $(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
$(TOP)/$(FSP_RA)/src/bsp/cmsis/Device/RENESAS/Include \
$(TOP)/$(FSP_RA)/inc \
$(TOP)/$(FSP_RA)/inc/api \
@@ -65,10 +66,11 @@ INC += \
$(TOP)/$(FSP_RA)/src/bsp/mcu/$(MCU_VARIANT) \
ifndef LD_FILE
-LD_FILE = $(FAMILY_PATH)/linker/gcc/$(MCU_VARIANT).ld
+LD_FILE = $(BOARD_PATH)/script/fsp.ld
endif
-LDFLAGS += -L$(TOP)/$(FAMILY_PATH)/linker/gcc
+LDFLAGS += -L$(TOP)/$(BOARD_PATH)/script
+LDFLAGS += -Wl,--defsym=end=__bss_end__
# For freeRTOS port source
# hack to use the port provided by renesas