diff options
| author | Zixun LI <[email protected]> | 2025-12-02 11:34:43 +0100 |
|---|---|---|
| committer | Zixun LI <[email protected]> | 2025-12-02 11:34:43 +0100 |
| commit | 4bfd22eb23b4e9864c9a93897f63134de8b2911a (patch) | |
| tree | 74b97fa3081c2309b3eaf02214bee9abd79488cb | |
| parent | ad34b92f0ee7242fcacef1137dc075dcd0c97b2a (diff) | |
| parent | 7ee288bc223db393d68c7bdb09bf7c05ffd2eb03 (diff) | |
Merge remote-tracking branch 'tinyusb/master' into dwc2_cfg
102 files changed, 1758 insertions, 1271 deletions
diff --git a/.clang-format b/.clang-format index f15c26c9e..2cd0e1554 100644 --- a/.clang-format +++ b/.clang-format @@ -84,9 +84,9 @@ MaxEmptyLinesToKeep: 2 NamespaceIndentation: All PenaltyBreakBeforeFirstCallParameter: 1000000 PenaltyBreakOpenParenthesis: 1000000 +PPIndentWidth: 2 QualifierAlignment: Custom QualifierOrder: ['static', 'const', 'volatile', 'restrict', 'type'] -ReflowComments: false SpaceAfterTemplateKeyword: false SpaceBeforeRangeBasedForLoopColon: false SpaceInEmptyParentheses: false diff --git a/.github/actions/setup_toolchain/action.yml b/.github/actions/setup_toolchain/action.yml index d15a29f20..f78fe4dd3 100644 --- a/.github/actions/setup_toolchain/action.yml +++ b/.github/actions/setup_toolchain/action.yml @@ -13,12 +13,6 @@ outputs: runs: using: "composite" steps: - - name: Install ARM GCC - if: inputs.toolchain == 'arm-gcc' - uses: carlosperate/arm-none-eabi-gcc-action@v1 - with: - release: '14.2.Rel1' - - name: Pull ESP-IDF docker if: inputs.toolchain == 'esp-idf' uses: ./.github/actions/setup_toolchain/espressif @@ -26,9 +20,7 @@ runs: toolchain: ${{ inputs.toolchain }} - name: Get Toolchain URL - if: >- - inputs.toolchain != 'arm-gcc' && - inputs.toolchain != 'esp-idf' + if: inputs.toolchain != 'esp-idf' id: set-toolchain-url env: TOOLCHAIN: ${{ inputs.toolchain }} @@ -39,9 +31,7 @@ runs: shell: bash - name: Download Toolchain - if: >- - inputs.toolchain != 'arm-gcc' && - inputs.toolchain != 'esp-idf' + if: inputs.toolchain != 'esp-idf' uses: ./.github/actions/setup_toolchain/download with: toolchain: ${{ inputs.toolchain }} diff --git a/.github/actions/setup_toolchain/download/action.yml b/.github/actions/setup_toolchain/download/action.yml index af7a9ad4e..5a3f66cb1 100644 --- a/.github/actions/setup_toolchain/download/action.yml +++ b/.github/actions/setup_toolchain/download/action.yml @@ -26,6 +26,7 @@ runs: TOOLCHAIN_URL: ${{ inputs.toolchain_url }} run: | mkdir -p ~/cache/${TOOLCHAIN} + FILE_EXT="${TOOLCHAIN_URL##*.}" if [[ ${TOOLCHAIN} == rx-gcc ]]; then wget --progress=dot:giga ${TOOLCHAIN_URL} -O toolchain.run @@ -34,9 +35,16 @@ runs: elif [[ ${TOOLCHAIN} == arm-iar ]]; then wget --progress=dot:giga https://netstorage.iar.com/FileStore/STANDARD/001/003/926/iar-lmsc-tools_1.8_amd64.deb -O ~/cache/${TOOLCHAIN}/iar-lmsc-tools.deb wget --progress=dot:giga ${TOOLCHAIN_URL} -O ~/cache/${TOOLCHAIN}/cxarm.deb - else + elif [[ ${FILE_EXT} == zip ]]; then + curl -L "$TOOLCHAIN_URL" -o toolchain.zip + unzip -q toolchain.zip -d ~/cache/${TOOLCHAIN} + ~/cache/${TOOLCHAIN}/xpack-arm-none-eabi-gcc-14.2.1-1.1/bin/arm-none-eabi-gcc.exe --version + elif [[ ${FILE_EXT} == gz ]]; then wget --progress=dot:giga ${TOOLCHAIN_URL} -O toolchain.tar.gz tar -C ~/cache/${TOOLCHAIN} -xaf toolchain.tar.gz + else + echo "Unsupported toolchain file extension: ${FILE_EXT}" + exit 1 fi shell: bash @@ -47,8 +55,19 @@ runs: if [[ ${TOOLCHAIN} == arm-iar ]]; then sudo dpkg -i ~/cache/${TOOLCHAIN}/iar-lmsc-tools.deb sudo apt install -y ~/cache/${TOOLCHAIN}/cxarm.deb - echo >> $GITHUB_PATH "/opt/iar/cxarm/arm/bin" + TOOLCHAIN_PATH="/opt/iar/cxarm/arm/bin" else - echo >> $GITHUB_PATH `echo ~/cache/${TOOLCHAIN}/*/bin` + # Find the single toolchain bin directory + TOOLCHAIN_BIN_DIRS=(~/cache/${TOOLCHAIN}/*/bin) + if [[ ${#TOOLCHAIN_BIN_DIRS[@]} -ne 1 ]]; then + echo "Error: Expected exactly one toolchain bin directory, found ${#TOOLCHAIN_BIN_DIRS[@]}" + exit 1 + fi + TOOLCHAIN_PATH="${TOOLCHAIN_BIN_DIRS[0]}" + fi + # Convert to native path for Windows compatibility + if [[ "$RUNNER_OS" == "Windows" ]]; then + TOOLCHAIN_PATH=$(cygpath -w "$TOOLCHAIN_PATH") fi + echo "$TOOLCHAIN_PATH" >> $GITHUB_PATH shell: bash diff --git a/.github/actions/setup_toolchain/toolchain.json b/.github/actions/setup_toolchain/toolchain.json index 8496dcad3..ee41a5cb4 100644 --- a/.github/actions/setup_toolchain/toolchain.json +++ b/.github/actions/setup_toolchain/toolchain.json @@ -2,6 +2,8 @@ "aarch64-gcc": "https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz", "arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-19.1.1/LLVM-ET-Arm-19.1.1-Linux-x86_64.tar.xz", "arm-gcc": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v14.2.1-1.1/xpack-arm-none-eabi-gcc-14.2.1-1.1-linux-x64.tar.gz", + "arm-gcc-macos-latest": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v14.2.1-1.1/xpack-arm-none-eabi-gcc-14.2.1-1.1-darwin-arm64.tar.gz", + "arm-gcc-windows-latest": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v14.2.1-1.1/xpack-arm-none-eabi-gcc-14.2.1-1.1-win32-x64.zip", "msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2", "riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz", "rx-gcc": "https://github.com/hathach/rx_device/releases/download/0.0.1/gcc-8.3.0.202411-GNURX-ELF.run", diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 0495ba6a9..f1b134b8a 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -15,7 +15,6 @@ on: - '.github/workflows/build_util.yml' - '.github/workflows/ci_set_matrix.py' pull_request: - branches: [ master ] paths: - 'src/**' - 'examples/**' @@ -49,7 +48,7 @@ jobs: id: set-matrix-json run: | # build matrix - MATRIX_JSON=$(python .github/workflows/ci_set_matrix.py) + MATRIX_JSON=$(python .github/workflows/ci_set_matrix.py)/ echo "matrix=$MATRIX_JSON" echo "matrix=$MATRIX_JSON" >> $GITHUB_OUTPUT # hil matrix @@ -127,19 +126,20 @@ jobs: one-per-family: true # --------------------------------------- - # Build Make on Windows/MacOS + # Build Make/CMake on Windows/MacOS # --------------------------------------- - make-os: + build-os: if: github.event_name == 'pull_request' uses: ./.github/workflows/build_util.yml strategy: fail-fast: false matrix: os: [windows-latest, macos-latest] + build-system: [ 'make', 'cmake' ] with: os: ${{ matrix.os }} - build-system: 'make' - toolchain: 'arm-gcc' + build-system: ${{ matrix.build-system }} + toolchain: 'arm-gcc-${{ matrix.os }}' build-args: '["stm32h7"]' one-per-family: true diff --git a/.idea/cmake.xml b/.idea/cmake.xml index f5e5d1f0e..677aaa662 100644 --- a/.idea/cmake.xml +++ b/.idea/cmake.xml @@ -56,6 +56,13 @@ </envs> </ADDITIONAL_GENERATION_ENVIRONMENT> </configuration> + <configuration PROFILE_NAME="espressif_s3_devkitc-DMA" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_s3_devkitc -DLOG=1 -DCFLAGS_CLI="-DCFG_TUD_DWC2_DMA_ENABLE=1 -DCFG_TUH_DWC2_DMA_ENABLE=1""> + <ADDITIONAL_GENERATION_ENVIRONMENT> + <envs> + <env name="ESPBAUD" value="1500000" /> + </envs> + </ADDITIONAL_GENERATION_ENVIRONMENT> + </configuration> <configuration PROFILE_NAME="espressif_p4_function_ev" ENABLED="false" TOOLCHAIN_NAME="ESP-IDF" GENERATION_OPTIONS="-DBOARD=espressif_p4_function_ev -DLOG=1"> <ADDITIONAL_GENERATION_ENVIRONMENT> <envs> @@ -90,9 +97,9 @@ <configuration PROFILE_NAME="same54_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=same54_xplained -DLOG=1 -DLOGGER=RTT" /> <configuration PROFILE_NAME="samg55_xplained" ENABLED="false" GENERATION_OPTIONS="-DBOARD=samg55_xplained" /> <configuration PROFILE_NAME="feather_nrf52840_express" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_nrf52840_express -DLOG=1 -DLOGGER=RTT -DMAX3421_HOST=1" /> - <configuration PROFILE_NAME="pca10056" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" /> - <configuration PROFILE_NAME="pca10056-zephyr" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10056 -DLOG=1 -DTRACE_ETM=1 -DRTOS=zephyr" BUILD_OPTIONS="-v" /> - <configuration PROFILE_NAME="pca10095" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pca10095 -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" /> + <configuration PROFILE_NAME="nrf52840dk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nrf52840dk -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" /> + <configuration PROFILE_NAME="nrf52840dk-zephyr" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nrf52840dk -DLOG=1 -DTRACE_ETM=1 -DRTOS=zephyr" BUILD_OPTIONS="-v" /> + <configuration PROFILE_NAME="nrf5340dk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nrf5340dk -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" /> <configuration PROFILE_NAME="metro m7 1011 sd" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011_sd -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" /> <configuration PROFILE_NAME="metro_m7_1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=1 -DLOGGER=RTT" /> <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=1 -DLOGGER=RTT" /> @@ -18,34 +18,39 @@ information that does not match the info here. - Install ARM GCC toolchain: `sudo apt-get update && sudo apt-get install -y gcc-arm-none-eabi` - Fetch core dependencies: `python3 tools/get_deps.py` -- takes <1 second. NEVER CANCEL. -- For specific board families: `python3 tools/get_deps.py FAMILY_NAME` (e.g., rp2040, stm32f4) +- For specific board families: `python3 tools/get_deps.py FAMILY_NAME` (e.g., rp2040, stm32f4), or + `python3 tools/get_deps.py -b BOARD_NAME` - Dependencies are cached in `lib/` and `hw/mcu/` directories ## Build Examples Choose ONE of these approaches: -**Option 1: Individual Example with CMake (RECOMMENDED)** +**Option 1: Individual Example with CMake and Ninja (RECOMMENDED)** ```bash cd examples/device/cdc_msc mkdir -p build && cd build -cmake -DBOARD=raspberry_pi_pico -DCMAKE_BUILD_TYPE=MinSizeRel .. -cmake --build . -j4 +cmake -DBOARD=raspberry_pi_pico -G Ninja -DCMAKE_BUILD_TYPE=MinSizeRel .. +cmake --build . ``` -- takes 1-2 seconds. NEVER CANCEL. Set timeout to 5+ minutes. -**CMake with Ninja (Alternative)** +**Option 2: All Examples for a Board** + +different folder than Option 1 ```bash -cd examples/device/cdc_msc -mkdir build && cd build -cmake -G Ninja -DBOARD=raspberry_pi_pico .. -ninja +cd examples/ +mkdir -p build && cd build +cmake -DBOARD=raspberry_pi_pico -G Ninja -DCMAKE_BUILD_TYPE=MinSizeRel .. +cmake --build . ``` -**Option 2: Individual Example with Make** +-- takes 15-20 seconds, may have some objcopy failures that are non-critical. NEVER CANCEL. Set timeout to 30+ minutes. + +**Option 3: Individual Example with Make** ```bash cd examples/device/cdc_msc @@ -54,13 +59,6 @@ make BOARD=raspberry_pi_pico all -- takes 2-3 seconds. NEVER CANCEL. Set timeout to 5+ minutes. -**Option 3: All Examples for a Board** - -```bash -python3 tools/build.py -b BOARD_NAME -``` - --- takes 15-20 seconds, may have some objcopy failures that are non-critical. NEVER CANCEL. Set timeout to 30+ minutes. ## Build Options @@ -101,6 +99,17 @@ python3 tools/build.py -b BOARD_NAME - Run specific test: `cd test/unit-test && ceedling test:test_fifo` - Tests use Unity framework with CMock for mocking +## Hardware-in-the-Loop (HIL) Testing + +- Run tests on actual hardware, one of following ways: + - test a specific board `python test/hil/hil_test.py -b BOARD_NAME -B examples local.json` + - test all boards in config `python test/hil/hil_test.py -B examples local.json` +- In case of error, enabled verbose mode with `-v` flag for detailed logs. Also try to observe script output, and try to + modify hil_test.py (temporarily) to add more debug prints to pinpoint the issue. +- Requires pre-built (all) examples for target boards (see Build Examples section 2) + +take 2-5 minutes. NEVER CANCEL. Set timeout to 20+ minutes. + ## Documentation - Install requirements: `pip install -r docs/requirements.txt` @@ -145,11 +154,8 @@ python3 tools/build.py -b BOARD_NAME - Install pre-commit: `pip install pre-commit && pre-commit install` - Runs all quality checks, unit tests, spell checking, and formatting - Takes 10-15 seconds. NEVER CANCEL. Set timeout to 15+ minutes. -2. **Build validation**: Build at least one example that exercises your changes - ```bash - cd examples/device/cdc_msc - make BOARD=raspberry_pi_pico all - ``` +2. **Build validation**: Build at least one board with all example that exercises your changes, see Build Examples + section (option 2) 3. Run unit tests relevant to touched modules; add fuzz/HIL coverage when modifying parsers or protocol state machines. ### Manual Testing Scenarios diff --git a/CLAUDE.md b/CLAUDE.md deleted file mode 100644 index 6c6baa246..000000000 --- a/CLAUDE.md +++ /dev/null @@ -1,78 +0,0 @@ -# TinyUSB Development Guide - -## Build Commands - -### CMake Build System (Preferred) -CMake with Ninja is the preferred build method for TinyUSB development. - -- Build example with Ninja: - ```bash - cd examples/device/cdc_msc - mkdir build && cd build - cmake -G Ninja -DBOARD=raspberry_pi_pico .. - ninja - ``` -- Debug build: `cmake -G Ninja -DBOARD=raspberry_pi_pico -DCMAKE_BUILD_TYPE=Debug ..` -- With logging: `cmake -G Ninja -DBOARD=raspberry_pi_pico -DLOG=2 ..` -- With RTT logger: `cmake -G Ninja -DBOARD=raspberry_pi_pico -DLOG=2 -DLOGGER=rtt ..` -- Flash with JLink: `ninja cdc_msc-jlink` -- Flash with OpenOCD: `ninja cdc_msc-openocd` -- Generate UF2: `ninja cdc_msc-uf2` -- List all targets: `ninja -t targets` - -### Make Build System (Alternative) -- Build example: `cd examples/device/cdc_msc && make BOARD=raspberry_pi_pico all` -- For specific example: `cd examples/{device|host|dual}/{example_name} && make BOARD=raspberry_pi_pico all` -- Flash with JLink: `make BOARD=raspberry_pi_pico flash-jlink` -- Flash with OpenOCD: `make BOARD=raspberry_pi_pico flash-openocd` -- Debug build: `make BOARD=raspberry_pi_pico DEBUG=1 all` -- With logging: `make BOARD=raspberry_pi_pico LOG=2 all` -- With RTT logger: `make BOARD=raspberry_pi_pico LOG=2 LOGGER=rtt all` -- Generate UF2: `make BOARD=raspberry_pi_pico all uf2` - -### Additional Options -- Select RootHub port: `RHPORT_DEVICE=1` (make) or `-DRHPORT_DEVICE=1` (cmake) -- Set port speed: `RHPORT_DEVICE_SPEED=OPT_MODE_FULL_SPEED` (make) or `-DRHPORT_DEVICE_SPEED=OPT_MODE_FULL_SPEED` (cmake) - -### Dependencies -- Get dependencies: `python tools/get_deps.py rp2040` -- Or from example: `cd examples/device/cdc_msc && make BOARD=raspberry_pi_pico get-deps` - -### Testing -- Run unit tests: `cd test/unit-test && ceedling test:all` -- Run specific test: `cd test/unit-test && ceedling test:test_fifo` - -### Pre-commit Hooks -Before building, it's recommended to run pre-commit to ensure code quality: -- Run pre-commit on all files: `pre-commit run --all-files` -- Run pre-commit on staged files: `pre-commit run` -- Install pre-commit hook: `pre-commit install` - -## Code Style Guidelines -- Use C99 standard -- Memory-safe: no dynamic allocation -- Thread-safe: defer all interrupt events to non-ISR task functions -- 2-space indentation, no tabs -- Use snake_case for variables/functions -- Use UPPER_CASE for macros and constants -- Follow existing variable naming patterns in files you're modifying -- Include proper header comments with MIT license -- Add descriptive comments for non-obvious functions -- When including headers, group in order: C stdlib, tusb common, drivers, classes -- Always check return values from functions that can fail -- Use TU_ASSERT() for error checking with return statements - -## Project Structure -- src/: Core TinyUSB stack code -- hw/: Board support packages and MCU drivers -- examples/: Reference examples for device/host/dual -- test/: Unit tests and hardware integration tests - -## Release Process -To prepare a new release: -1. Update the `version` variable in `tools/make_release.py` to the new version number -2. Run the release script: `python tools/make_release.py` - - This will update version numbers in `src/tusb_option.h`, `repository.yml`, and `library.json` - - It will also regenerate documentation -3. Update `docs/info/changelog.rst` with release notes -4. Commit changes and create release tag diff --git a/docs/info/changelog.rst b/docs/info/changelog.rst index df23ce7d8..35c8515cc 100644 --- a/docs/info/changelog.rst +++ b/docs/info/changelog.rst @@ -5,7 +5,7 @@ Changelog 0.20.0 ====== -*November 19, 2024* +*November 19, 2025* General ------- diff --git a/examples/build_system/cmake/cpu/cortex-m55.cmake b/examples/build_system/cmake/cpu/cortex-m55.cmake index a7a57957c..d5f6fa74a 100644 --- a/examples/build_system/cmake/cpu/cortex-m55.cmake +++ b/examples/build_system/cmake/cpu/cortex-m55.cmake @@ -13,6 +13,7 @@ elseif (TOOLCHAIN STREQUAL "clang") --target=arm-none-eabi -mcpu=cortex-m55 -mfpu=fpv5-d16 + -mcmse ) set(FREERTOS_PORT GCC_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "") @@ -20,6 +21,7 @@ elseif (TOOLCHAIN STREQUAL "iar") set(TOOLCHAIN_COMMON_FLAGS --cpu cortex-m55 --fpu VFPv5_D16 + --cmse ) set(FREERTOS_PORT IAR_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "") diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c index 471eb4f2e..505936fdb 100644 --- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c +++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c @@ -119,8 +119,8 @@ TU_VERIFY_STATIC(sizeof(desc2_uac2_configuration) == CONFIG_UAC2_TOTAL_LEN, "Inc // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed tusb_desc_device_qualifier_t const desc_device_qualifier = { - .bLength = sizeof(tusb_desc_device_t), - .bDescriptorType = TUSB_DESC_DEVICE, + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, .bcdUSB = 0x0200, .bDeviceClass = TUSB_CLASS_MISC, diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c index dd0aefaea..e6011c35a 100644 --- a/examples/device/cdc_dual_ports/src/usb_descriptors.c +++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c @@ -153,8 +153,8 @@ static uint8_t const desc_hs_configuration[] = { // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed static tusb_desc_device_qualifier_t const desc_device_qualifier = { - .bLength = sizeof(tusb_desc_device_t), - .bDescriptorType = TUSB_DESC_DEVICE, + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, .bcdUSB = USB_BCD, .bDeviceClass = TUSB_CLASS_MISC, diff --git a/examples/device/cdc_msc/prj.conf b/examples/device/cdc_msc/prj.conf index 2f5139d9d..9e86a118d 100644 --- a/examples/device/cdc_msc/prj.conf +++ b/examples/device/cdc_msc/prj.conf @@ -3,4 +3,3 @@ CONFIG_FPU=y CONFIG_NO_OPTIMIZATIONS=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_NRFX_POWER=y -CONFIG_NRFX_UARTE0=y diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c index e4a205533..06a4f732f 100644 --- a/examples/device/cdc_msc/src/main.c +++ b/examples/device/cdc_msc/src/main.c @@ -124,6 +124,7 @@ void cdc_task(void) { if ((btn_prev == 0u) && (btn != 0u)) { uart_state.dsr ^= 1; + uart_state.dcd ^= 1; tud_cdc_notify_uart_state(&uart_state); } btn_prev = btn; diff --git a/examples/device/msc_dual_lun/prj.conf b/examples/device/msc_dual_lun/prj.conf index 2f5139d9d..9e86a118d 100644 --- a/examples/device/msc_dual_lun/prj.conf +++ b/examples/device/msc_dual_lun/prj.conf @@ -3,4 +3,3 @@ CONFIG_FPU=y CONFIG_NO_OPTIMIZATIONS=y CONFIG_UART_INTERRUPT_DRIVEN=y CONFIG_NRFX_POWER=y -CONFIG_NRFX_UARTE0=y diff --git a/examples/device/uac2_speaker_fb/src/audio_debug.py b/examples/device/uac2_speaker_fb/src/audio_debug.py index 05b49baf6..1c6035a44 100755 --- a/examples/device/uac2_speaker_fb/src/audio_debug.py +++ b/examples/device/uac2_speaker_fb/src/audio_debug.py @@ -2,13 +2,15 @@ # Install python3 HID package https://pypi.org/project/hid/ # Install python3 matplotlib package https://pypi.org/project/matplotlib/ -from ctypes import * +from ctypes import Structure, c_uint32, c_uint8, c_int8, c_int16, c_uint16 +import signal try: import hid import matplotlib.pyplot as plt import matplotlib.animation as animation except: print("Missing import, please try 'pip install hid matplotlib' or consult your OS's python package manager.") + exit(1) # Example must be compiled with CFG_AUDIO_DEBUG=1 VID = 0xcafe @@ -29,6 +31,7 @@ class audio_debug_info_t (Structure): dev = hid.Device(VID, PID) if dev: + signal.signal(signal.SIGINT, signal.SIG_DFL) # Create figure for plotting fig = plt.figure() ax = fig.add_subplot(1, 1, 1) @@ -61,10 +64,10 @@ if dev: ax.set_ylim(bottom=0, top=info.fifo_size) # Format plot - plt.title('FIFO information') - plt.grid() + ax.set_title('FIFO information') + ax.grid(True) print(f'Sample rate:{info.sample_rate} | Alt settings:{info.alt_settings} | Volume:{info.volume[:]}') - ani = animation.FuncAnimation(fig, animate, interval=10) - plt.show() + ani = animation.FuncAnimation(fig, animate, interval=10, cache_frame_data=False) # type: ignore + plt.show(block=True) diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c index 697e51483..c5a161a1e 100644 --- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c +++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c @@ -174,8 +174,8 @@ TU_VERIFY_STATIC(sizeof(desc_uac2_configuration) == CONFIG_UAC2_TOTAL_LEN, "Inco // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed tusb_desc_device_qualifier_t const desc_device_qualifier = { - .bLength = sizeof(tusb_desc_device_t), - .bDescriptorType = TUSB_DESC_DEVICE, + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, .bcdUSB = 0x0200, .bDeviceClass = TUSB_CLASS_MISC, diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c index 114dd5722..b3382c82d 100644 --- a/examples/device/video_capture/src/usb_descriptors.c +++ b/examples/device/video_capture/src/usb_descriptors.c @@ -385,8 +385,8 @@ static uint8_t * get_hs_configuration_desc(void) { // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed static tusb_desc_device_qualifier_t const desc_device_qualifier = { - .bLength = sizeof(tusb_desc_device_t), - .bDescriptorType = TUSB_DESC_DEVICE, + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, .bcdUSB = USB_BCD, .bDeviceClass = TUSB_CLASS_MISC, diff --git a/examples/device/video_capture_2ch/src/usb_descriptors.c b/examples/device/video_capture_2ch/src/usb_descriptors.c index 024d16e07..8dc986da6 100644 --- a/examples/device/video_capture_2ch/src/usb_descriptors.c +++ b/examples/device/video_capture_2ch/src/usb_descriptors.c @@ -552,8 +552,8 @@ static uint8_t * get_hs_configuration_desc(void) { // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed static tusb_desc_device_qualifier_t const desc_device_qualifier = { - .bLength = sizeof(tusb_desc_device_t), - .bDescriptorType = TUSB_DESC_DEVICE, + .bLength = sizeof(tusb_desc_device_qualifier_t), + .bDescriptorType = TUSB_DESC_DEVICE_QUALIFIER, .bcdUSB = USB_BCD, .bDeviceClass = TUSB_CLASS_MISC, diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c index 0c2acd94e..50794bdba 100644 --- a/examples/device/webusb_serial/src/main.c +++ b/examples/device/webusb_serial/src/main.c @@ -101,7 +101,7 @@ int main(void) { while (1) { tud_task(); // tinyusb device task - cdc_task(); + tud_cdc_write_flush(); led_blinking_task(); } } @@ -116,13 +116,7 @@ static void echo_all(const uint8_t buf[], uint32_t count) { // echo to cdc if (tud_cdc_connected()) { - for (uint32_t i = 0; i < count; i++) { - tud_cdc_write_char(buf[i]); - if (buf[i] == '\r') { - tud_cdc_write_char('\n'); - } - } - tud_cdc_write_flush(); + tud_cdc_write(buf, count); } } @@ -162,7 +156,9 @@ void tud_resume_cb(void) { // return false to stall control endpoint (e.g unsupported request) bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const* request) { // nothing to with DATA & ACK stage - if (stage != CONTROL_STAGE_SETUP) return true; + if (stage != CONTROL_STAGE_SETUP) { + return true; + } switch (request->bmRequestType_bit.type) { case TUSB_REQ_TYPE_VENDOR: @@ -215,33 +211,21 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ return false; } -void tud_vendor_rx_cb(uint8_t itf, uint8_t const* buffer, uint16_t bufsize) { - (void) itf; +void tud_vendor_rx_cb(uint8_t idx, const uint8_t *buffer, uint32_t bufsize) { + (void)idx; + (void)buffer; + (void)bufsize; - echo_all(buffer, bufsize); - - // if using RX buffered is enabled, we need to flush the buffer to make room for new data - #if CFG_TUD_VENDOR_RX_BUFSIZE > 0 - tud_vendor_read_flush(); - #endif + while (tud_vendor_available()) { + uint8_t buf[64]; + const uint32_t count = tud_vendor_read(buf, sizeof(buf)); + echo_all(buf, count); + } } //--------------------------------------------------------------------+ // USB CDC //--------------------------------------------------------------------+ -void cdc_task(void) { - if (tud_cdc_connected()) { - // connected and there are data available - if (tud_cdc_available()) { - uint8_t buf[64]; - - uint32_t count = tud_cdc_read(buf, sizeof(buf)); - - // echo back to both web serial and cdc - echo_all(buf, count); - } - } -} // Invoked when cdc when line state changed e.g connected/disconnected void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) { @@ -255,8 +239,13 @@ void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) { } // Invoked when CDC interface received data from host -void tud_cdc_rx_cb(uint8_t itf) { - (void)itf; +void tud_cdc_rx_cb(uint8_t idx) { + (void)idx; + while (tud_cdc_available()) { + uint8_t buf[64]; + const uint32_t count = tud_cdc_read(buf, sizeof(buf)); + echo_all(buf, count); // echo back to both web serial and cdc + } } //--------------------------------------------------------------------+ @@ -267,7 +256,9 @@ void led_blinking_task(void) { static bool led_state = false; // Blink every interval ms - if (board_millis() - start_ms < blink_interval_ms) return; // not enough time + if (board_millis() - start_ms < blink_interval_ms) { + return; // not enough time + } start_ms += blink_interval_ms; board_led_write(led_state); diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c index beac1a7f8..a6c2217fe 100644 --- a/hw/bsp/at32f402_405/family.c +++ b/hw/bsp/at32f402_405/family.c @@ -75,16 +75,17 @@ void board_init(void) /* vbus ignore */ board_vbus_sense_init(); - /* configure systick */ - SysTick_Config(system_core_clock / 1000); - - #if CFG_TUSB_OS == OPT_OS_FREERTOS + #if CFG_TUSB_OS == OPT_OS_NONE + /* configure systick */ + SysTick_Config(system_core_clock / 1000); + NVIC_SetPriority(OTGHS_IRQn, 0); + NVIC_SetPriority(OTGFS1_IRQn, 0); + #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(OTGHS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); - #else - NVIC_SetPriority(OTGHS_IRQn, 0); - NVIC_SetPriority(OTGFS1_IRQn, 0); #endif /* config led and key */ diff --git a/hw/bsp/at32f435_437/family.c b/hw/bsp/at32f435_437/family.c index 4bd6ee73c..01dd429f8 100644 --- a/hw/bsp/at32f435_437/family.c +++ b/hw/bsp/at32f435_437/family.c @@ -74,12 +74,14 @@ void board_init(void) { /* vbus ignore */ board_vbus_sense_init(); - SysTick_Config(SystemCoreClock / 1000); #if CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(OTGFS2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #else + SysTick_Config(SystemCoreClock / 1000); NVIC_SetPriority(OTGFS1_IRQn, 0); NVIC_SetPriority(OTGFS2_IRQn, 0); #endif diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index 84b083e29..18833da80 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -120,8 +120,9 @@ void board_init(void) { #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); - #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #ifdef USBPHY2 diff --git a/hw/bsp/kinetis_k/family.c b/hw/bsp/kinetis_k/family.c index 816c5c87e..98ef52739 100644 --- a/hw/bsp/kinetis_k/family.c +++ b/hw/bsp/kinetis_k/family.c @@ -61,6 +61,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c index 000006372..c257f4b2b 100644 --- a/hw/bsp/kinetis_kl/family.c +++ b/hw/bsp/kinetis_kl/family.c @@ -59,6 +59,8 @@ void board_init(void) // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/lpc11/family.c b/hw/bsp/lpc11/family.c index b5371632c..c9f18bd2f 100644 --- a/hw/bsp/lpc11/family.c +++ b/hw/bsp/lpc11/family.c @@ -74,6 +74,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/lpc13/family.c b/hw/bsp/lpc13/family.c index 1faa54485..e212c6a63 100644 --- a/hw/bsp/lpc13/family.c +++ b/hw/bsp/lpc13/family.c @@ -54,6 +54,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c index e23fdec43..5f22df175 100644 --- a/hw/bsp/lpc15/family.c +++ b/hw/bsp/lpc15/family.c @@ -77,10 +77,12 @@ void board_init(void) { SystemCoreClockUpdate(); +#if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); - -#if CFG_TUSB_OS == OPT_OS_FREERTOS +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/lpc17/family.c b/hw/bsp/lpc17/family.c index 1edab6cd4..ba59fccca 100644 --- a/hw/bsp/lpc17/family.c +++ b/hw/bsp/lpc17/family.c @@ -54,6 +54,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c index 0db5c83b6..6c02c711f 100644 --- a/hw/bsp/lpc18/family.c +++ b/hw/bsp/lpc18/family.c @@ -83,6 +83,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(USB1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); diff --git a/hw/bsp/lpc40/family.c b/hw/bsp/lpc40/family.c index b8bc99452..5ea95e9b8 100644 --- a/hw/bsp/lpc40/family.c +++ b/hw/bsp/lpc40/family.c @@ -89,6 +89,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c index 591090c36..f440fb119 100644 --- a/hw/bsp/lpc43/family.c +++ b/hw/bsp/lpc43/family.c @@ -100,6 +100,8 @@ void board_init(void) // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif diff --git a/hw/bsp/lpc51/family.c b/hw/bsp/lpc51/family.c index c963b76bd..bec86f87f 100644 --- a/hw/bsp/lpc51/family.c +++ b/hw/bsp/lpc51/family.c @@ -57,6 +57,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c index 094866d9b..7bb73afbc 100644 --- a/hw/bsp/lpc54/family.c +++ b/hw/bsp/lpc54/family.c @@ -108,10 +108,12 @@ void board_init(void) { // Init 96 MHz clock BootClockFROHF96M(); +#if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); - -#if CFG_TUSB_OS == OPT_OS_FREERTOS +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c index f1ef58926..ad0e502b5 100644 --- a/hw/bsp/lpc55/family.c +++ b/hw/bsp/lpc55/family.c @@ -147,7 +147,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/maxim/family.c b/hw/bsp/maxim/family.c index 92b5adb6d..7ad7d6ff9 100644 --- a/hw/bsp/maxim/family.c +++ b/hw/bsp/maxim/family.c @@ -66,6 +66,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c index e1accf941..3b91678b1 100644 --- a/hw/bsp/mcx/family.c +++ b/hw/bsp/mcx/family.c @@ -68,6 +68,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) #if CFG_TUSB_MCU == OPT_MCU_MCXN9 NVIC_SetPriority(USB0_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); diff --git a/hw/bsp/mm32/family.c b/hw/bsp/mm32/family.c index 979efb6ca..663c30818 100644 --- a/hw/bsp/mm32/family.c +++ b/hw/bsp/mm32/family.c @@ -70,8 +70,13 @@ void board_init(void) { // usb clock USB_DeviceClockInit(); +#if CFG_TUSB_OS == OPT_OS_NONE SysTick_Config(SystemCoreClock / 1000); NVIC_SetPriority(SysTick_IRQn, 0x0); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; +#endif RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE); diff --git a/hw/bsp/msp432e4/family.c b/hw/bsp/msp432e4/family.c index 9a3b48b66..0e1b0528a 100644 --- a/hw/bsp/msp432e4/family.c +++ b/hw/bsp/msp432e4/family.c @@ -85,6 +85,8 @@ void board_init(void) #if CFG_TUSB_OS == OPT_OS_NONE SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c index 25062b18f..ee3ac61e2 100644 --- a/hw/bsp/nrf/family.c +++ b/hw/bsp/nrf/family.c @@ -100,7 +100,9 @@ static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(120); #define OUTPUTRDY_Msk POWER_USBREGSTATUS_OUTPUTRDY_Msk #endif +#if CFG_TUSB_OS != OPT_OS_ZEPHYR static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0); +#endif void USBD_IRQHandler(void) { tud_int_handler(0); @@ -163,6 +165,7 @@ void board_init(void) { irq_enable(DT_INST_IRQN(0)); #endif +#if CFG_TUSB_OS != OPT_OS_ZEPHYR // UART nrfx_uarte_config_t uart_cfg = { .txd_pin = UART_TX_PIN, @@ -179,6 +182,7 @@ void board_init(void) { }; nrfx_uarte_init(&_uart_id, &uart_cfg, NULL); +#endif //------------- USB -------------// #if CFG_TUD_ENABLED @@ -276,8 +280,13 @@ int board_uart_read(uint8_t* buf, int len) { } int board_uart_write(void const* buf, int len) { +#if CFG_TUSB_OS == OPT_OS_ZEPHYR + (void) buf; + return len; +#else nrfx_err_t err = nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len ,0); return (NRFX_SUCCESS == err) ? len : 0; +#endif } #if CFG_TUSB_OS == OPT_OS_NONE diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake index 4e999b636..3a6e7cc8b 100644 --- a/hw/bsp/nrf/family.cmake +++ b/hw/bsp/nrf/family.cmake @@ -127,7 +127,9 @@ function(family_configure_example TARGET RTOS) ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} ) - if (NOT RTOS STREQUAL zephyr) + if (RTOS STREQUAL zephyr) + target_include_directories(${TARGET} PUBLIC ${ZEPHYR_HAL_NORDIC_MODULE_DIR}/nrfx/bsp/stable/mdk) + else () target_sources(${TARGET} PRIVATE ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}) if (CMAKE_C_COMPILER_ID STREQUAL "GNU") diff --git a/hw/bsp/nuc100_120/family.c b/hw/bsp/nuc100_120/family.c index d04dc6657..752af2a56 100644 --- a/hw/bsp/nuc100_120/family.c +++ b/hw/bsp/nuc100_120/family.c @@ -72,6 +72,9 @@ void board_init(void) #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(48000000 / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; #endif GPIO_SetMode(LED_PORT, 1UL << LED_PIN, GPIO_PMD_OUTPUT); diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c index 0fd24e493..1f75b47c1 100644 --- a/hw/bsp/ra/family.c +++ b/hw/bsp/ra/family.c @@ -118,6 +118,9 @@ void board_init(void) { #if CFG_TUSB_OS == OPT_OS_NONE SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; #endif board_led_write(false); diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c index 62e060c8e..6cbf02412 100644 --- a/hw/bsp/samd11/family.c +++ b/hw/bsp/samd11/family.c @@ -86,7 +86,12 @@ void board_init(void) // 1ms tick timer (samd SystemCoreClock may not correct) SystemCoreClock = CONF_CPU_FREQUENCY; +#if CFG_TUSB_OS == OPT_OS_NONE SysTick_Config(CONF_CPU_FREQUENCY / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; +#endif // Led init gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT); diff --git a/hw/bsp/samd2x_l2x/family.c b/hw/bsp/samd2x_l2x/family.c index 67da1294e..a2dc8a8d4 100644 --- a/hw/bsp/samd2x_l2x/family.c +++ b/hw/bsp/samd2x_l2x/family.c @@ -154,6 +154,9 @@ void board_init(void) { SystemCoreClock = CONF_CPU_FREQUENCY; #if CFG_TUSB_OS == OPT_OS_NONE SysTick_Config(CONF_CPU_FREQUENCY / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; #endif // Led init diff --git a/hw/bsp/samd5x_e5x/family.c b/hw/bsp/samd5x_e5x/family.c index df6f19d0f..5a7105894 100644 --- a/hw/bsp/samd5x_e5x/family.c +++ b/hw/bsp/samd5x_e5x/family.c @@ -103,7 +103,13 @@ void board_init(void) { // Update SystemCoreClock since it is hard coded with asf4 and not correct // Init 1ms tick timer (samd SystemCoreClock may not correct) SystemCoreClock = CONF_CPU_FREQUENCY; + +#if CFG_TUSB_OS == OPT_OS_NONE SysTick_Config(CONF_CPU_FREQUENCY / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; +#endif // Led init gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT); diff --git a/hw/bsp/same7x/family.c b/hw/bsp/same7x/family.c index 572c83588..6feefa3b5 100644 --- a/hw/bsp/same7x/family.c +++ b/hw/bsp/same7x/family.c @@ -129,6 +129,11 @@ void board_init(void) { #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer (SystemCoreClock may not be correct after init) SysTick_Config(CONF_CPU_FREQUENCY / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority((IRQn_Type) ID_USBHS, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif // Enable USB clock diff --git a/hw/bsp/samg/family.c b/hw/bsp/samg/family.c index 234dc0ec0..5c5fc3c14 100644 --- a/hw/bsp/samg/family.c +++ b/hw/bsp/samg/family.c @@ -88,6 +88,8 @@ void board_init(void) { // 1ms tick timer (samd SystemCoreClock may not correct) SysTick_Config(CONF_CPU_FREQUENCY / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; NVIC_SetPriority(UDP_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); #endif diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c index 09704b527..ba8b14dd1 100644 --- a/hw/bsp/stm32c0/family.c +++ b/hw/bsp/stm32c0/family.c @@ -68,7 +68,7 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c index ea1373e6c..b99b0a8cc 100644 --- a/hw/bsp/stm32f0/family.c +++ b/hw/bsp/stm32f0/family.c @@ -62,7 +62,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c index 29785397f..3147061cf 100644 --- a/hw/bsp/stm32f1/family.c +++ b/hw/bsp/stm32f1/family.c @@ -77,8 +77,9 @@ void board_init(void) { #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); - #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB_HP_CAN1_TX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c index c1333382a..8ea8ec5a5 100644 --- a/hw/bsp/stm32f2/family.c +++ b/hw/bsp/stm32f2/family.c @@ -56,6 +56,9 @@ void board_init(void) { #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); + #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; #endif all_rcc_clk_enable(); diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c index 84612d416..95bcc7882 100644 --- a/hw/bsp/stm32f3/family.c +++ b/hw/bsp/stm32f3/family.c @@ -68,10 +68,13 @@ void USBWakeUp_RMP_IRQHandler(void) { void board_init(void) { SystemClock_Config(); - #if CFG_TUSB_OS == OPT_OS_NONE +#if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); - #endif +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; +#endif // Remap the USB interrupts __HAL_RCC_SYSCFG_CLK_ENABLE(); diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c index 6e02b0575..025f6a08c 100644 --- a/hw/bsp/stm32f4/family.c +++ b/hw/bsp/stm32f4/family.c @@ -102,7 +102,7 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c index 38dfaa3bc..ac22c606f 100644 --- a/hw/bsp/stm32f7/family.c +++ b/hw/bsp/stm32f7/family.c @@ -105,7 +105,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c index 67b0b3f1c..7b86aedb4 100644 --- a/hw/bsp/stm32g0/family.c +++ b/hw/bsp/stm32g0/family.c @@ -65,7 +65,7 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c index 49ef86db9..d8afa0f95 100644 --- a/hw/bsp/stm32g4/family.c +++ b/hw/bsp/stm32g4/family.c @@ -77,7 +77,7 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c index 26ba34ac3..983944b1c 100644 --- a/hw/bsp/stm32h5/family.c +++ b/hw/bsp/stm32h5/family.c @@ -88,7 +88,7 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c index 7b618b2e4..054d7855f 100644 --- a/hw/bsp/stm32h7/family.c +++ b/hw/bsp/stm32h7/family.c @@ -130,7 +130,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000u); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1UL; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c index 6192f7a40..784c92465 100644 --- a/hw/bsp/stm32h7rs/family.c +++ b/hw/bsp/stm32h7rs/family.c @@ -304,7 +304,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c index b28903e00..6aeab1259 100644 --- a/hw/bsp/stm32l0/family.c +++ b/hw/bsp/stm32l0/family.c @@ -54,7 +54,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c index 114a6a483..e69ae8e3b 100644 --- a/hw/bsp/stm32l4/family.c +++ b/hw/bsp/stm32l4/family.c @@ -78,6 +78,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) #if defined(USB_OTG_FS) NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c index 58be4867d..567bb7294 100644 --- a/hw/bsp/stm32n6/family.c +++ b/hw/bsp/stm32n6/family.c @@ -140,7 +140,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake index 6aec26f99..6c7aaea61 100644 --- a/hw/bsp/stm32n6/family.cmake +++ b/hw/bsp/stm32n6/family.cmake @@ -44,11 +44,11 @@ set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s) set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU}) set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s) if(NOT DEFINED LD_FILE_GNU) -set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash.ld) +set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_axisram2_fsbl.ld) endif() set(LD_FILE_Clang ${LD_FILE_GNU}) if(NOT DEFINED LD_FILE_IAR) - set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf) + set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_axisram2_fsbl.icf) endif() #------------------------------------ diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c index bf2503865..50b513d8f 100644 --- a/hw/bsp/stm32u0/family.c +++ b/hw/bsp/stm32u0/family.c @@ -70,6 +70,14 @@ void board_init(void) { #endif __HAL_RCC_PWR_CLK_ENABLE(); +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; +#endif + // LED GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitStruct.Pin = LED_PIN; diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c index 032c01f34..0af497366 100644 --- a/hw/bsp/stm32u5/family.c +++ b/hw/bsp/stm32u5/family.c @@ -90,6 +90,9 @@ void board_init(void) { #if CFG_TUSB_OS == OPT_OS_NONE // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; #endif GPIO_InitTypeDef GPIO_InitStruct; diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c index 93aba02fa..153d10a09 100644 --- a/hw/bsp/stm32wb/family.c +++ b/hw/bsp/stm32wb/family.c @@ -64,7 +64,7 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/stm32wba/family.c b/hw/bsp/stm32wba/family.c index 923ea197c..8dc6547ae 100644 --- a/hw/bsp/stm32wba/family.c +++ b/hw/bsp/stm32wba/family.c @@ -131,7 +131,7 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c index 4e5491005..ee1fa2a3c 100644 --- a/hw/bsp/tm4c/family.c +++ b/hw/bsp/tm4c/family.c @@ -77,6 +77,8 @@ void board_init(void) { // 1ms tick timer SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS + // Explicitly disable systick to prevent its ISR from running before scheduler start + SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c index 1acce024b..6fef53025 100644 --- a/hw/bsp/xmc4000/family.c +++ b/hw/bsp/xmc4000/family.c @@ -78,7 +78,7 @@ void board_init(void) { SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS - // Explicitly disable systick to prevent its ISR runs before scheduler start + // Explicitly disable systick to prevent its ISR from running before scheduler start SysTick->CTRL &= ~1U; // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 9e62c6509..d7792afe4 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -66,6 +66,8 @@ typedef struct { #define ITF_MEM_RESET_SIZE offsetof(cdcd_interface_t, line_coding) +// Skip local EP buffer if dedicated hw FIFO is supported + #if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0 typedef struct { TUD_EPBUF_DEF(epout, CFG_TUD_CDC_EP_BUFSIZE); TUD_EPBUF_DEF(epin, CFG_TUD_CDC_EP_BUFSIZE); @@ -75,6 +77,9 @@ typedef struct { #endif } cdcd_epbuf_t; +CFG_TUD_MEM_SECTION static cdcd_epbuf_t _cdcd_epbuf[CFG_TUD_CDC]; +#endif + //--------------------------------------------------------------------+ // Weak stubs: invoked if no strong implementation is available //--------------------------------------------------------------------+ @@ -115,7 +120,6 @@ TU_ATTR_WEAK void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms) { // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC]; -CFG_TUD_MEM_SECTION static cdcd_epbuf_t _cdcd_epbuf[CFG_TUD_CDC]; static tud_cdc_configure_t _cdcd_cfg = TUD_CDC_CONFIGURE_DEFAULT(); TU_ATTR_ALWAYS_INLINE static inline uint8_t find_cdc_itf(uint8_t ep_addr) { @@ -166,40 +170,22 @@ void tud_cdc_n_get_line_coding(uint8_t itf, cdc_line_coding_t *coding) { } #if CFG_TUD_CDC_NOTIFY -bool tud_cdc_n_notify_uart_state (uint8_t itf, const cdc_notify_uart_state_t *state) { +bool tud_cdc_n_notify_msg(uint8_t itf, cdc_notify_msg_t *msg) { TU_VERIFY(itf < CFG_TUD_CDC); - cdcd_interface_t *p_cdc = &_cdcd_itf[itf]; - cdcd_epbuf_t *p_epbuf = &_cdcd_epbuf[itf]; + const cdcd_interface_t *p_cdc = &_cdcd_itf[itf]; TU_VERIFY(tud_ready() && p_cdc->ep_notify != 0); TU_VERIFY(usbd_edpt_claim(p_cdc->rhport, p_cdc->ep_notify)); - cdc_notify_msg_t* notify_msg = &p_epbuf->epnotify; - notify_msg->request.bmRequestType = CDC_REQ_TYPE_NOTIF; - notify_msg->request.bRequest = CDC_NOTIF_SERIAL_STATE; - notify_msg->request.wValue = 0; - notify_msg->request.wIndex = p_cdc->itf_num; - notify_msg->request.wLength = sizeof(cdc_notify_uart_state_t); - notify_msg->serial_state = *state; - - return usbd_edpt_xfer(p_cdc->rhport, p_cdc->ep_notify, (uint8_t *)notify_msg, 8 + sizeof(cdc_notify_uart_state_t), false); -} - -bool tud_cdc_n_notify_conn_speed_change(uint8_t itf, const cdc_notify_conn_speed_change_t* conn_speed_change) { - TU_VERIFY(itf < CFG_TUD_CDC); - cdcd_interface_t *p_cdc = &_cdcd_itf[itf]; - cdcd_epbuf_t *p_epbuf = &_cdcd_epbuf[itf]; - TU_VERIFY(tud_ready() && p_cdc->ep_notify != 0); - TU_VERIFY(usbd_edpt_claim(p_cdc->rhport, p_cdc->ep_notify)); + #if CFG_TUD_EDPT_DEDICATED_HWFIFO + cdc_notify_msg_t *msg_epbuf = msg; + #else + cdc_notify_msg_t *msg_epbuf = &_cdcd_epbuf[itf].epnotify; + *msg_epbuf = *msg; + #endif - cdc_notify_msg_t* notify_msg = &p_epbuf->epnotify; - notify_msg->request.bmRequestType = CDC_REQ_TYPE_NOTIF; - notify_msg->request.bRequest = CDC_NOTIF_CONNECTION_SPEED_CHANGE; - notify_msg->request.wValue = 0; - notify_msg->request.wIndex = p_cdc->itf_num; - notify_msg->request.wLength = sizeof(cdc_notify_conn_speed_change_t); - notify_msg->conn_speed_change = *conn_speed_change; + msg_epbuf->request.wIndex = p_cdc->itf_num; - return usbd_edpt_xfer(p_cdc->rhport, p_cdc->ep_notify, (uint8_t *)notify_msg, 8 + sizeof(cdc_notify_conn_speed_change_t), false); + return usbd_edpt_xfer(p_cdc->rhport, p_cdc->ep_notify, (uint8_t *)msg_epbuf, 8 + msg_epbuf->request.wLength, false); } #endif @@ -268,8 +254,6 @@ void cdcd_init(void) { tu_memclr(_cdcd_itf, sizeof(_cdcd_itf)); for (uint8_t i = 0; i < CFG_TUD_CDC; i++) { cdcd_interface_t *p_cdc = &_cdcd_itf[i]; - cdcd_epbuf_t *p_epbuf = &_cdcd_epbuf[i]; - p_cdc->wanted_char = (char) -1; // default line coding is : stop bit = 1, parity = none, data bits = 8 @@ -278,14 +262,22 @@ void cdcd_init(void) { p_cdc->line_coding.parity = 0; p_cdc->line_coding.data_bits = 8; + #if CFG_TUD_EDPT_DEDICATED_HWFIFO + uint8_t *epout_buf = NULL; + uint8_t *epin_buf = NULL; + #else + uint8_t *epout_buf = _cdcd_epbuf[i].epout; + uint8_t *epin_buf = _cdcd_epbuf[i].epin; + #endif + tu_edpt_stream_init(&p_cdc->stream.rx, false, false, false, p_cdc->stream.rx_ff_buf, CFG_TUD_CDC_RX_BUFSIZE, - p_epbuf->epout, CFG_TUD_CDC_EP_BUFSIZE); + epout_buf, CFG_TUD_CDC_EP_BUFSIZE); // TX fifo can be configured to change to overwritable if not connected (DTR bit not set). Without DTR we do not // know if data is actually polled by terminal. This way the most current data is prioritized. // Default: is overwritable tu_edpt_stream_init(&p_cdc->stream.tx, false, true, _cdcd_cfg.tx_overwritabe_if_not_connected, - p_cdc->stream.tx_ff_buf, CFG_TUD_CDC_TX_BUFSIZE, p_epbuf->epin, CFG_TUD_CDC_EP_BUFSIZE); + p_cdc->stream.tx_ff_buf, CFG_TUD_CDC_TX_BUFSIZE, epin_buf, CFG_TUD_CDC_EP_BUFSIZE); } } @@ -481,11 +473,35 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ if (ep_addr == stream_rx->ep_addr) { tu_edpt_stream_read_xfer_complete(stream_rx, xferred_bytes); - // Check for wanted char and invoke wanted callback (multiple times if multiple wanted received) + // Check for wanted char and invoke wanted callback if (((signed char)p_cdc->wanted_char) != -1) { - for (uint32_t i = 0; i < xferred_bytes; i++) { - if ((p_cdc->wanted_char == (char)stream_rx->ep_buf[i]) && !tu_edpt_stream_empty(stream_rx)) { - tud_cdc_rx_wanted_cb(itf, p_cdc->wanted_char); + tu_fifo_buffer_info_t buf_info; + tu_fifo_get_read_info(&stream_rx->ff, &buf_info); + + // find backward + uint8_t *ptr; + if (buf_info.wrapped.len > 0) { + ptr = buf_info.wrapped.ptr + buf_info.wrapped.len - 1; // last byte of wrap buffer + } else if (buf_info.linear.len > 0) { + ptr = buf_info.linear.ptr + buf_info.linear.len - 1; // last byte of linear buffer + } else { + ptr = NULL; // no data + } + + if (ptr != NULL) { + for (uint32_t i = 0; i < xferred_bytes; i++) { + if (p_cdc->wanted_char == (char)*ptr) { + tud_cdc_rx_wanted_cb(itf, p_cdc->wanted_char); + break; // only invoke once per transfer, even if multiple wanted chars are present + } + + if (ptr == buf_info.wrapped.ptr) { + ptr = buf_info.linear.ptr + buf_info.linear.len - 1; // last byte of linear buffer + } else if (ptr == buf_info.linear.ptr) { + break; // reached the beginning + } else { + ptr--; + } } } } @@ -499,11 +515,9 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_ } // Data sent to host, we continue to fetch from tx fifo to send. - // Note: This will cause incorrect baudrate set in line coding. - // Though maybe the baudrate is not really important !!! + // Note: This will cause incorrect baudrate set in line coding. Though maybe the baudrate is not really important ! if (ep_addr == stream_tx->ep_addr) { - // invoke transmit callback to possibly refill tx fifo - tud_cdc_tx_complete_cb(itf); + tud_cdc_tx_complete_cb(itf); // invoke callback to possibly refill tx fifo if (0 == tu_edpt_stream_write_xfer(rhport, stream_tx)) { // If there is no data left, a ZLP should be sent if needed diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index 6f21af4f3..0809b578f 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -36,6 +36,14 @@ #define CFG_TUD_CDC_NOTIFY 0 #endif +#ifndef CFG_TUD_CDC_TX_BUFSIZE + #define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64) +#endif + +#ifndef CFG_TUD_CDC_RX_BUFSIZE + #define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64) +#endif + #if !defined(CFG_TUD_CDC_EP_BUFSIZE) && defined(CFG_TUD_CDC_EPSIZE) #warning CFG_TUD_CDC_EPSIZE is renamed to CFG_TUD_CDC_EP_BUFSIZE, please update to use the new name #define CFG_TUD_CDC_EP_BUFSIZE CFG_TUD_CDC_EPSIZE @@ -133,11 +141,37 @@ bool tud_cdc_n_write_clear(uint8_t itf); #if CFG_TUD_CDC_NOTIFY +bool tud_cdc_n_notify_msg(uint8_t itf, cdc_notify_msg_t *msg); + // Send UART status notification: DCD, DSR etc .. -bool tud_cdc_n_notify_uart_state(uint8_t itf, const cdc_notify_uart_state_t *state); +TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_n_notify_uart_state(uint8_t itf, + const cdc_notify_uart_state_t *state) { + cdc_notify_msg_t notify_msg; + notify_msg.request.bmRequestType = CDC_REQ_TYPE_NOTIF; + notify_msg.request.bRequest = CDC_NOTIF_SERIAL_STATE; + notify_msg.request.wValue = 0; + notify_msg.request.wIndex = 0; // filled later + notify_msg.request.wLength = sizeof(cdc_notify_uart_state_t); + notify_msg.serial_state = *state; + return tud_cdc_n_notify_msg(itf, ¬ify_msg); +} // Send connection speed change notification -bool tud_cdc_n_notify_conn_speed_change(uint8_t itf, const cdc_notify_conn_speed_change_t* conn_speed_change); +TU_ATTR_ALWAYS_INLINE static inline bool +tud_cdc_n_notify_conn_speed_change(uint8_t itf, const cdc_notify_conn_speed_change_t *conn_speed_change) { + cdc_notify_msg_t notify_msg; + notify_msg.request.bmRequestType = CDC_REQ_TYPE_NOTIF; + notify_msg.request.bRequest = CDC_NOTIF_CONNECTION_SPEED_CHANGE; + notify_msg.request.wValue = 0; + notify_msg.request.wIndex = 0; // filled later + notify_msg.request.wLength = sizeof(cdc_notify_conn_speed_change_t); + notify_msg.conn_speed_change = *conn_speed_change; + return tud_cdc_n_notify_msg(itf, ¬ify_msg); +} + +TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_notify_msg(cdc_notify_msg_t *msg) { + return tud_cdc_n_notify_msg(0, msg); +} TU_ATTR_ALWAYS_INLINE static inline bool tud_cdc_notify_uart_state(const cdc_notify_uart_state_t* state) { return tud_cdc_n_notify_uart_state(0, state); diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index b20903d68..8d1dc7d4a 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -26,7 +26,7 @@ #include "tusb_option.h" -#if (CFG_TUD_ENABLED && CFG_TUD_MIDI) +#if CFG_TUD_ENABLED && CFG_TUD_MIDI //--------------------------------------------------------------------+ // INCLUDE @@ -71,20 +71,21 @@ typedef struct { static midid_interface_t _midid_itf[CFG_TUD_MIDI]; -// Endpoint Transfer buffer + #if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0 +// Endpoint Transfer buffer: not used if dedicated hw FIFO is available typedef struct { TUD_EPBUF_DEF(epin, CFG_TUD_MIDI_EP_BUFSIZE); TUD_EPBUF_DEF(epout, CFG_TUD_MIDI_EP_BUFSIZE); } midid_epbuf_t; CFG_TUD_MEM_SECTION static midid_epbuf_t _midid_epbuf[CFG_TUD_MIDI]; + #endif //--------------------------------------------------------------------+ // INTERNAL OBJECT & FUNCTION DECLARATION //--------------------------------------------------------------------+ bool tud_midi_n_mounted (uint8_t itf) { midid_interface_t *p_midi = &_midid_itf[itf]; - const bool tx_opened = tu_edpt_stream_is_opened(&p_midi->ep_stream.tx); const bool rx_opened = tu_edpt_stream_is_opened(&p_midi->ep_stream.rx); return tx_opened && rx_opened; @@ -313,18 +314,23 @@ uint32_t tud_midi_n_packet_write_n(uint8_t itf, const uint8_t packets[], uint32_ //--------------------------------------------------------------------+ void midid_init(void) { tu_memclr(_midid_itf, sizeof(_midid_itf)); - for (uint8_t i = 0; i < CFG_TUD_MIDI; i++) { midid_interface_t *p_midi = &_midid_itf[i]; + + #if CFG_TUD_EDPT_DEDICATED_HWFIFO + uint8_t *epout_buf = NULL; + uint8_t *epin_buf = NULL; + #else midid_epbuf_t *p_epbuf = &_midid_epbuf[i]; + uint8_t *epout_buf = p_epbuf->epout; + uint8_t *epin_buf = p_epbuf->epin; + #endif - tu_edpt_stream_init( - &p_midi->ep_stream.rx, false, false, false, p_midi->ep_stream.rx_ff_buf, CFG_TUD_MIDI_RX_BUFSIZE, - p_epbuf->epout, CFG_TUD_MIDI_EP_BUFSIZE); + tu_edpt_stream_init(&p_midi->ep_stream.rx, false, false, false, p_midi->ep_stream.rx_ff_buf, + CFG_TUD_MIDI_RX_BUFSIZE, epout_buf, CFG_TUD_MIDI_EP_BUFSIZE); - tu_edpt_stream_init( - &p_midi->ep_stream.tx, false, true, false, p_midi->ep_stream.tx_ff_buf, CFG_TUD_MIDI_TX_BUFSIZE, p_epbuf->epin, - CFG_TUD_MIDI_EP_BUFSIZE); + tu_edpt_stream_init(&p_midi->ep_stream.tx, false, true, false, p_midi->ep_stream.tx_ff_buf, CFG_TUD_MIDI_TX_BUFSIZE, + epin_buf, CFG_TUD_MIDI_EP_BUFSIZE); } } diff --git a/src/class/vendor/vendor_device.c b/src/class/vendor/vendor_device.c index 7da4d2239..62e183465 100644 --- a/src/class/vendor/vendor_device.c +++ b/src/class/vendor/vendor_device.c @@ -37,47 +37,56 @@ // MACRO CONSTANT TYPEDEF //--------------------------------------------------------------------+ typedef struct { + uint8_t rhport; uint8_t itf_num; /*------------- From this point, data is not cleared by bus reset -------------*/ struct { - tu_edpt_stream_t stream; - #if CFG_TUD_VENDOR_TX_BUFSIZE > 0 - uint8_t ff_buf[CFG_TUD_VENDOR_TX_BUFSIZE]; - #endif - } tx; + tu_edpt_stream_t tx; + tu_edpt_stream_t rx; - struct { - tu_edpt_stream_t stream; - #if CFG_TUD_VENDOR_RX_BUFSIZE > 0 - uint8_t ff_buf[CFG_TUD_VENDOR_RX_BUFSIZE]; - #endif - } rx; + #if CFG_TUD_VENDOR_TX_BUFSIZE > 0 + uint8_t tx_ff_buf[CFG_TUD_VENDOR_TX_BUFSIZE]; + #endif + #if CFG_TUD_VENDOR_RX_BUFSIZE > 0 + uint8_t rx_ff_buf[CFG_TUD_VENDOR_RX_BUFSIZE]; + #endif + } stream; } vendord_interface_t; -#define ITF_MEM_RESET_SIZE (offsetof(vendord_interface_t, itf_num) + sizeof(((vendord_interface_t *)0)->itf_num)) +#define ITF_MEM_RESET_SIZE (offsetof(vendord_interface_t, itf_num) + sizeof(((vendord_interface_t *)0)->itf_num)) static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR]; +#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0 || CFG_TUD_VENDOR_RX_BUFSIZE == 0 typedef struct { + // Skip local EP buffer if dedicated hw FIFO is supported + #if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0 || CFG_TUD_VENDOR_RX_BUFSIZE == 0 TUD_EPBUF_DEF(epout, CFG_TUD_VENDOR_EPSIZE); + #endif + + // Skip local EP buffer if dedicated hw FIFO is supported + #if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0 TUD_EPBUF_DEF(epin, CFG_TUD_VENDOR_EPSIZE); + #endif } vendord_epbuf_t; CFG_TUD_MEM_SECTION static vendord_epbuf_t _vendord_epbuf[CFG_TUD_VENDOR]; + #endif //--------------------------------------------------------------------+ // Weak stubs: invoked if no strong implementation is available //--------------------------------------------------------------------+ -TU_ATTR_WEAK void tud_vendor_rx_cb(uint8_t itf, uint8_t const* buffer, uint16_t bufsize) { - (void) itf; - (void) buffer; - (void) bufsize; + +TU_ATTR_WEAK void tud_vendor_rx_cb(uint8_t idx, const uint8_t *buffer, uint32_t bufsize) { + (void)idx; + (void)buffer; + (void)bufsize; } -TU_ATTR_WEAK void tud_vendor_tx_cb(uint8_t itf, uint32_t sent_bytes) { - (void) itf; +TU_ATTR_WEAK void tud_vendor_tx_cb(uint8_t idx, uint32_t sent_bytes) { + (void)idx; (void) sent_bytes; } @@ -85,72 +94,79 @@ TU_ATTR_WEAK void tud_vendor_tx_cb(uint8_t itf, uint32_t sent_bytes) { // Application API //-------------------------------------------------------------------- -bool tud_vendor_n_mounted(uint8_t itf) { - TU_VERIFY(itf < CFG_TUD_VENDOR); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - return p_itf->rx.stream.ep_addr || p_itf->tx.stream.ep_addr; +bool tud_vendor_n_mounted(uint8_t idx) { + TU_VERIFY(idx < CFG_TUD_VENDOR); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return p_itf->stream.rx.ep_addr || p_itf->stream.tx.ep_addr; } //--------------------------------------------------------------------+ // Read API //--------------------------------------------------------------------+ -uint32_t tud_vendor_n_available(uint8_t itf) { - TU_VERIFY(itf < CFG_TUD_VENDOR, 0); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - - return tu_edpt_stream_read_available(&p_itf->rx.stream); +#if CFG_TUD_VENDOR_RX_BUFSIZE > 0 +uint32_t tud_vendor_n_available(uint8_t idx) { + TU_VERIFY(idx < CFG_TUD_VENDOR, 0); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_read_available(&p_itf->stream.rx); } -bool tud_vendor_n_peek(uint8_t itf, uint8_t* u8) { - TU_VERIFY(itf < CFG_TUD_VENDOR); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - - return tu_edpt_stream_peek(&p_itf->rx.stream, u8); +bool tud_vendor_n_peek(uint8_t idx, uint8_t *u8) { + TU_VERIFY(idx < CFG_TUD_VENDOR); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_peek(&p_itf->stream.rx, u8); } -uint32_t tud_vendor_n_read (uint8_t itf, void* buffer, uint32_t bufsize) { - TU_VERIFY(itf < CFG_TUD_VENDOR, 0); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - const uint8_t rhport = 0; +uint32_t tud_vendor_n_read(uint8_t idx, void *buffer, uint32_t bufsize) { + TU_VERIFY(idx < CFG_TUD_VENDOR, 0); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_read(p_itf->rhport, &p_itf->stream.rx, buffer, bufsize); +} - return tu_edpt_stream_read(rhport, &p_itf->rx.stream, buffer, bufsize); +uint32_t tud_vendor_n_read_discard(uint8_t idx, uint32_t count) { + TU_VERIFY(idx < CFG_TUD_VENDOR, 0); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_discard(&p_itf->stream.rx, count); } -void tud_vendor_n_read_flush (uint8_t itf) { - TU_VERIFY(itf < CFG_TUD_VENDOR, ); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - const uint8_t rhport = 0; +void tud_vendor_n_read_flush(uint8_t idx) { + TU_VERIFY(idx < CFG_TUD_VENDOR, ); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + tu_edpt_stream_clear(&p_itf->stream.rx); + tu_edpt_stream_read_xfer(p_itf->rhport, &p_itf->stream.rx); +} +#endif - tu_edpt_stream_clear(&p_itf->rx.stream); - tu_edpt_stream_read_xfer(rhport, &p_itf->rx.stream); +#if CFG_TUD_VENDOR_RX_MANUAL_XFER +bool tud_vendor_n_read_xfer(uint8_t idx) { + TU_VERIFY(idx < CFG_TUD_VENDOR); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_read_xfer(p_itf->rhport, &p_itf->stream.rx); } +#endif + //--------------------------------------------------------------------+ // Write API //--------------------------------------------------------------------+ -uint32_t tud_vendor_n_write (uint8_t itf, const void* buffer, uint32_t bufsize) { - TU_VERIFY(itf < CFG_TUD_VENDOR, 0); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - const uint8_t rhport = 0; - - return tu_edpt_stream_write(rhport, &p_itf->tx.stream, buffer, (uint16_t) bufsize); +uint32_t tud_vendor_n_write(uint8_t idx, const void *buffer, uint32_t bufsize) { + TU_VERIFY(idx < CFG_TUD_VENDOR, 0); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_write(p_itf->rhport, &p_itf->stream.tx, buffer, (uint16_t)bufsize); } -uint32_t tud_vendor_n_write_flush (uint8_t itf) { - TU_VERIFY(itf < CFG_TUD_VENDOR, 0); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - const uint8_t rhport = 0; - - return tu_edpt_stream_write_xfer(rhport, &p_itf->tx.stream); +#if CFG_TUD_VENDOR_TX_BUFSIZE > 0 +uint32_t tud_vendor_n_write_flush(uint8_t idx) { + TU_VERIFY(idx < CFG_TUD_VENDOR, 0); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_write_xfer(p_itf->rhport, &p_itf->stream.tx); } -uint32_t tud_vendor_n_write_available (uint8_t itf) { - TU_VERIFY(itf < CFG_TUD_VENDOR, 0); - vendord_interface_t* p_itf = &_vendord_itf[itf]; - const uint8_t rhport = 0; - - return tu_edpt_stream_write_available(rhport, &p_itf->tx.stream); +uint32_t tud_vendor_n_write_available(uint8_t idx) { + TU_VERIFY(idx < CFG_TUD_VENDOR, 0); + vendord_interface_t *p_itf = &_vendord_itf[idx]; + return tu_edpt_stream_write_available(p_itf->rhport, &p_itf->stream.tx); } +#endif //--------------------------------------------------------------------+ // USBD Driver API @@ -160,37 +176,45 @@ void vendord_init(void) { for(uint8_t i=0; i<CFG_TUD_VENDOR; i++) { vendord_interface_t* p_itf = &_vendord_itf[i]; - vendord_epbuf_t* p_epbuf = &_vendord_epbuf[i]; - uint8_t* rx_ff_buf = - #if CFG_TUD_VENDOR_RX_BUFSIZE > 0 - p_itf->rx.ff_buf; - #else - NULL; - #endif + #if CFG_TUD_EDPT_DEDICATED_HWFIFO + #if CFG_TUD_VENDOR_RX_BUFSIZE == 0 // non-fifo rx still need ep buffer + uint8_t *epout_buf = _vendord_epbuf[i].epout; + #else + uint8_t *epout_buf = NULL; + #endif + + uint8_t *epin_buf = NULL; + #else + uint8_t *epout_buf = _vendord_epbuf[i].epout; + uint8_t *epin_buf = _vendord_epbuf[i].epin; + #endif + + #if CFG_TUD_VENDOR_RX_BUFSIZE > 0 + uint8_t *rx_ff_buf = p_itf->stream.rx_ff_buf; + #else + uint8_t *rx_ff_buf = NULL; + #endif - tu_edpt_stream_init(&p_itf->rx.stream, false, false, false, - rx_ff_buf, CFG_TUD_VENDOR_RX_BUFSIZE, - p_epbuf->epout, CFG_TUD_VENDOR_EPSIZE); + tu_edpt_stream_init(&p_itf->stream.rx, false, false, false, rx_ff_buf, CFG_TUD_VENDOR_RX_BUFSIZE, epout_buf, + CFG_TUD_VENDOR_EPSIZE); - uint8_t* tx_ff_buf = - #if CFG_TUD_VENDOR_TX_BUFSIZE > 0 - p_itf->tx.ff_buf; - #else - NULL; - #endif + #if CFG_TUD_VENDOR_TX_BUFSIZE > 0 + uint8_t *tx_ff_buf = p_itf->stream.tx_ff_buf; + #else + uint8_t *tx_ff_buf = NULL; + #endif - tu_edpt_stream_init(&p_itf->tx.stream, false, true, false, - tx_ff_buf, CFG_TUD_VENDOR_TX_BUFSIZE, - p_epbuf->epin, CFG_TUD_VENDOR_EPSIZE); + tu_edpt_stream_init(&p_itf->stream.tx, false, true, false, tx_ff_buf, CFG_TUD_VENDOR_TX_BUFSIZE, epin_buf, + CFG_TUD_VENDOR_EPSIZE); } } bool vendord_deinit(void) { for(uint8_t i=0; i<CFG_TUD_VENDOR; i++) { vendord_interface_t* p_itf = &_vendord_itf[i]; - tu_edpt_stream_deinit(&p_itf->rx.stream); - tu_edpt_stream_deinit(&p_itf->tx.stream); + tu_edpt_stream_deinit(&p_itf->stream.rx); + tu_edpt_stream_deinit(&p_itf->stream.tx); } return true; } @@ -201,31 +225,45 @@ void vendord_reset(uint8_t rhport) { for(uint8_t i=0; i<CFG_TUD_VENDOR; i++) { vendord_interface_t* p_itf = &_vendord_itf[i]; tu_memclr(p_itf, ITF_MEM_RESET_SIZE); - tu_edpt_stream_clear(&p_itf->rx.stream); - tu_edpt_stream_close(&p_itf->rx.stream); - tu_edpt_stream_clear(&p_itf->tx.stream); - tu_edpt_stream_close(&p_itf->tx.stream); + tu_edpt_stream_clear(&p_itf->stream.rx); + tu_edpt_stream_close(&p_itf->stream.rx); + + tu_edpt_stream_clear(&p_itf->stream.tx); + tu_edpt_stream_close(&p_itf->stream.tx); + } +} + +// Find vendor interface by endpoint address +static uint8_t find_vendor_itf(uint8_t ep_addr) { + for (uint8_t idx = 0; idx < CFG_TUD_VENDOR; idx++) { + const vendord_interface_t *p_vendor = &_vendord_itf[idx]; + if (ep_addr == 0) { + // find unused: require both ep == 0 + if (p_vendor->stream.rx.ep_addr == 0 && p_vendor->stream.tx.ep_addr == 0) { + return idx; + } + } else if (ep_addr == p_vendor->stream.rx.ep_addr || ep_addr == p_vendor->stream.tx.ep_addr) { + return idx; + } else { + // nothing to do + } } + return 0xff; } -uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uint16_t max_len) { +uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t *desc_itf, uint16_t max_len) { TU_VERIFY(TUSB_CLASS_VENDOR_SPECIFIC == desc_itf->bInterfaceClass, 0); const uint8_t* desc_end = (const uint8_t*)desc_itf + max_len; const uint8_t* p_desc = tu_desc_next(desc_itf); // Find available interface - vendord_interface_t* p_vendor = NULL; - uint8_t itf; - for(itf=0; itf<CFG_TUD_VENDOR; itf++) { - if (!tud_vendor_n_mounted(itf)) { - p_vendor = &_vendord_itf[itf]; - break; - } - } - TU_VERIFY(p_vendor, 0); - + const uint8_t idx = find_vendor_itf(0); + TU_ASSERT(idx < CFG_TUD_VENDOR, 0); + vendord_interface_t *p_vendor = &_vendord_itf[idx]; + p_vendor->rhport = rhport; p_vendor->itf_num = desc_itf->bInterfaceNumber; + while (tu_desc_in_bounds(p_desc, desc_end)) { const uint8_t desc_type = tu_desc_type(p_desc); if (desc_type == TUSB_DESC_INTERFACE || desc_type == TUSB_DESC_INTERFACE_ASSOCIATION) { @@ -236,16 +274,18 @@ uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uin // open endpoint stream, skip if already opened (multiple IN/OUT endpoints) if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) { - tu_edpt_stream_t *stream_tx = &p_vendor->tx.stream; + tu_edpt_stream_t *stream_tx = &p_vendor->stream.tx; if (stream_tx->ep_addr == 0) { tu_edpt_stream_open(stream_tx, desc_ep); tu_edpt_stream_write_xfer(rhport, stream_tx); // flush pending data } } else { - tu_edpt_stream_t *stream_rx = &p_vendor->rx.stream; + tu_edpt_stream_t *stream_rx = &p_vendor->stream.rx; if (stream_rx->ep_addr == 0) { tu_edpt_stream_open(stream_rx, desc_ep); + #if CFG_TUD_VENDOR_RX_MANUAL_XFER == 0 TU_ASSERT(tu_edpt_stream_read_xfer(rhport, stream_rx) > 0, 0); // prepare for incoming data + #endif } } } @@ -258,38 +298,35 @@ uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uin bool vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) { (void) result; + const uint8_t idx = find_vendor_itf(ep_addr); + TU_VERIFY(idx < CFG_TUD_VENDOR); + vendord_interface_t *p_vendor = &_vendord_itf[idx]; - uint8_t itf; - vendord_interface_t* p_vendor; - - for (itf = 0; itf < CFG_TUD_VENDOR; itf++) { - p_vendor = &_vendord_itf[itf]; - if ((ep_addr == p_vendor->rx.stream.ep_addr) || (ep_addr == p_vendor->tx.stream.ep_addr)) { - break; - } - } - TU_VERIFY(itf < CFG_TUD_VENDOR); - vendord_epbuf_t* p_epbuf = &_vendord_epbuf[itf]; - - if ( ep_addr == p_vendor->rx.stream.ep_addr ) { + if (ep_addr == p_vendor->stream.rx.ep_addr) { // Received new data: put into stream's fifo - tu_edpt_stream_read_xfer_complete(&p_vendor->rx.stream, xferred_bytes); + tu_edpt_stream_read_xfer_complete(&p_vendor->stream.rx, xferred_bytes); - // Invoked callback if any - tud_vendor_rx_cb(itf, p_epbuf->epout, (uint16_t) xferred_bytes); + // invoke callback + #if CFG_TUD_VENDOR_RX_BUFSIZE == 0 + tud_vendor_rx_cb(idx, p_vendor->stream.rx.ep_buf, xferred_bytes); + #else + tud_vendor_rx_cb(idx, NULL, 0); + #endif - tu_edpt_stream_read_xfer(rhport, &p_vendor->rx.stream); - } else if ( ep_addr == p_vendor->tx.stream.ep_addr ) { + #if CFG_TUD_VENDOR_RX_MANUAL_XFER == 0 + tu_edpt_stream_read_xfer(rhport, &p_vendor->stream.rx); // prepare next data + #endif + } else if (ep_addr == p_vendor->stream.tx.ep_addr) { // Send complete - tud_vendor_tx_cb(itf, (uint16_t) xferred_bytes); + tud_vendor_tx_cb(idx, (uint16_t)xferred_bytes); - #if CFG_TUD_VENDOR_TX_BUFSIZE > 0 + #if CFG_TUD_VENDOR_TX_BUFSIZE > 0 // try to send more if possible - if ( 0 == tu_edpt_stream_write_xfer(rhport, &p_vendor->tx.stream) ) { + if (0 == tu_edpt_stream_write_xfer(rhport, &p_vendor->stream.tx)) { // If there is no data left, a ZLP should be sent if xferred_bytes is multiple of EP Packet size and not zero - tu_edpt_stream_write_zlp_if_needed(rhport, &p_vendor->tx.stream, xferred_bytes); + tu_edpt_stream_write_zlp_if_needed(rhport, &p_vendor->stream.tx, xferred_bytes); } - #endif + #endif } return true; diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h index 5376f3917..764d99070 100644 --- a/src/class/vendor/vendor_device.h +++ b/src/class/vendor/vendor_device.h @@ -27,87 +27,133 @@ #ifndef TUSB_VENDOR_DEVICE_H_ #define TUSB_VENDOR_DEVICE_H_ +#ifdef __cplusplus +extern "C" { +#endif + #include "common/tusb_common.h" +//--------------------------------------------------------------------+ +// Configuration +//--------------------------------------------------------------------+ #ifndef CFG_TUD_VENDOR_EPSIZE -#define CFG_TUD_VENDOR_EPSIZE 64 + #define CFG_TUD_VENDOR_EPSIZE 64 #endif // RX FIFO can be disabled by setting this value to 0 #ifndef CFG_TUD_VENDOR_RX_BUFSIZE -#define CFG_TUD_VENDOR_RX_BUFSIZE 64 + #define CFG_TUD_VENDOR_RX_BUFSIZE 64 #endif // TX FIFO can be disabled by setting this value to 0 #ifndef CFG_TUD_VENDOR_TX_BUFSIZE -#define CFG_TUD_VENDOR_TX_BUFSIZE 64 + #define CFG_TUD_VENDOR_TX_BUFSIZE 64 #endif -#ifdef __cplusplus - extern "C" { +// Application will manually schedule RX transfer. This can be useful when using with non-fifo (buffered) mode +// i.e. CFG_TUD_VENDOR_RX_BUFSIZE = 0 +#ifndef CFG_TUD_VENDOR_RX_MANUAL_XFER + #define CFG_TUD_VENDOR_RX_MANUAL_XFER 0 #endif //--------------------------------------------------------------------+ // Application API (Multiple Interfaces) i.e CFG_TUD_VENDOR > 1 //--------------------------------------------------------------------+ -bool tud_vendor_n_mounted (uint8_t itf); -uint32_t tud_vendor_n_available (uint8_t itf); -uint32_t tud_vendor_n_read (uint8_t itf, void* buffer, uint32_t bufsize); -bool tud_vendor_n_peek (uint8_t itf, uint8_t* ui8); -void tud_vendor_n_read_flush (uint8_t itf); -uint32_t tud_vendor_n_write (uint8_t itf, void const* buffer, uint32_t bufsize); -uint32_t tud_vendor_n_write_flush (uint8_t itf); -uint32_t tud_vendor_n_write_available (uint8_t itf); +// Return whether the vendor interface is mounted +bool tud_vendor_n_mounted(uint8_t idx); + +#if CFG_TUD_VENDOR_RX_BUFSIZE > 0 +// Return number of available bytes for reading +uint32_t tud_vendor_n_available(uint8_t idx); + +// Peek a byte from RX buffer +bool tud_vendor_n_peek(uint8_t idx, uint8_t *ui8); + +// Read from RX FIFO +uint32_t tud_vendor_n_read(uint8_t idx, void *buffer, uint32_t bufsize); -TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_n_write_str (uint8_t itf, char const* str); +// Discard count bytes in RX FIFO +uint32_t tud_vendor_n_read_discard(uint8_t idx, uint32_t count); + +// Flush (clear) RX FIFO +void tud_vendor_n_read_flush(uint8_t idx); +#endif + +#if CFG_TUD_VENDOR_RX_MANUAL_XFER +// Start a new RX transfer to fill the RX FIFO, return false if previous transfer is still ongoing +bool tud_vendor_n_read_xfer(uint8_t idx); +#endif + +// Write to TX FIFO. This can be buffered and not sent immediately unless buffered bytes >= USB endpoint size +uint32_t tud_vendor_n_write(uint8_t idx, const void *buffer, uint32_t bufsize); + +#if CFG_TUD_VENDOR_TX_BUFSIZE > 0 +// Force sending buffered data, return number of bytes sent +uint32_t tud_vendor_n_write_flush(uint8_t idx); + +// Return number of bytes available for writing in TX FIFO +uint32_t tud_vendor_n_write_available(uint8_t idx); +#endif + +// Write a null-terminated string to TX FIFO +TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_n_write_str(uint8_t idx, const char *str) { + return tud_vendor_n_write(idx, str, strlen(str)); +} // backward compatible -#define tud_vendor_n_flush(itf) tud_vendor_n_write_flush(itf) +#define tud_vendor_n_flush(idx) tud_vendor_n_write_flush(idx) //--------------------------------------------------------------------+ // Application API (Single Port) i.e CFG_TUD_VENDOR = 1 //--------------------------------------------------------------------+ - -TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_n_write_str(uint8_t itf, char const* str) { - return tud_vendor_n_write(itf, str, strlen(str)); -} - TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_mounted(void) { - return tud_vendor_n_mounted(0); + return tud_vendor_n_mounted(0); } +#if CFG_TUD_VENDOR_RX_BUFSIZE > 0 TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_available(void) { - return tud_vendor_n_available(0); + return tud_vendor_n_available(0); } -TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_read(void* buffer, uint32_t bufsize) { - return tud_vendor_n_read(0, buffer, bufsize); +TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_peek(uint8_t *ui8) { + return tud_vendor_n_peek(0, ui8); } -TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_peek(uint8_t* ui8) { - return tud_vendor_n_peek(0, ui8); +TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_read(void *buffer, uint32_t bufsize) { + return tud_vendor_n_read(0, buffer, bufsize); +} + +TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_read_discard(uint32_t count) { + return tud_vendor_n_read_discard(0, count); } TU_ATTR_ALWAYS_INLINE static inline void tud_vendor_read_flush(void) { - tud_vendor_n_read_flush(0); + tud_vendor_n_read_flush(0); } +#endif -TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write(void const* buffer, uint32_t bufsize) { - return tud_vendor_n_write(0, buffer, bufsize); +#if CFG_TUD_VENDOR_RX_MANUAL_XFER +TU_ATTR_ALWAYS_INLINE static inline bool tud_vendor_read_xfer(void) { + return tud_vendor_n_read_xfer(0); } +#endif -TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_str(char const* str) { - return tud_vendor_n_write_str(0, str); +TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write(const void *buffer, uint32_t bufsize) { + return tud_vendor_n_write(0, buffer, bufsize); } -TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_flush(void) { - return tud_vendor_n_write_flush(0); +TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_str(const char *str) { + return tud_vendor_n_write_str(0, str); } #if CFG_TUD_VENDOR_TX_BUFSIZE > 0 +TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_flush(void) { + return tud_vendor_n_write_flush(0); +} + TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_available(void) { - return tud_vendor_n_write_available(0); + return tud_vendor_n_write_available(0); } #endif @@ -118,15 +164,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_vendor_write_available(void) { // Application Callback API (weak is optional) //--------------------------------------------------------------------+ -// Invoked when received new data -void tud_vendor_rx_cb(uint8_t itf, uint8_t const* buffer, uint16_t bufsize); -// Invoked when last rx transfer finished -void tud_vendor_tx_cb(uint8_t itf, uint32_t sent_bytes); - -//--------------------------------------------------------------------+ -// Inline Functions -//--------------------------------------------------------------------+ +// Invoked when received new data. +// - CFG_TUD_VENDOR_RX_BUFSIZE > 0; buffer and bufsize must not be used (both NULL,0) since data is in RX FIFO +// - CFG_TUD_VENDOR_RX_BUFSIZE = 0: Buffer and bufsize are valid +void tud_vendor_rx_cb(uint8_t idx, const uint8_t *buffer, uint32_t bufsize); +// Invoked when tx transfer is finished +void tud_vendor_tx_cb(uint8_t idx, uint32_t sent_bytes); //--------------------------------------------------------------------+ // Internal Class Driver API @@ -134,11 +178,11 @@ void tud_vendor_tx_cb(uint8_t itf, uint32_t sent_bytes); void vendord_init(void); bool vendord_deinit(void); void vendord_reset(uint8_t rhport); -uint16_t vendord_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t max_len); +uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t *idx_desc, uint16_t max_len); bool vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); #ifdef __cplusplus - } +} #endif #endif /* TUSB_VENDOR_DEVICE_H_ */ diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h index f377d5272..b53fa5c02 100644 --- a/src/common/tusb_common.h +++ b/src/common/tusb_common.h @@ -329,6 +329,39 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_unaligned_write16(void *mem, uint16_ #endif +// scatter read 4 bytes from two buffers. Parameter are not checked +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_scatter_read32(const uint8_t *buf1, uint8_t len1, const uint8_t *buf2, + uint8_t len2) { + uint32_t result = 0; + uint8_t shift = 0; + + for (uint8_t i = 0; i < len1; ++i) { + result |= ((uint32_t)buf1[i]) << shift; + shift += 8; + } + + for (uint8_t i = 0; i < len2; ++i) { + result |= ((uint32_t)buf2[i]) << shift; + shift += 8; + } + + return result; +} + +// scatter write 4 bytes to two buffers. Parameter are not checked +TU_ATTR_ALWAYS_INLINE static inline void tu_scatter_write32(uint32_t value, uint8_t *buf1, uint8_t len1, + uint8_t *buf2, uint8_t len2) { + for (uint8_t i = 0; i < len1; ++i) { + buf1[i] = (uint8_t)(value & 0xFF); + value >>= 8; + } + + for (uint8_t i = 0; i < len2; ++i) { + buf2[i] = (uint8_t)(value & 0xFF); + value >>= 8; + } +} + //--------------------------------------------------------------------+ // Descriptor helper //--------------------------------------------------------------------+ diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index 5c9e586fb..06b0d6a58 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -38,36 +38,27 @@ #if OSAL_MUTEX_REQUIRED -TU_ATTR_ALWAYS_INLINE static inline void _ff_lock(osal_mutex_t mutex) { +TU_ATTR_ALWAYS_INLINE static inline void ff_lock(osal_mutex_t mutex) { if (mutex != NULL) { osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER); } } -TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) { +TU_ATTR_ALWAYS_INLINE static inline void ff_unlock(osal_mutex_t mutex) { if (mutex != NULL) { osal_mutex_unlock(mutex); } } #else - -#define _ff_lock(_mutex) -#define _ff_unlock(_mutex) + #define ff_lock(_mutex) + #define ff_unlock(_mutex) #endif -/** \enum tu_fifo_copy_mode_t - * \brief Write modes intended to allow special read and write functions to be able to - * copy data to and from USB hardware FIFOs as needed for e.g. STM32s and others - */ -typedef enum { - TU_FIFO_COPY_INC, ///< Copy from/to an increasing source/destination address - default mode -#ifdef TUP_MEM_CONST_ADDR - TU_FIFO_COPY_CST_FULL_WORDS, ///< Copy from/to a constant source/destination address - required for e.g. STM32 to write into USB hardware FIFO -#endif -} tu_fifo_copy_mode_t; - +//--------------------------------------------------------------------+ +// Setup API +//--------------------------------------------------------------------+ bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_size, bool overwritable) { // Limit index space to 2*depth - this allows for a fast "modulo" calculation // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable @@ -76,78 +67,97 @@ bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_si return false; } - _ff_lock(f->mutex_wr); - _ff_lock(f->mutex_rd); + ff_lock(f->mutex_wr); + ff_lock(f->mutex_rd); f->buffer = (uint8_t *)buffer; f->depth = depth; - f->item_size = (uint16_t)(item_size & 0x7FFF); + f->item_size = (uint16_t)(item_size & 0x7FFFu); f->overwritable = overwritable; - f->rd_idx = 0; - f->wr_idx = 0; + f->rd_idx = 0u; + f->wr_idx = 0u; + + ff_unlock(f->mutex_wr); + ff_unlock(f->mutex_rd); + + return true; +} + +// clear fifo by resetting read and write indices +bool tu_fifo_clear(tu_fifo_t *f) { + ff_lock(f->mutex_wr); + ff_lock(f->mutex_rd); - _ff_unlock(f->mutex_wr); - _ff_unlock(f->mutex_rd); + f->rd_idx = 0; + f->wr_idx = 0; + + ff_unlock(f->mutex_wr); + ff_unlock(f->mutex_rd); + return true; +} + +// Change the fifo overwritable mode +bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) { + if (f->overwritable == overwritable) { + return true; + } + + ff_lock(f->mutex_wr); + ff_lock(f->mutex_rd); + + f->overwritable = overwritable; + + ff_unlock(f->mutex_wr); + ff_unlock(f->mutex_rd); return true; } //--------------------------------------------------------------------+ // Pull & Push +// copy data to/from fifo without updating read/write pointers //--------------------------------------------------------------------+ - -#ifdef TUP_MEM_CONST_ADDR -// Intended to be used to read from hardware USB FIFO in e.g. STM32 where all data is read from a constant address -// Code adapted from dcd_synopsys.c -// TODO generalize with configurable 1 byte or 4 byte each read -static void _ff_push_const_addr(uint8_t *ff_buf, const void *app_buf, uint16_t len) { - const volatile uint32_t *reg_rx = (volatile const uint32_t *)app_buf; - +#ifdef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32 +// Copy to fifo from fixed address buffer (usually a rx register) with TU_FIFO_FIXED_ADDR_RW32 mode +static void ff_push_fixed_addr_rw32(uint8_t *ff_buf, const volatile uint32_t *reg_rx, uint16_t len) { // Reading full available 32 bit words from const app address uint16_t full_words = len >> 2; while (full_words--) { - tu_unaligned_write32(ff_buf, *reg_rx); + const uint32_t tmp32 = *reg_rx; + tu_unaligned_write32(ff_buf, tmp32); ff_buf += 4; } // Read the remaining 1-3 bytes from const app address const uint8_t bytes_rem = len & 0x03; if (bytes_rem) { - uint32_t tmp32 = *reg_rx; + const uint32_t tmp32 = *reg_rx; memcpy(ff_buf, &tmp32, bytes_rem); } } -// Intended to be used to write to hardware USB FIFO in e.g. STM32 -// where all data is written to a constant address in full word copies -static void _ff_pull_const_addr(void *app_buf, const uint8_t *ff_buf, uint16_t len) { - volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf; - +// Copy from fifo to fixed address buffer (usually a tx register) with TU_FIFO_FIXED_ADDR_RW32 mode +static void ff_pull_fixed_addr_rw32(volatile uint32_t *reg_tx, const uint8_t *ff_buf, uint16_t len) { // Write full available 32 bit words to const address - uint16_t full_words = len >> 2; + uint16_t full_words = len >> 2u; while (full_words--) { *reg_tx = tu_unaligned_read32(ff_buf); - ff_buf += 4; + ff_buf += 4u; } - // Write the remaining 1-3 bytes into const address + // Write the remaining 1-3 bytes const uint8_t bytes_rem = len & 0x03; if (bytes_rem) { - uint32_t tmp32 = 0; + uint32_t tmp32 = 0u; memcpy(&tmp32, ff_buf, bytes_rem); - *reg_tx = tmp32; } } #endif -// send one item to fifo WITHOUT updating write pointer -static inline void _ff_push(tu_fifo_t *f, const void *app_buf, uint16_t rel) { - memcpy(f->buffer + (rel * f->item_size), app_buf, f->item_size); -} - // send n items to fifo WITHOUT updating write pointer -static void _ff_push_n(tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr, tu_fifo_copy_mode_t copy_mode) { +static void ff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr, + tu_fifo_access_mode_t copy_mode) { const uint16_t lin_count = f->depth - wr_ptr; const uint16_t wrap_count = n - lin_count; @@ -158,67 +168,51 @@ static void _ff_push_n(tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t w uint8_t *ff_buf = f->buffer + (wr_ptr * f->item_size); switch (copy_mode) { - case TU_FIFO_COPY_INC: + case TU_FIFO_INC_ADDR_RW8: if (n <= lin_count) { // Linear only memcpy(ff_buf, app_buf, n * f->item_size); } else { // Wrap around - - // Write data to linear part of buffer - memcpy(ff_buf, app_buf, lin_bytes); - - // Write data wrapped around - // TU_ASSERT(nWrap_bytes <= f->depth, ); - memcpy(f->buffer, ((const uint8_t *)app_buf) + lin_bytes, wrap_bytes); + memcpy(ff_buf, app_buf, lin_bytes); // linear part + memcpy(f->buffer, ((const uint8_t *)app_buf) + lin_bytes, wrap_bytes); // wrapped part } break; -#ifdef TUP_MEM_CONST_ADDR - case TU_FIFO_COPY_CST_FULL_WORDS: - // Intended for hardware buffers from which it can be read word by word only +#ifdef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32 + case TU_FIFO_FIXED_ADDR_RW32: { + const volatile uint32_t *reg_rx = (volatile const uint32_t *)app_buf; if (n <= lin_count) { // Linear only - _ff_push_const_addr(ff_buf, app_buf, n * f->item_size); + ff_push_fixed_addr_rw32(ff_buf, reg_rx, n * f->item_size); } else { - // Wrap around case + // Wrap around // Write full words to linear part of buffer - uint16_t nLin_4n_bytes = lin_bytes & 0xFFFC; - _ff_push_const_addr(ff_buf, app_buf, nLin_4n_bytes); - ff_buf += nLin_4n_bytes; + uint16_t lin_4n_bytes = lin_bytes & 0xFFFC; + ff_push_fixed_addr_rw32(ff_buf, reg_rx, lin_4n_bytes); + ff_buf += lin_4n_bytes; // There could be odd 1-3 bytes before the wrap-around boundary - uint8_t rem = lin_bytes & 0x03; + const uint8_t rem = lin_bytes & 0x03; if (rem > 0) { - const volatile uint32_t *rx_fifo = (volatile const uint32_t *)app_buf; + const uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem); + const uint32_t tmp32 = *reg_rx; + tu_scatter_write32(tmp32, ff_buf, rem, f->buffer, remrem); - uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem); wrap_bytes -= remrem; - - uint32_t tmp32 = *rx_fifo; - uint8_t *src_u8 = ((uint8_t *)&tmp32); - - // Write 1-3 bytes before wrapped boundary - while (rem--) { - *ff_buf++ = *src_u8++; - } - - // Read more bytes to beginning to complete a word - ff_buf = f->buffer; - while (remrem--) { - *ff_buf++ = *src_u8++; - } + ff_buf = f->buffer + remrem; // wrap around } else { ff_buf = f->buffer; // wrap around to beginning } // Write data wrapped part if (wrap_bytes > 0) { - _ff_push_const_addr(ff_buf, app_buf, wrap_bytes); + ff_push_fixed_addr_rw32(ff_buf, reg_rx, wrap_bytes); } } break; + } #endif default: @@ -226,13 +220,8 @@ static void _ff_push_n(tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t w } } -// get one item from fifo WITHOUT updating read pointer -static inline void _ff_pull(tu_fifo_t *f, void *app_buf, uint16_t rel) { - memcpy(app_buf, f->buffer + (rel * f->item_size), f->item_size); -} - // get n items from fifo WITHOUT updating read pointer -static void _ff_pull_n(tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_copy_mode_t copy_mode) { +static void ff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_access_mode_t copy_mode) { const uint16_t lin_count = f->depth - rd_ptr; const uint16_t wrap_count = n - lin_count; // only used if wrapped @@ -240,70 +229,56 @@ static void _ff_pull_n(tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, uint16_t wrap_bytes = wrap_count * f->item_size; // current buffer of fifo - uint8_t *ff_buf = f->buffer + (rd_ptr * f->item_size); + const uint8_t *ff_buf = f->buffer + (rd_ptr * f->item_size); switch (copy_mode) { - case TU_FIFO_COPY_INC: + case TU_FIFO_INC_ADDR_RW8: if (n <= lin_count) { // Linear only memcpy(app_buf, ff_buf, n * f->item_size); } else { // Wrap around - - // Read data from linear part of buffer - memcpy(app_buf, ff_buf, lin_bytes); - - // Read data wrapped part - memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes); + memcpy(app_buf, ff_buf, lin_bytes); // linear part + memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes); // wrapped part } break; -#ifdef TUP_MEM_CONST_ADDR - case TU_FIFO_COPY_CST_FULL_WORDS: +#ifdef CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32 + case TU_FIFO_FIXED_ADDR_RW32: { + volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf; + if (n <= lin_count) { // Linear only - _ff_pull_const_addr(app_buf, ff_buf, n * f->item_size); + ff_pull_fixed_addr_rw32(reg_tx, ff_buf, n * f->item_size); } else { // Wrap around case - // Read full words from linear part of buffer + // Read full words from linear part uint16_t lin_4n_bytes = lin_bytes & 0xFFFC; - _ff_pull_const_addr(app_buf, ff_buf, lin_4n_bytes); + ff_pull_fixed_addr_rw32(reg_tx, ff_buf, lin_4n_bytes); ff_buf += lin_4n_bytes; // There could be odd 1-3 bytes before the wrap-around boundary - uint8_t rem = lin_bytes & 0x03; + const uint8_t rem = lin_bytes & 0x03; if (rem > 0) { - volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf; - - uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem); - wrap_bytes -= remrem; - - uint32_t tmp32 = 0; - uint8_t *dst_u8 = (uint8_t *)&tmp32; + const uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem); + const uint32_t scatter32 = tu_scatter_read32(ff_buf, rem, f->buffer, remrem); - // Read 1-3 bytes before wrapped boundary - while (rem--) { - *dst_u8++ = *ff_buf++; - } + *reg_tx = scatter32; - // Read more bytes from beginning to complete a word - ff_buf = f->buffer; - while (remrem--) { - *dst_u8++ = *ff_buf++; - } - - *reg_tx = tmp32; + wrap_bytes -= remrem; + ff_buf = f->buffer + remrem; // wrap around } else { - ff_buf = f->buffer; // wrap around to beginning + ff_buf = f->buffer; // wrap around to beginning } // Read data wrapped part if (wrap_bytes > 0) { - _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes); + ff_pull_fixed_addr_rw32(reg_tx, ff_buf, wrap_bytes); } } break; + } #endif default: @@ -312,32 +287,12 @@ static void _ff_pull_n(tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, } //--------------------------------------------------------------------+ -// Helper -//--------------------------------------------------------------------+ - -// return only the index difference and as such can be used to determine an overflow i.e overflowable count -TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) { - // In case we have non-power of two depth we need a further modification - if (wr_idx >= rd_idx) { - return (uint16_t)(wr_idx - rd_idx); - } else { - return (uint16_t)(2 * depth - (rd_idx - wr_idx)); - } -} - -// return remaining slot in fifo -TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) { - const uint16_t count = _ff_count(depth, wr_idx, rd_idx); - return (depth > count) ? (depth - count) : 0; -} - -//--------------------------------------------------------------------+ // Index Helper //--------------------------------------------------------------------+ // Advance an absolute index // "absolute" index is only in the range of [0..2*depth) -static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset) { +TU_ATTR_ALWAYS_INLINE static inline uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset) { // We limit the index space of p such that a correct wrap around happens // Check for a wrap around or if we are in unused index space - This has to be checked first!! // We are exploiting the wrap around to the correct index @@ -350,23 +305,7 @@ static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset) { return new_idx; } -#if 0 // not used but -// Backward an absolute index -static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset) { - // We limit the index space of p such that a correct wrap around happens - // Check for a wrap around or if we are in unused index space - This has to be checked first!! - // We are exploiting the wrap around to the correct index - uint16_t new_idx = (uint16_t) (idx - offset); - if ( (idx < new_idx) || (new_idx >= 2*depth) ) { - uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*depth-1)); - new_idx = (uint16_t) (new_idx - non_used_index_space); - } - - return new_idx; -} -#endif - -// index to pointer, simply an modulo with minus. +// index to pointer (0..depth-1), simply a modulo with minus. TU_ATTR_ALWAYS_INLINE static inline uint16_t idx2ptr(uint16_t depth, uint16_t idx) { // Only run at most 3 times since index is limit in the range of [0..2*depth) while (idx >= depth) { @@ -376,9 +315,8 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t idx2ptr(uint16_t depth, uint16_t id } // Works on local copies of w -// When an overwritable fifo is overflowed, rd_idx will be re-index so that it forms -// an full fifo i.e _ff_count() = depth -TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_correct_read_index(tu_fifo_t *f, uint16_t wr_idx) { +// When an overwritable fifo is overflowed, rd_idx will be re-index so that it forms a full fifo +TU_ATTR_ALWAYS_INLINE static inline uint16_t correct_read_index(tu_fifo_t *f, uint16_t wr_idx) { uint16_t rd_idx; if (wr_idx >= f->depth) { rd_idx = wr_idx - f->depth; @@ -387,91 +325,86 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_correct_read_index(tu_fifo_t *f } f->rd_idx = rd_idx; - return rd_idx; } -// Works on local copies of w and r -// Must be protected by mutexes since in case of an overflow read pointer gets modified -static bool _tu_fifo_peek(tu_fifo_t *f, void *p_buffer, uint16_t wr_idx, uint16_t rd_idx) { - uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); +//--------------------------------------------------------------------+ +// n-API +//--------------------------------------------------------------------+ - // nothing to peek - if (cnt == 0) { - return false; +// Works on local copies of w and r +// Must be protected by read mutex since in case of an overflow read pointer gets modified +uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, + tu_fifo_access_mode_t access_mode) { + uint16_t count = tu_ff_overflow_count(f->depth, wr_idx, rd_idx); + if (count == 0) { + return 0; // nothing to peek } // Check overflow and correct if required - if (cnt > f->depth) { - rd_idx = _ff_correct_read_index(f, wr_idx); + if (count > f->depth) { + rd_idx = correct_read_index(f, wr_idx); + count = f->depth; } - uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); + if (count < n) { + n = count; // limit to available count + } - // Peek data - _ff_pull(f, p_buffer, rd_ptr); + const uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); + ff_pull_n(f, p_buffer, n, rd_ptr, access_mode); - return true; + return n; } -// Works on local copies of w and r -// Must be protected by mutexes since in case of an overflow read pointer gets modified -static uint16_t _tu_fifo_peek_n( - tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, tu_fifo_copy_mode_t copy_mode) { - uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); - - // nothing to peek - if (cnt == 0) { - return 0; - } - - // Check overflow and correct if required - if (cnt > f->depth) { - rd_idx = _ff_correct_read_index(f, wr_idx); - cnt = f->depth; - } - - // Check if we can read something at and after offset - if too less is available we read what remains - if (cnt < n) { - n = cnt; - } +// Read n items without removing it from the FIFO, correct read pointer if overflowed +uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) { + ff_lock(f->mutex_rd); + const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_INC_ADDR_RW8); + ff_unlock(f->mutex_rd); + return ret; +} - uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); +// Read n items from fifo with access mode +uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_access_mode_t access_mode) { + ff_lock(f->mutex_rd); - // Peek data - _ff_pull_n(f, p_buffer, n, rd_ptr, copy_mode); + // Peek the data: f->rd_idx might get modified in case of an overflow so we can not use a local variable + n = tu_fifo_peek_n_access_mode(f, buffer, n, f->wr_idx, f->rd_idx, access_mode); + f->rd_idx = advance_index(f->depth, f->rd_idx, n); + ff_unlock(f->mutex_rd); return n; } -static uint16_t _tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n, tu_fifo_copy_mode_t copy_mode) { +// Write n items to fifo with access mode +uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, tu_fifo_access_mode_t access_mode) { if (n == 0) { return 0; } - _ff_lock(f->mutex_wr); + ff_lock(f->mutex_wr); uint16_t wr_idx = f->wr_idx; uint16_t rd_idx = f->rd_idx; const uint8_t *buf8 = (const uint8_t *)data; - TU_LOG( - TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", rd_idx, wr_idx, - _ff_count(f->depth, wr_idx, rd_idx), _ff_remaining(f->depth, wr_idx, rd_idx), n); + TU_LOG(TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", rd_idx, wr_idx, + tu_ff_overflow_count(f->depth, wr_idx, rd_idx), tu_ff_remaining_local(f->depth, wr_idx, rd_idx), n); if (!f->overwritable) { // limit up to full - const uint16_t remain = _ff_remaining(f->depth, wr_idx, rd_idx); + const uint16_t remain = tu_ff_remaining_local(f->depth, wr_idx, rd_idx); n = tu_min16(n, remain); } else { // In over-writable mode, fifo_write() is allowed even when fifo is full. In such case, - // oldest data in fifo i.e at read pointer data will be overwritten - // Note: we can modify read buffer contents but we must not modify the read index itself within a write function! - // Since it would end up in a race condition with read functions! + // oldest data in fifo i.e. at read pointer data will be overwritten + // Note: we can modify read buffer contents however we must not modify the read index itself within a write + // function! Since it would end up in a race condition with read functions! if (n >= f->depth) { // Only copy last part - if (copy_mode == TU_FIFO_COPY_INC) { + if (access_mode == TU_FIFO_INC_ADDR_RW8) { buf8 += (n - f->depth) * f->item_size; } else { // TODO should read from hw fifo to discard data, however reading an odd number could @@ -483,7 +416,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n, tu_ // We start writing at the read pointer's position since we fill the whole buffer wr_idx = rd_idx; } else { - const uint16_t overflowable_count = _ff_count(f->depth, wr_idx, rd_idx); + const uint16_t overflowable_count = tu_ff_overflow_count(f->depth, wr_idx, rd_idx); if (overflowable_count + n >= 2 * f->depth) { // Double overflowed // Index is bigger than the allowed range [0,2*depth) @@ -504,358 +437,97 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n, tu_ } if (n) { - uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); + const uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_ptr = %u", n, wr_ptr); - _ff_push_n(f, buf8, n, wr_ptr, copy_mode); + ff_push_n(f, buf8, n, wr_ptr, access_mode); f->wr_idx = advance_index(f->depth, wr_idx, n); TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx); } - _ff_unlock(f->mutex_wr); + ff_unlock(f->mutex_wr); return n; } -static uint16_t _tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_copy_mode_t copy_mode) { - _ff_lock(f->mutex_rd); +uint16_t tu_fifo_discard_n(tu_fifo_t *f, uint16_t n) { + const uint16_t count = tu_min16(n, tu_fifo_count(f)); // limit to available count + ff_lock(f->mutex_rd); + f->rd_idx = advance_index(f->depth, f->rd_idx, count); + ff_unlock(f->mutex_rd); - // Peek the data - // f->rd_idx might get modified in case of an overflow so we can not use a local variable - n = _tu_fifo_peek_n(f, buffer, n, f->wr_idx, f->rd_idx, copy_mode); - - // Advance read pointer - f->rd_idx = advance_index(f->depth, f->rd_idx, n); - - _ff_unlock(f->mutex_rd); - return n; + return count; } //--------------------------------------------------------------------+ -// Application API +// One API //--------------------------------------------------------------------+ -/******************************************************************************/ -/*! - @brief Get number of items in FIFO. - - As this function only reads the read and write pointers once, this function is - reentrant and thus thread and ISR save without any mutexes. In case an - overflow occurred, this function return f.depth at maximum. Overflows are - checked and corrected for in the read functions! - - @param[in] f - Pointer to the FIFO buffer to manipulate - - @returns Number of items in FIFO - */ -/******************************************************************************/ -uint16_t tu_fifo_count(const tu_fifo_t *f) { - return tu_min16(_ff_count(f->depth, f->wr_idx, f->rd_idx), f->depth); -} - -/******************************************************************************/ -/*! - @brief Check if FIFO is full. - - As this function only reads the read and write pointers once, this function is - reentrant and thus thread and ISR save without any mutexes. - - @param[in] f - Pointer to the FIFO buffer to manipulate - - @returns Number of items in FIFO - */ -/******************************************************************************/ -bool tu_fifo_full(const tu_fifo_t *f) { - return _ff_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth; -} - -/******************************************************************************/ -/*! - @brief Get remaining space in FIFO. - - As this function only reads the read and write pointers once, this function is - reentrant and thus thread and ISR save without any mutexes. - - @param[in] f - Pointer to the FIFO buffer to manipulate - - @returns Number of items in FIFO - */ -/******************************************************************************/ -uint16_t tu_fifo_remaining(const tu_fifo_t *f) { - return _ff_remaining(f->depth, f->wr_idx, f->rd_idx); -} - -/******************************************************************************/ -/*! - @brief Check if overflow happened. - - BE AWARE - THIS FUNCTION MIGHT NOT GIVE A CORRECT ANSWERE IN CASE WRITE POINTER "OVERFLOWS" - Only one overflow is allowed for this function to work e.g. if depth = 100, you must not - write more than 2*depth-1 items in one rush without updating write pointer. Otherwise - write pointer wraps and your pointer states are messed up. This can only happen if you - use DMAs, write functions do not allow such an error. Avoid such nasty things! - - All reading functions (read, peek) check for overflows and correct read pointer on their own such - that latest items are read. - If required (e.g. for DMA use) you can also correct the read pointer by - tu_fifo_correct_read_pointer(). +// peek() using local write/read index, correct read index if overflowed +// Be careful, caller must not lock mutex, since this Will also try to lock mutex +static bool ff_peek_local(tu_fifo_t *f, void *buf, uint16_t wr_idx, uint16_t rd_idx) { + const uint16_t ovf_count = tu_ff_overflow_count(f->depth, wr_idx, rd_idx); + if (ovf_count == 0) { + return false; // nothing to peek + } - @param[in] f - Pointer to the FIFO buffer to manipulate + // Correct read index if overflow + if (ovf_count > f->depth) { + ff_lock(f->mutex_rd); + rd_idx = correct_read_index(f, wr_idx); + ff_unlock(f->mutex_rd); + } - @returns True if overflow happened - */ -/******************************************************************************/ -bool tu_fifo_overflowed(const tu_fifo_t *f) { - return _ff_count(f->depth, f->wr_idx, f->rd_idx) > f->depth; -} + const uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); + memcpy(buf, f->buffer + (rd_ptr * f->item_size), f->item_size); -// Only use in case tu_fifo_overflow() returned true! -void tu_fifo_correct_read_pointer(tu_fifo_t *f) { - _ff_lock(f->mutex_rd); - _ff_correct_read_index(f, f->wr_idx); - _ff_unlock(f->mutex_rd); + return true; } -/******************************************************************************/ -/*! - @brief Read one element out of the buffer. - - This function will return the element located at the array index of the - read pointer, and then increment the read pointer index. - This function checks for an overflow and corrects read pointer if required. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] buffer - Pointer to the place holder for data read from the buffer - - @returns TRUE if the queue is not empty - */ -/******************************************************************************/ +// Read one element out of the buffer, correct read index if overflowed bool tu_fifo_read(tu_fifo_t *f, void *buffer) { - _ff_lock(f->mutex_rd); - // Peek the data // f->rd_idx might get modified in case of an overflow so we can not use a local variable - bool ret = _tu_fifo_peek(f, buffer, f->wr_idx, f->rd_idx); - - // Advance pointer - f->rd_idx = advance_index(f->depth, f->rd_idx, ret); + const bool ret = ff_peek_local(f, buffer, f->wr_idx, f->rd_idx); + if (ret) { + ff_lock(f->mutex_rd); + f->rd_idx = advance_index(f->depth, f->rd_idx, 1); + ff_unlock(f->mutex_rd); + } - _ff_unlock(f->mutex_rd); return ret; } -/******************************************************************************/ -/*! - @brief This function will read n elements from the array index specified by - the read pointer and increment the read index. - This function checks for an overflow and corrects read pointer if required. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] buffer - The pointer to data location - @param[in] n - Number of element that buffer can afford - - @returns number of items read from the FIFO - */ -/******************************************************************************/ -uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n) { - return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_INC); -} - -#ifdef TUP_MEM_CONST_ADDR -/******************************************************************************/ -/*! - @brief This function will read n elements from the array index specified by - the read pointer and increment the read index. - This function checks for an overflow and corrects read pointer if required. - The dest address will not be incremented which is useful for writing to registers. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] buffer - The pointer to data location - @param[in] n - Number of element that buffer can afford - - @returns number of items read from the FIFO - */ -/******************************************************************************/ -uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t *f, void *buffer, uint16_t n) { - return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_CST_FULL_WORDS); -} -#endif - -/******************************************************************************/ -/*! - @brief Read one item without removing it from the FIFO. - This function checks for an overflow and corrects read pointer if required. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] p_buffer - Pointer to the place holder for data read from the buffer - - @returns TRUE if the queue is not empty - */ -/******************************************************************************/ +// Read one item without removing it from the FIFO, correct read index if overflowed bool tu_fifo_peek(tu_fifo_t *f, void *p_buffer) { - _ff_lock(f->mutex_rd); - bool ret = _tu_fifo_peek(f, p_buffer, f->wr_idx, f->rd_idx); - _ff_unlock(f->mutex_rd); - return ret; + return ff_peek_local(f, p_buffer, f->wr_idx, f->rd_idx); } -/******************************************************************************/ -/*! - @brief Read n items without removing it from the FIFO - This function checks for an overflow and corrects read pointer if required. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] p_buffer - Pointer to the place holder for data read from the buffer - @param[in] n - Number of items to peek - - @returns Number of bytes written to p_buffer - */ -/******************************************************************************/ -uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) { - _ff_lock(f->mutex_rd); - uint16_t ret = _tu_fifo_peek_n(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_COPY_INC); - _ff_unlock(f->mutex_rd); - return ret; -} - -/******************************************************************************/ -/*! - @brief Write one element into the buffer. - - This function will write one element into the array index specified by - the write pointer and increment the write index. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] data - The byte to add to the FIFO - - @returns TRUE if the data was written to the FIFO (overwrittable - FIFO will always return TRUE) - */ -/******************************************************************************/ +// Write one element into the buffer bool tu_fifo_write(tu_fifo_t *f, const void *data) { - _ff_lock(f->mutex_wr); + bool ret; + ff_lock(f->mutex_wr); - bool ret; const uint16_t wr_idx = f->wr_idx; if (tu_fifo_full(f) && !f->overwritable) { ret = false; } else { - uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); - _ff_push(f, data, wr_ptr); + const uint16_t wr_ptr = idx2ptr(f->depth, wr_idx); + memcpy(f->buffer + (wr_ptr * f->item_size), data, f->item_size); f->wr_idx = advance_index(f->depth, wr_idx, 1); ret = true; } - _ff_unlock(f->mutex_wr); + ff_unlock(f->mutex_wr); return ret; } -/******************************************************************************/ -/*! - @brief This function will write n elements into the array index specified by - the write pointer and increment the write index. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] data - The pointer to data to add to the FIFO - @param[in] count - Number of element - @return Number of written elements - */ -/******************************************************************************/ -uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n) { - return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_INC); -} - -#ifdef TUP_MEM_CONST_ADDR -/******************************************************************************/ -/*! - @brief This function will write n elements into the array index specified by - the write pointer and increment the write index. The source address will - not be incremented which is useful for reading from registers. - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] data - The pointer to data to add to the FIFO - @param[in] count - Number of element - @return Number of written elements - */ -/******************************************************************************/ -uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t *f, const void *data, uint16_t n) { - return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_CST_FULL_WORDS); -} -#endif - -/******************************************************************************/ -/*! - @brief Clear the fifo read and write pointers - - @param[in] f - Pointer to the FIFO buffer to manipulate - */ -/******************************************************************************/ -bool tu_fifo_clear(tu_fifo_t *f) { - _ff_lock(f->mutex_wr); - _ff_lock(f->mutex_rd); - - f->rd_idx = 0; - f->wr_idx = 0; - - _ff_unlock(f->mutex_wr); - _ff_unlock(f->mutex_rd); - return true; -} - -/******************************************************************************/ -/*! - @brief Change the fifo mode to overwritable or not overwritable - - @param[in] f - Pointer to the FIFO buffer to manipulate - @param[in] overwritable - Overwritable mode the fifo is set to - */ -/******************************************************************************/ -bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) { - if (f->overwritable == overwritable) { - return true; - } - - _ff_lock(f->mutex_wr); - _ff_lock(f->mutex_rd); - - f->overwritable = overwritable; - - _ff_unlock(f->mutex_wr); - _ff_unlock(f->mutex_rd); - - return true; -} +//--------------------------------------------------------------------+ +// Index API +//--------------------------------------------------------------------+ /******************************************************************************/ /*! @@ -877,6 +549,13 @@ void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n) { f->wr_idx = advance_index(f->depth, f->wr_idx, n); } +// Correct the read index in case tu_fifo_overflow() returned true! +void tu_fifo_correct_read_pointer(tu_fifo_t *f) { + ff_lock(f->mutex_rd); + correct_read_index(f, f->wr_idx); + ff_unlock(f->mutex_rd); +} + /******************************************************************************/ /*! @brief Advance read pointer - intended to be used in combination with DMA. @@ -917,23 +596,23 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { uint16_t wr_idx = f->wr_idx; uint16_t rd_idx = f->rd_idx; - uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx); + uint16_t cnt = tu_ff_overflow_count(f->depth, wr_idx, rd_idx); // Check overflow and correct if required - may happen in case a DMA wrote too fast if (cnt > f->depth) { - _ff_lock(f->mutex_rd); - rd_idx = _ff_correct_read_index(f, wr_idx); - _ff_unlock(f->mutex_rd); + ff_lock(f->mutex_rd); + rd_idx = correct_read_index(f, wr_idx); + ff_unlock(f->mutex_rd); cnt = f->depth; } // Check if fifo is empty if (cnt == 0) { - info->len_lin = 0; - info->len_wrap = 0; - info->ptr_lin = NULL; - info->ptr_wrap = NULL; + info->linear.len = 0; + info->wrapped.len = 0; + info->linear.ptr = NULL; + info->wrapped.ptr = NULL; return; } @@ -942,20 +621,20 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); // Copy pointer to buffer to start reading from - info->ptr_lin = &f->buffer[rd_ptr]; + info->linear.ptr = &f->buffer[rd_ptr]; // Check if there is a wrap around necessary if (wr_ptr > rd_ptr) { // Non wrapping case - info->len_lin = cnt; + info->linear.len = cnt; - info->len_wrap = 0; - info->ptr_wrap = NULL; + info->wrapped.len = 0; + info->wrapped.ptr = NULL; } else { - info->len_lin = f->depth - rd_ptr; // Also the case if FIFO was full + info->linear.len = f->depth - rd_ptr; // Also the case if FIFO was full - info->len_wrap = cnt - info->len_lin; - info->ptr_wrap = f->buffer; + info->wrapped.len = cnt - info->linear.len; + info->wrapped.ptr = f->buffer; } } @@ -977,13 +656,13 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { uint16_t wr_idx = f->wr_idx; uint16_t rd_idx = f->rd_idx; - uint16_t remain = _ff_remaining(f->depth, wr_idx, rd_idx); + uint16_t remain = tu_ff_remaining_local(f->depth, wr_idx, rd_idx); if (remain == 0) { - info->len_lin = 0; - info->len_wrap = 0; - info->ptr_lin = NULL; - info->ptr_wrap = NULL; + info->linear.len = 0; + info->wrapped.len = 0; + info->linear.ptr = NULL; + info->wrapped.ptr = NULL; return; } @@ -992,16 +671,16 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) { uint16_t rd_ptr = idx2ptr(f->depth, rd_idx); // Copy pointer to buffer to start writing to - info->ptr_lin = &f->buffer[wr_ptr]; + info->linear.ptr = &f->buffer[wr_ptr]; if (wr_ptr < rd_ptr) { // Non wrapping case - info->len_lin = rd_ptr - wr_ptr; - info->len_wrap = 0; - info->ptr_wrap = NULL; + info->linear.len = rd_ptr - wr_ptr; + info->wrapped.len = 0; + info->wrapped.ptr = NULL; } else { - info->len_lin = f->depth - wr_ptr; - info->len_wrap = remain - info->len_lin; // Remaining length - n already was limited to remain or FIFO depth - info->ptr_wrap = f->buffer; // Always start of buffer + info->linear.len = f->depth - wr_ptr; + info->wrapped.len = remain - info->linear.len; // Remaining length - n already was limited to remain or FIFO depth + info->wrapped.ptr = f->buffer; // Always start of buffer } } diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index 9d8b864e9..42f154bca 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -48,8 +48,13 @@ extern "C" { // for OS None, we don't get preempted #define CFG_FIFO_MUTEX OSAL_MUTEX_REQUIRED -/* Write/Read index is always in the range of: - * 0 .. 2*depth-1 +#if CFG_TUD_EDPT_DEDICATED_HWFIFO || CFG_TUH_EDPT_DEDICATED_HWFIFO + #define CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32 +#endif + +/* Write/Read "pointer" is in the range of: 0 .. depth - 1, and is used to get the fifo data. + * Write/Read "index" is always in the range of: 0 .. 2*depth-1 + * * The extra window allow us to determine the fifo state of empty or full with only 2 indices * Following are examples with depth = 3 * @@ -123,10 +128,10 @@ typedef struct { } tu_fifo_t; typedef struct { - uint16_t len_lin ; ///< linear length in item size - uint16_t len_wrap ; ///< wrapped length in item size - void * ptr_lin ; ///< linear part start pointer - void * ptr_wrap ; ///< wrapped part start pointer + struct { + uint16_t len; // length + uint8_t *ptr; // buffer pointer + } linear, wrapped; } tu_fifo_buffer_info_t; #define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \ @@ -141,9 +146,19 @@ typedef struct { uint8_t _name##_buf[_depth*sizeof(_type)]; \ tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _type, _overwritable) +// Write modes intended to allow special read and write functions to be able to +// copy data to and from USB hardware FIFOs as needed for e.g. STM32s and others +typedef enum { + TU_FIFO_INC_ADDR_RW8, // increased address read/write by bytes - normal (default) mode + TU_FIFO_FIXED_ADDR_RW32, // fixed address read/write by 4 bytes (word). Used for STM32 access into USB hardware FIFO +} tu_fifo_access_mode_t; + +//--------------------------------------------------------------------+ +// Setup API +//--------------------------------------------------------------------+ +bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_size, bool overwritable); bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable); bool tu_fifo_clear(tu_fifo_t *f); -bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable); #if OSAL_MUTEX_REQUIRED TU_ATTR_ALWAYS_INLINE static inline @@ -155,45 +170,101 @@ void tu_fifo_config_mutex(tu_fifo_t *f, osal_mutex_t wr_mutex, osal_mutex_t rd_m #define tu_fifo_config_mutex(_f, _wr_mutex, _rd_mutex) #endif -bool tu_fifo_write(tu_fifo_t *f, void const *data); -uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n); +//--------------------------------------------------------------------+ +// Index API +//--------------------------------------------------------------------+ +void tu_fifo_correct_read_pointer(tu_fifo_t *f); -bool tu_fifo_read(tu_fifo_t *f, void *buffer); -uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n); +// Pointer modifications intended to be used in combinations with DMAs. +// USE WITH CARE - NO SAFETY CHECKS CONDUCTED HERE! NOT MUTEX PROTECTED! +void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n); +void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n); -#ifdef TUP_MEM_CONST_ADDR -uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t *f, const void *data, uint16_t n); -uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t *f, void *buffer, uint16_t n); -#endif +// If you want to read/write from/to the FIFO by use of a DMA, you may need to conduct two copies +// to handle a possible wrapping part. These functions deliver a pointer to start +// reading/writing from/to and a valid linear length along which no wrap occurs. +void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info); +void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info); +//--------------------------------------------------------------------+ +// Peek API +// peek() will correct/re-index read pointer in case of an overflowed fifo to form a full fifo +//--------------------------------------------------------------------+ +uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, + tu_fifo_access_mode_t access_mode); bool tu_fifo_peek(tu_fifo_t *f, void *p_buffer); uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n); -uint16_t tu_fifo_count(const tu_fifo_t *f); -uint16_t tu_fifo_remaining(const tu_fifo_t *f); -bool tu_fifo_full(const tu_fifo_t *f); -bool tu_fifo_overflowed(const tu_fifo_t *f); +//--------------------------------------------------------------------+ +// Read API +// peek() + advance read index +//--------------------------------------------------------------------+ +uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_access_mode_t access_mode); +bool tu_fifo_read(tu_fifo_t *f, void *buffer); +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n) { + return tu_fifo_read_n_access_mode(f, buffer, n, TU_FIFO_INC_ADDR_RW8); +} -TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_empty(const tu_fifo_t *f) { - return f->wr_idx == f->rd_idx; +// discard first n items from fifo i.e advance read pointer by n with mutex +// return number of discarded items +uint16_t tu_fifo_discard_n(tu_fifo_t *f, uint16_t n); + +//--------------------------------------------------------------------+ +// Write API +//--------------------------------------------------------------------+ +uint16_t tu_fifo_write_n_access_mode(tu_fifo_t *f, const void *data, uint16_t n, tu_fifo_access_mode_t access_mode); +bool tu_fifo_write(tu_fifo_t *f, const void *data); +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n) { + return tu_fifo_write_n_access_mode(f, data, n, TU_FIFO_INC_ADDR_RW8); } +//--------------------------------------------------------------------+ +// Internal Helper Local +// work on local copies of read/write indices in order to only access them once for re-entrancy +//--------------------------------------------------------------------+ +// return overflowable count (index difference), which can be used to determine both fifo count and an overflow state +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_ff_overflow_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) { + if (wr_idx >= rd_idx) { + return (uint16_t)(wr_idx - rd_idx); + } else { + return (uint16_t)(2 * depth - (rd_idx - wr_idx)); + } +} + +// return remaining slot in fifo +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_ff_remaining_local(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) { + const uint16_t ovf_count = tu_ff_overflow_count(depth, wr_idx, rd_idx); + return (depth > ovf_count) ? (depth - ovf_count) : 0; +} + +//--------------------------------------------------------------------+ +// State API +// Following functions are reentrant since they only access read/write indices once, therefore can be used in thread and +// ISRs context without the need of mutexes +//--------------------------------------------------------------------+ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_depth(const tu_fifo_t *f) { return f->depth; } -void tu_fifo_correct_read_pointer(tu_fifo_t *f); +TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_empty(const tu_fifo_t *f) { + const uint16_t wr_idx = f->wr_idx; + const uint16_t rd_idx = f->rd_idx; + return wr_idx == rd_idx; +} -// Pointer modifications intended to be used in combinations with DMAs. -// USE WITH CARE - NO SAFETY CHECKS CONDUCTED HERE! NOT MUTEX PROTECTED! -void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n); -void tu_fifo_advance_read_pointer (tu_fifo_t *f, uint16_t n); +// return number of items in fifo, capped to fifo's depth +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_count(const tu_fifo_t *f) { + return tu_min16(tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx), f->depth); +} -// If you want to read/write from/to the FIFO by use of a DMA, you may need to conduct two copies -// to handle a possible wrapping part. These functions deliver a pointer to start -// reading/writing from/to and a valid linear length along which no wrap occurs. -void tu_fifo_get_read_info (tu_fifo_t *f, tu_fifo_buffer_info_t *info); -void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info); +// check if fifo is full +TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_full(const tu_fifo_t *f) { + return tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth; +} + +TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_remaining(const tu_fifo_t *f) { + return tu_ff_remaining_local(f->depth, f->wr_idx, f->rd_idx); +} #ifdef __cplusplus } diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index 002cd3a0e..1e773bf96 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -24,8 +24,7 @@ * This file is part of the TinyUSB stack. */ -#ifndef TUSB_MCU_H_ -#define TUSB_MCU_H_ +#pragma once //--------------------------------------------------------------------+ // Port/Platform Specific @@ -524,6 +523,7 @@ //--------------------------------------------------------------------+ #elif TU_CHECK_MCU(OPT_MCU_F1C100S) #define TUP_DCD_ENDPOINT_MAX 4 + #define TUP_DCD_EDPT_CLOSE_API //--------------------------------------------------------------------+ // WCH @@ -697,9 +697,3 @@ #ifndef TUP_DCD_EDPT_CLOSE_API #define TUP_DCD_EDPT_ISO_ALLOC #endif - -#if defined(TUP_USBIP_DWC2) // && CFG_TUD_DWC2_DMA_ENABLE == 0 - #define TUP_MEM_CONST_ADDR -#endif - -#endif diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h index be1264a71..8643bb020 100644 --- a/src/common/tusb_private.h +++ b/src/common/tusb_private.h @@ -60,7 +60,7 @@ typedef struct { uint8_t ep_addr; uint16_t ep_bufsize; - uint8_t* ep_buf; // TODO xfer_fifo can skip this buffer + uint8_t *ep_buf; // set to NULL to use xfer_fifo when CFG_TUD_EDPT_DEDICATED_HWFIFO = 1 tu_fifo_t ff; // mutex: read if rx, otherwise write @@ -98,7 +98,7 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove // Deinit an endpoint stream bool tu_edpt_stream_deinit(tu_edpt_stream_t* s); -// Open an stream for an endpoint +// Open an endpoint stream TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_open(tu_edpt_stream_t* s, tusb_desc_endpoint_t const *desc_ep) { s->ep_addr = desc_ep->bEndpointAddress; s->is_mps512 = tu_edpt_packet_size(desc_ep) == 512; @@ -150,7 +150,7 @@ uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s); // Complete read transfer by writing EP -> FIFO. Must be called in the transfer complete callback TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) { - if (0u != tu_fifo_depth(&s->ff)) { + if (0u != tu_fifo_depth(&s->ff) && s->ep_buf != NULL) { tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes); } } @@ -172,6 +172,10 @@ TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_peek(tu_edpt_stream_t *s return tu_fifo_peek(&s->ff, ch); } +TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_edpt_stream_discard(tu_edpt_stream_t *s, uint32_t len) { + return (uint32_t)tu_fifo_discard_n(&s->ff, (uint16_t)len); +} + #ifdef __cplusplus } #endif diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 73c816e3e..d473e53e6 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -323,6 +323,11 @@ typedef struct { tusb_speed_t speed; } tusb_rhport_init_t; +typedef struct { + uint16_t len; + uint8_t *buffer; +} tusb_buffer_t; + //--------------------------------------------------------------------+ // USB Descriptors //--------------------------------------------------------------------+ diff --git a/src/device/usbd.c b/src/device/usbd.c index 044fd7072..4876b8c1e 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -140,7 +140,7 @@ typedef struct { }usbd_device_t; -tu_static usbd_device_t _usbd_dev; +static usbd_device_t _usbd_dev; static volatile uint8_t _usbd_queued_setup; //--------------------------------------------------------------------+ @@ -153,8 +153,8 @@ static volatile uint8_t _usbd_queued_setup; #endif // Built-in class drivers -tu_static usbd_class_driver_t const _usbd_driver[] = { - #if CFG_TUD_CDC +static const usbd_class_driver_t _usbd_driver[] = { + #if CFG_TUD_CDC { .name = DRIVER_NAME("CDC"), .init = cdcd_init, @@ -340,10 +340,10 @@ tu_static usbd_class_driver_t const _usbd_driver[] = { enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(_usbd_driver) }; // Additional class drivers implemented by application -tu_static usbd_class_driver_t const * _app_driver = NULL; -tu_static uint8_t _app_driver_count = 0; +static const usbd_class_driver_t *_app_driver = NULL; +static uint8_t _app_driver_count = 0; -#define TOTAL_DRIVER_COUNT ((uint8_t) (_app_driver_count + BUILTIN_DRIVER_COUNT)) + #define TOTAL_DRIVER_COUNT ((uint8_t) (_app_driver_count + BUILTIN_DRIVER_COUNT)) // virtually joins built-in and application drivers together. // Application is positioned first to allow overwriting built-in ones. @@ -365,8 +365,10 @@ TU_ATTR_ALWAYS_INLINE static inline usbd_class_driver_t const * get_driver(uint8 //--------------------------------------------------------------------+ // DCD Event //--------------------------------------------------------------------+ -enum { RHPORT_INVALID = 0xFFu }; -tu_static uint8_t _usbd_rhport = RHPORT_INVALID; +enum { + RHPORT_INVALID = 0xFFu +}; +static uint8_t _usbd_rhport = RHPORT_INVALID; static OSAL_SPINLOCK_DEF(_usbd_spin, usbd_int_set); @@ -433,7 +435,7 @@ TU_ATTR_WEAK bool dcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg // Debug //--------------------------------------------------------------------+ #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL -tu_static char const* const _usbd_event_str[DCD_EVENT_COUNT] = { +static char const *const _usbd_event_str[DCD_EVENT_COUNT] = { "Invalid", "Bus Reset", "Unplugged", @@ -1481,6 +1483,7 @@ bool usbd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t t // success message. If total_bytes is too big, the FIFO will copy only what is available // into the USB buffer! bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_t total_bytes, bool is_isr) { + #if CFG_TUD_EDPT_DEDICATED_HWFIFO rhport = _usbd_rhport; uint8_t const epnum = tu_edpt_number(ep_addr); @@ -1488,7 +1491,7 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_ TU_LOG_USBD(" Queue ISO EP %02X with %u bytes ... ", ep_addr, total_bytes); - // Attempt to transfer on a busy endpoint, sound like an race condition ! + // Attempt to transfer on a busy endpoint, sound like a race condition ! TU_ASSERT(_usbd_dev.ep_status[epnum][dir].busy == 0); // Set busy first since the actual transfer can be complete before dcd_edpt_xfer() could return @@ -1506,6 +1509,14 @@ bool usbd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_ TU_BREAKPOINT(); return false; } + #else + (void)rhport; + (void)ep_addr; + (void)ff; + (void)total_bytes; + (void)is_isr; + return false; + #endif } bool usbd_edpt_busy(uint8_t rhport, uint8_t ep_addr) { diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c index c6d405e98..4a5e5c91f 100644 --- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c +++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c @@ -545,19 +545,19 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_ tu_fifo_get_write_info(ff, &fifo_info); } - if ( fifo_info.len_lin >= total_bytes ) + if ( fifo_info.linear.len >= total_bytes ) { // Linear length is enough for this transfer - qtd_init(p_qtd, fifo_info.ptr_lin, total_bytes); + qtd_init(p_qtd, fifo_info.linear.ptr, total_bytes); } else { // linear part is not enough // prepare TD up to linear length - qtd_init(p_qtd, fifo_info.ptr_lin, fifo_info.len_lin); + qtd_init(p_qtd, fifo_info.linear.ptr, fifo_info.linear.len); - if ( !tu_offset4k((uint32_t) fifo_info.ptr_wrap) && !tu_offset4k(tu_fifo_depth(ff)) ) + if ( !tu_offset4k((uint32_t) fifo_info.wrapped.ptr) && !tu_offset4k(tu_fifo_depth(ff)) ) { // If buffer is aligned to 4K & buffer size is multiple of 4K // We can make use of buffer page array to also combine the linear + wrapped length @@ -568,7 +568,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_ // pick up buffer array where linear ends if (p_qtd->buffer[i] == 0) { - p_qtd->buffer[i] = (uint32_t) fifo_info.ptr_wrap + 4096 * page; + p_qtd->buffer[i] = (uint32_t) fifo_info.wrapped.ptr + 4096 * page; page++; } } diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c index 1e4ec0015..ad20d64bd 100644 --- a/src/portable/mentor/musb/dcd_musb.c +++ b/src/portable/mentor/musb/dcd_musb.c @@ -221,12 +221,12 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne tu_fifo_buffer_info_t info; ops[dir].tu_fifo_get_info(f, &info); unsigned total_len = len; - len = TU_MIN(total_len, info.len_lin); - ops[dir].pipe_read_write(info.ptr_lin, fifo, len); + len = TU_MIN(total_len, info.linear.len); + ops[dir].pipe_read_write(info.linear.ptr, fifo, len); unsigned rem = total_len - len; if (rem) { - len = TU_MIN(rem, info.len_wrap); - ops[dir].pipe_read_write(info.ptr_wrap, fifo, len); + len = TU_MIN(rem, info.wrapped.len); + ops[dir].pipe_read_write(info.wrapped.ptr, fifo, len); rem -= len; } ops[dir].tu_fifo_advance(f, total_len - rem); diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c index 149eee794..1faac2aa8 100644 --- a/src/portable/microchip/samg/dcd_samg.c +++ b/src/portable/microchip/samg/dcd_samg.c @@ -436,9 +436,8 @@ void dcd_int_handler(uint8_t rhport) { // write to EP fifo #if 0 // TODO support dcd_edpt_xfer_fifo - if (xfer->ff) - { - tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *) &UDP->UDP_FDR[epnum], xact_len); + if (xfer->ff) { + tu_fifo_read_n_access_mode(xfer->ff, (void *) &UDP->UDP_FDR[epnum], xact_len, TU_FIFO_FIXED_ADDR_RW32); } else #endif @@ -471,9 +470,8 @@ void dcd_int_handler(uint8_t rhport) // Read from EP fifo #if 0 // TODO support dcd_edpt_xfer_fifo API - if (xfer->ff) - { - tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void *) &UDP->UDP_FDR[epnum], xact_len); + if (xfer->ff) { + tu_fifo_write_n_access_mode(xfer->ff, (const void *) &UDP->UDP_FDR[epnum], xact_len, TU_FIFO_FIXED_ADDR_RW32); } else #endif diff --git a/src/portable/microchip/samx7x/dcd_samx7x.c b/src/portable/microchip/samx7x/dcd_samx7x.c index 4d54f9057..b0a053c01 100644 --- a/src/portable/microchip/samx7x/dcd_samx7x.c +++ b/src/portable/microchip/samx7x/dcd_samx7x.c @@ -697,7 +697,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_ udd_dma_ctrl_wrap |= DEVDMACONTROL_END_TR_IT | DEVDMACONTROL_END_TR_EN; } else { tu_fifo_get_read_info(ff, &info); - if(info.len_wrap == 0) + if(info.wrapped.len == 0) { udd_dma_ctrl_lin |= DEVDMACONTROL_END_B_EN; } @@ -705,18 +705,18 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_ } // Clean invalidate cache of linear part - CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_lin, 4), info.len_lin + 31); + CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.linear.ptr, 4), info.linear.len + 31); - USB_REG->DEVDMA[epnum - 1].DEVDMAADDRESS = (uint32_t)info.ptr_lin; - if (info.len_wrap) + USB_REG->DEVDMA[epnum - 1].DEVDMAADDRESS = (uint32_t)info.linear.ptr; + if (info.wrapped.len) { // Clean invalidate cache of wrapped part - CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.ptr_wrap, 4), info.len_wrap + 31); + CleanInValidateCache((uint32_t*) tu_align((uint32_t) info.wrapped.ptr, 4), info.wrapped.len + 31); dma_desc[epnum - 1].next_desc = 0; - dma_desc[epnum - 1].buff_addr = (uint32_t)info.ptr_wrap; + dma_desc[epnum - 1].buff_addr = (uint32_t)info.wrapped.ptr; dma_desc[epnum - 1].chnl_ctrl = - udd_dma_ctrl_wrap | (info.len_wrap << DEVDMACONTROL_BUFF_LENGTH_Pos); + udd_dma_ctrl_wrap | (info.wrapped.len << DEVDMACONTROL_BUFF_LENGTH_Pos); // Clean cache of wrapped DMA descriptor CleanInValidateCache((uint32_t*)&dma_desc[epnum - 1], sizeof(dma_desc_t)); @@ -725,7 +725,7 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t * ff, uint16_ } else { udd_dma_ctrl_lin |= DEVDMACONTROL_END_BUFFIT; } - udd_dma_ctrl_lin |= (info.len_lin << DEVDMACONTROL_BUFF_LENGTH_Pos); + udd_dma_ctrl_lin |= (info.linear.len << DEVDMACONTROL_BUFF_LENGTH_Pos); // Disable IRQs to have a short sequence // between read of EOT_STA and DMA enable uint32_t irq_state = __get_PRIMASK(); diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index 82b6db5fd..8a41c4790 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -59,21 +59,26 @@ /* Try to detect nrfx version if not configured with CFG_TUD_NRF_NRFX_VERSION * nrfx v1 and v2 are concurrently developed. There is no NRFX_VERSION only MDK VERSION which is as follows: * - v3.0.0: 8.53.1 (conflict with v2.11.0), v3.1.0: 8.55.0 ... - * - v2.11.0: 8.53.1, v2.6.0: 8.44.1, v2.5.0: 8.40.2, v2.4.0: 8.37.0, v2.3.0: 8.35.0, v2.2.0: 8.32.1, v2.1.0: 8.30.2, v2.0.0: 8.29.0 + * - v2.11.0: 8.53.1, v2.6.0: 8.44.1, v2.5.0: 8.40.2, v2.4.0: 8.37.0, v2.3.0: 8.35.0, v2.2.0: 8.32.1, v2.1.0: 8.30.2, + * v2.0.0: 8.29.0 * - v1.9.0: 8.40.3, v1.8.6: 8.35.0 (conflict with v2.3.0), v1.8.5: 8.32.3, v1.8.4: 8.32.1 (conflict with v2.2.0), * v1.8.2: 8.32.1 (conflict with v2.2.0), v1.8.1: 8.27.1 * Therefore the check for v1 would be: * - MDK < 8.29.0 (v2.0), MDK == 8.32.3, 8.40.3 * - in case of conflict User of those version must upgrade to other 1.x version or set CFG_TUD_NRF_NRFX_VERSION -*/ + */ #ifndef CFG_TUD_NRF_NRFX_VERSION - #define _MDK_VERSION (10000*MDK_MAJOR_VERSION + 100*MDK_MINOR_VERSION + MDK_MICRO_VERSION) + #define MDK_VERSION (10000 * MDK_MAJOR_VERSION + 100 * MDK_MINOR_VERSION + MDK_MICRO_VERSION) - #if _MDK_VERSION < 82900 || _MDK_VERSION == 83203 || _MDK_VERSION == 84003 + #if MDK_VERSION < 82900 || MDK_VERSION == 83203 || MDK_VERSION == 84003 // nrfx <= 1.8.1, or 1.8.5 or 1.9.0 #define CFG_TUD_NRF_NRFX_VERSION 1 - #else + #elif MDK_VERSION < 85301 #define CFG_TUD_NRF_NRFX_VERSION 2 + #elif MDK_VERSION < 87300 + #define CFG_TUD_NRF_NRFX_VERSION 3 + #else + #define CFG_TUD_NRF_NRFX_VERSION 4 #endif #endif @@ -845,19 +850,19 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_sd_enabled(void) { #endif static bool hfclk_running(void) { -#ifdef SOFTDEVICE_PRESENT - if ( is_sd_enabled() ) { + #ifdef SOFTDEVICE_PRESENT + if (is_sd_enabled()) { uint32_t is_running = 0; - (void) sd_clock_hfclk_is_running(&is_running); + (void)sd_clock_hfclk_is_running(&is_running); return (is_running ? true : false); } -#endif + #endif -#if CFG_TUD_NRF_NRFX_VERSION == 1 + #if CFG_TUD_NRF_NRFX_VERSION == 1 return nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY); -#else - return nrf_clock_hf_is_running(NRF_CLOCK, NRF_CLOCK_HFCLK_HIGH_ACCURACY); -#endif + #else + return nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_HFCLK, NULL); + #endif } static void hfclk_enable(void) { @@ -867,22 +872,24 @@ static void hfclk_enable(void) { #else // already running, nothing to do - if (hfclk_running()) return; + if (hfclk_running()) { + return; + } -#ifdef SOFTDEVICE_PRESENT - if ( is_sd_enabled() ) { + #ifdef SOFTDEVICE_PRESENT + if (is_sd_enabled()) { (void)sd_clock_hfclk_request(); return; } -#endif + #endif -#if CFG_TUD_NRF_NRFX_VERSION == 1 + #if CFG_TUD_NRF_NRFX_VERSION == 1 nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED); nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTART); -#else + #else nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED); nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTART); -#endif + #endif #endif } diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c index 7c80f06d9..91b876718 100644 --- a/src/portable/nuvoton/nuc505/dcd_nuc505.c +++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c @@ -193,9 +193,8 @@ static void dcd_userEP_in_xfer(struct xfer_ctl_t *xfer, USBD_EP_T *ep) /* provided buffers are thankfully 32-bit aligned, allowing most data to be transferred as 32-bit */ #if 0 // TODO support dcd_edpt_xfer_fifo API - if (xfer->ff) - { - tu_fifo_read_n_const_addr_full_words(xfer->ff, (void *) (&ep->EPDAT_BYTE), bytes_now); + if (xfer->ff) { + tu_fifo_read_n_access_mode(xfer->ff, (void *) (&ep->EPDAT_BYTE), bytes_now, TU_FIFO_FIXED_ADDR_RW32); } else #endif @@ -696,15 +695,14 @@ void dcd_int_handler(uint8_t rhport) uint16_t const available_bytes = ep->EPDATCNT & USBD_EPDATCNT_DATCNT_Msk; /* copy the data from the PC to the previously provided buffer */ #if 0 // TODO support dcd_edpt_xfer_fifo API - if (xfer->ff) - { - tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void *) &ep->EPDAT_BYTE, tu_min16(available_bytes, xfer->total_bytes - xfer->out_bytes_so_far)); + if (xfer->ff) { + tu_fifo_write_n_access_mode(xfer->ff, (const void *) &ep->EPDAT_BYTE, tu_min16(available_bytes, xfer->total_bytes - xfer->out_bytes_so_far), TU_FIFO_FIXED_ADDR_RW32); } else #endif { - for (int count = 0; (count < available_bytes) && (xfer->out_bytes_so_far < xfer->total_bytes); count++, xfer->out_bytes_so_far++) - { + for (int count = 0; (count < available_bytes) && (xfer->out_bytes_so_far < xfer->total_bytes); + count++, xfer->out_bytes_so_far++) { *xfer->data_ptr++ = ep->EPDAT_BYTE; } } diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c index 7caf5d68a..786b8d980 100644 --- a/src/portable/renesas/rusb2/dcd_rusb2.c +++ b/src/portable/renesas/rusb2/dcd_rusb2.c @@ -213,13 +213,13 @@ static void pipe_write_packet_ff(rusb2_reg_t * rusb, tu_fifo_t *f, volatile void tu_fifo_buffer_info_t info; tu_fifo_get_read_info(f, &info); - uint16_t count = tu_min16(total_len, info.len_lin); - pipe_write_packet(rusb, info.ptr_lin, fifo, count); + uint16_t count = tu_min16(total_len, info.linear.len); + pipe_write_packet(rusb, info.linear.ptr, fifo, count); uint16_t rem = total_len - count; if (rem) { - rem = tu_min16(rem, info.len_wrap); - pipe_write_packet(rusb, info.ptr_wrap, fifo, rem); + rem = tu_min16(rem, info.wrapped.len); + pipe_write_packet(rusb, info.wrapped.ptr, fifo, rem); count += rem; } @@ -231,13 +231,13 @@ static void pipe_read_packet_ff(rusb2_reg_t * rusb, tu_fifo_t *f, volatile void tu_fifo_buffer_info_t info; tu_fifo_get_write_info(f, &info); - uint16_t count = tu_min16(total_len, info.len_lin); - pipe_read_packet(rusb, info.ptr_lin, fifo, count); + uint16_t count = tu_min16(total_len, info.linear.len); + pipe_read_packet(rusb, info.linear.ptr, fifo, count); uint16_t rem = total_len - count; if (rem) { - rem = tu_min16(rem, info.len_wrap); - pipe_read_packet(rusb, info.ptr_wrap, fifo, rem); + rem = tu_min16(rem, info.wrapped.len); + pipe_read_packet(rusb, info.wrapped.ptr, fifo, rem); count += rem; } diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c index 381aa0b40..64046ce17 100644 --- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c +++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c @@ -293,7 +293,11 @@ static void handle_ctr_tx(uint32_t ep_id) { return; } xfer->iso_in_sending = false; +#if FSDEV_USE_SBUF_ISO == 0 uint8_t buf_id = (ep_reg & USB_EP_DTOG_TX) ? 0 : 1; +#else + uint8_t buf_id = BTABLE_BUF_TX; +#endif btable_set_count(ep_id, buf_id, 0); } @@ -774,7 +778,12 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, tusb_dir_t dir) { uint16_t cnt = tu_min16(xfer->total_len, xfer->max_packet_size); - if (ep_is_iso(ep_reg)) { +#if FSDEV_USE_SBUF_ISO == 0 + bool const dbl_buf = ep_is_iso(ep_reg); +#else + bool const dbl_buf = false; +#endif + if (dbl_buf) { btable_set_rx_bufsize(ep_idx, 0, cnt); btable_set_rx_bufsize(ep_idx, 1, cnt); } else { @@ -918,15 +927,15 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB tu_fifo_buffer_info_t info; tu_fifo_get_read_info(ff, &info); - uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin); - uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap); + uint16_t cnt_lin = tu_min16(wNBytes, info.linear.len); + uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.wrapped.len); uint16_t const cnt_total = cnt_lin + cnt_wrap; // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part, // last lin byte will be combined with wrapped part To ensure PMA is always access aligned uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1); uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1); - uint8_t const *src8 = (uint8_t const*) info.ptr_lin; + uint8_t const *src8 = (uint8_t const*) info.linear.ptr; // write even linear part dcd_write_packet_memory(dst, src8, lin_even); @@ -934,7 +943,7 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB src8 += lin_even; if (lin_odd == 0) { - src8 = (uint8_t const*) info.ptr_wrap; + src8 = (uint8_t const*) info.wrapped.ptr; } else { // Combine last linear bytes + first wrapped bytes to form fsdev bus width data fsdev_bus_t temp = 0; @@ -943,7 +952,7 @@ static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNB temp |= *src8++ << (i * 8); } - src8 = (uint8_t const*) info.ptr_wrap; + src8 = (uint8_t const*) info.wrapped.ptr; for(; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) { temp |= *src8++ << (i * 8); } @@ -968,8 +977,8 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBy tu_fifo_buffer_info_t info; tu_fifo_get_write_info(ff, &info); // We want to read from the FIFO - uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin); - uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap); + uint16_t cnt_lin = tu_min16(wNBytes, info.linear.len); + uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.wrapped.len); uint16_t cnt_total = cnt_lin + cnt_wrap; // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part, @@ -977,7 +986,7 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBy uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1); uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1); - uint8_t *dst8 = (uint8_t *) info.ptr_lin; + uint8_t *dst8 = (uint8_t *) info.linear.ptr; // read even linear part dcd_read_packet_memory(dst8, src, lin_even); @@ -985,7 +994,7 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBy src += lin_even; if (lin_odd == 0) { - dst8 = (uint8_t *) info.ptr_wrap; + dst8 = (uint8_t *) info.wrapped.ptr; } else { // Combine last linear bytes + first wrapped bytes to form fsdev bus width data fsdev_bus_t temp; @@ -998,7 +1007,7 @@ static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBy temp >>= 8; } - dst8 = (uint8_t *) info.ptr_wrap; + dst8 = (uint8_t *) info.wrapped.ptr; for (; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) { *dst8++ = (uint8_t) (temp & 0xfful); temp >>= 8; diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h index 30ffadc35..e7a57aca0 100644 --- a/src/portable/st/stm32_fsdev/fsdev_stm32.h +++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h @@ -202,8 +202,7 @@ #include "stm32u0xx.h" #define FSDEV_PMA_SIZE (1024u) #define FSDEV_BUS_32BIT - // Disable SBUF_ISO on U0 for now due to bad performance (audio glitching) - #define FSDEV_HAS_SBUF_ISO 0 + #define FSDEV_HAS_SBUF_ISO 1 #define USB USB_DRD_FS #define USB_EP_CTR_RX USB_EP_VTRX diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c index d43ea1dc3..b413121a5 100644 --- a/src/portable/sunxi/dcd_sunxi_musb.c +++ b/src/portable/sunxi/dcd_sunxi_musb.c @@ -535,12 +535,12 @@ static void pipe_read_write_packet_ff(tu_fifo_t *f, volatile void *fifo, unsigne tu_fifo_buffer_info_t info; ops[dir].tu_fifo_get_info(f, &info); unsigned total_len = len; - len = TU_MIN(total_len, info.len_lin); - ops[dir].pipe_read_write(info.ptr_lin, fifo, len); + len = TU_MIN(total_len, info.linear.len); + ops[dir].pipe_read_write(info.linear.ptr, fifo, len); unsigned rem = total_len - len; if (rem) { - len = TU_MIN(rem, info.len_wrap); - ops[dir].pipe_read_write(info.ptr_wrap, fifo, len); + len = TU_MIN(rem, info.wrapped.len); + ops[dir].pipe_read_write(info.wrapped.ptr, fifo, len); rem -= len; } ops[dir].tu_fifo_advance(f, total_len - rem); diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c index 477341791..8a8600301 100644 --- a/src/portable/synopsys/dwc2/dcd_dwc2.c +++ b/src/portable/synopsys/dwc2/dcd_dwc2.c @@ -367,7 +367,7 @@ static uint16_t epin_write_tx_fifo(uint8_t rhport, uint8_t epnum) { // Push packet to Tx-FIFO if (xfer->ff) { volatile uint32_t* tx_fifo = dwc2->fifo[epnum]; - tu_fifo_read_n_const_addr_full_words(xfer->ff, (void*)(uintptr_t)tx_fifo, xact_bytes); + tu_fifo_read_n_access_mode(xfer->ff, (void *)(uintptr_t)tx_fifo, xact_bytes, TU_FIFO_FIXED_ADDR_RW32); total_bytes_written += xact_bytes; } else { dfifo_write_packet(dwc2, epnum, xfer->buffer, xact_bytes); @@ -891,7 +891,7 @@ static void handle_rxflvl_irq(uint8_t rhport) { if (byte_count != 0) { // Read packet off RxFIFO if (xfer->ff != NULL) { - tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void*) (uintptr_t) rx_fifo, byte_count); + tu_fifo_write_n_access_mode(xfer->ff, (const void *)(uintptr_t)rx_fifo, byte_count, TU_FIFO_FIXED_ADDR_RW32); } else { dfifo_read_packet(dwc2, xfer->buffer, byte_count); xfer->buffer += byte_count; diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h index 9da8de41f..516eb021b 100644 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h @@ -337,6 +337,9 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t round_up_to_cache_line_size(uint32_ } TU_ATTR_ALWAYS_INLINE static inline bool is_cache_mem(uintptr_t addr) { + if (0 == (SCB->CCR & SCB_CCR_DC_Msk)) { + return false; // D-Cache is disabled + } for (unsigned int i = 0; i < TU_ARRAY_SIZE(uncached_regions); i++) { if (uncached_regions[i].start <= addr && addr <= uncached_regions[i].end) { return false; } } diff --git a/src/tusb.c b/src/tusb.c index 3852da76b..b6cfd1260 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -387,8 +387,12 @@ TU_ATTR_ALWAYS_INLINE static inline bool stream_xfer(uint8_t hwid, tu_edpt_strea #endif } else { #if CFG_TUD_ENABLED - return usbd_edpt_xfer(hwid, s->ep_addr, count ? s->ep_buf : NULL, count, false); - #endif + if (s->ep_buf == NULL) { + return usbd_edpt_xfer_fifo(hwid, s->ep_addr, &s->ff, count, false); + } else { + return usbd_edpt_xfer(hwid, s->ep_addr, count ? s->ep_buf : NULL, count, false); + } + #endif } return false; } @@ -419,12 +423,17 @@ bool tu_edpt_stream_write_zlp_if_needed(uint8_t hwid, tu_edpt_stream_t* s, uint3 } uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) { - // skip if no data - TU_VERIFY(tu_fifo_count(&s->ff) > 0, 0); + const uint16_t ff_count = tu_fifo_count(&s->ff); + TU_VERIFY(ff_count > 0, 0); // skip if no data TU_VERIFY(stream_claim(hwid, s), 0); // Pull data from FIFO -> EP buf - const uint16_t count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize); + uint16_t count; + if (s->ep_buf == NULL) { + count = ff_count; + } else { + count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize); + } if (count > 0) { TU_ASSERT(stream_xfer(hwid, s, count), 0); @@ -441,11 +450,19 @@ uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t *s, const void *buf TU_VERIFY(bufsize > 0); // TODO support ZLP if (0 == tu_fifo_depth(&s->ff)) { - // no fifo for buffered + // non-fifo mode TU_VERIFY(stream_claim(hwid, s), 0); - const uint32_t xact_len = tu_min32(bufsize, s->ep_bufsize); - memcpy(s->ep_buf, buffer, xact_len); + uint32_t xact_len; + if (s->ep_buf != NULL) { + // using ep buf + xact_len = tu_min32(bufsize, s->ep_bufsize); + memcpy(s->ep_buf, buffer, xact_len); + } else { + // using hwfifo + xact_len = bufsize; + } TU_ASSERT(stream_xfer(hwid, s, (uint16_t) xact_len), 0); + return xact_len; } else { const uint16_t ret = tu_fifo_write_n(&s->ff, buffer, (uint16_t) bufsize); @@ -464,6 +481,7 @@ uint32_t tu_edpt_stream_write_available(uint8_t hwid, tu_edpt_stream_t* s) { if (tu_fifo_depth(&s->ff) > 0) { return (uint32_t) tu_fifo_remaining(&s->ff); } else { + // non-fifo mode bool is_busy = true; if (s->is_host) { #if CFG_TUH_ENABLED @@ -483,7 +501,8 @@ uint32_t tu_edpt_stream_write_available(uint8_t hwid, tu_edpt_stream_t* s) { //--------------------------------------------------------------------+ uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s) { if (0 == tu_fifo_depth(&s->ff)) { - // no fifo for buffered + // non-fifo mode: RX need ep buffer + TU_VERIFY(s->ep_buf != NULL, 0); TU_VERIFY(stream_claim(hwid, s), 0); TU_ASSERT(stream_xfer(hwid, s, s->ep_bufsize), 0); return s->ep_bufsize; @@ -496,11 +515,8 @@ uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s) { // and slowly move it to the FIFO when read(). // This pre-check reduces endpoint claiming TU_VERIFY(available >= mps); - TU_VERIFY(stream_claim(hwid, s), 0); - - // get available again since fifo can be changed before endpoint is claimed - available = tu_fifo_remaining(&s->ff); + available = tu_fifo_remaining(&s->ff); // re-get available since fifo can be changed if (available >= mps) { // multiple of packet size limit by ep bufsize diff --git a/src/tusb_option.h b/src/tusb_option.h index c8265f898..eb072faab 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -24,8 +24,7 @@ * This file is part of the TinyUSB stack. */ -#ifndef TUSB_OPTION_H_ -#define TUSB_OPTION_H_ +#pragma once #include "common/tusb_compiler.h" @@ -268,15 +267,17 @@ // USBIP //--------------------------------------------------------------------+ +//------------- DWC2 -------------// +// Slave mode for device #ifndef CFG_TUD_DWC2_SLAVE_ENABLE #ifndef CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT - #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT 1 + #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT 1 #endif #define CFG_TUD_DWC2_SLAVE_ENABLE CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT #endif -// Enable DWC2 DMA for device +// DMA for device #ifndef CFG_TUD_DWC2_DMA_ENABLE #ifndef CFG_TUD_DWC2_DMA_ENABLE_DEFAULT #define CFG_TUD_DWC2_DMA_ENABLE_DEFAULT 0 @@ -285,33 +286,46 @@ #define CFG_TUD_DWC2_DMA_ENABLE CFG_TUD_DWC2_DMA_ENABLE_DEFAULT #endif -// Enable CI_HS VBUS Charge. Set this to 1 if the USB_VBUS pin is not connected to 5V VBUS (note: 3.3V is insufficient). -#ifndef CFG_TUD_CI_HS_VBUS_CHARGE - #ifndef CFG_TUD_CI_HS_VBUS_CHARGE_DEFAULT - #define CFG_TUD_CI_HS_VBUS_CHARGE_DEFAULT 0 - #endif - - #define CFG_TUD_CI_HS_VBUS_CHARGE CFG_TUD_CI_HS_VBUS_CHARGE_DEFAULT -#endif - -// Enable DWC2 Slave mode for host +// Slave mode for host #ifndef CFG_TUH_DWC2_SLAVE_ENABLE #ifndef CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT - #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT 1 + #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT 1 #endif #define CFG_TUH_DWC2_SLAVE_ENABLE CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT #endif -// Enable DWC2 DMA for host +// DMA for host #ifndef CFG_TUH_DWC2_DMA_ENABLE #ifndef CFG_TUH_DWC2_DMA_ENABLE_DEFAULT - #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 + #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0 + #endif + + #define CFG_TUH_DWC2_DMA_ENABLE CFG_TUH_DWC2_DMA_ENABLE_DEFAULT +#endif + +#if defined(TUP_USBIP_DWC2) + #if CFG_TUD_DWC2_SLAVE_ENABLE && !CFG_TUD_DWC2_DMA_ENABLE + #define CFG_TUD_EDPT_DEDICATED_HWFIFO 1 + #endif + + #if CFG_TUD_DWC2_SLAVE_ENABLE && !CFG_TUH_DWC2_DMA_ENABLE + #define CFG_TUH_EDPT_DEDICATED_HWFIFO 1 #endif +#endif - #define CFG_TUH_DWC2_DMA_ENABLE CFG_TUH_DWC2_DMA_ENABLE_DEFAULT +//------------- ChipIdea -------------// +// Enable CI_HS VBUS Charge. Set this to 1 if the USB_VBUS pin is not connected to 5V VBUS (note: 3.3V is +// insufficient). +#ifndef CFG_TUD_CI_HS_VBUS_CHARGE + #ifndef CFG_TUD_CI_HS_VBUS_CHARGE_DEFAULT + #define CFG_TUD_CI_HS_VBUS_CHARGE_DEFAULT 0 + #endif + + #define CFG_TUD_CI_HS_VBUS_CHARGE CFG_TUD_CI_HS_VBUS_CHARGE_DEFAULT #endif +//------------- pio-usb -------------// // Enable PIO-USB software host controller #ifndef CFG_TUH_RPI_PIO_USB #define CFG_TUH_RPI_PIO_USB 0 @@ -326,7 +340,6 @@ #define CFG_TUH_MAX3421 0 #endif - //-------------------------------------------------------------------- // RootHub Mode detection //-------------------------------------------------------------------- @@ -573,6 +586,10 @@ #define CFG_TUD_NCM 0 #endif +#ifndef CFG_TUD_EDPT_DEDICATED_HWFIFO + #define CFG_TUD_EDPT_DEDICATED_HWFIFO 0 +#endif + //-------------------------------------------------------------------- // Host Options (Default) //-------------------------------------------------------------------- @@ -712,6 +729,10 @@ #define CFG_TUH_API_EDPT_XFER 0 #endif +#ifndef CFG_TUH_EDPT_DEDICATED_HWFIFO + #define CFG_TUH_EDPT_DEDICATED_HWFIFO 0 +#endif + //--------------------------------------------------------------------+ // TypeC Options (Default) //--------------------------------------------------------------------+ @@ -731,7 +752,3 @@ // To avoid GCC compiler warnings when -pedantic option is used (strict ISO C) typedef int make_iso_compilers_happy; - -#endif /* TUSB_OPTION_H_ */ - -/** @} */ diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py index 3a11cee13..ba0826bd3 100755 --- a/test/hil/hil_test.py +++ b/test/hil/hil_test.py @@ -32,6 +32,13 @@ import random import re import sys import time +import warnings + +# Suppress pkg_resources deprecation warning from fs module +warnings.filterwarnings("ignore", message="pkg_resources is deprecated") +# Suppress pyfatfs unclean unmount warning +warnings.filterwarnings("ignore", message="Filesystem was not cleanly unmounted") + import serial import subprocess import json @@ -41,6 +48,7 @@ import fs import hashlib import ctypes from pymtp import MTP +import string ENUM_TIMEOUT = 30 @@ -50,6 +58,7 @@ STATUS_SKIPPED = "\033[33mSkipped\033[0m" verbose = False test_only = [] +build_dir = 'cmake-build' WCH_RISCV_CONTENT = """ adapter driver wlinke @@ -395,41 +404,71 @@ def test_device_cdc_dual_ports(board): ] ser = [open_serial_dev(p) for p in port] - str_test = [ b"test_no1", b"test_no2" ] - # Echo test write to each port and read back - for i in range(len(str_test)): - s = str_test[i] - l = len(s) - ser[i].write(s) - ser[i].flush() - rd = [ ser[i].read(l) for i in range(len(ser)) ] - assert rd[0] == s.lower(), f'Port1 wrong data: expected {s.lower()} was {rd[0]}' - assert rd[1] == s.upper(), f'Port2 wrong data: expected {s.upper()} was {rd[1]}' + def rand_ascii(length): + return "".join(random.choices(string.ascii_letters + string.digits, k=length)).encode("ascii") + + sizes = [32, 64, 128, 256, 512, random.randint(2000, 5000)] + + def write_and_check(writer, payload): + size = len(payload) + for s in ser: + s.reset_input_buffer() + rd0 = b'' + rd1 = b'' + offset = 0 + # Write in chunks of random 1-64 bytes (device has 64-byte buffer) + while offset < size: + chunk_size = min(random.randint(1, 64), size - offset) + ser[writer].write(payload[offset:offset + chunk_size]) + ser[writer].flush() + rd0 += ser[0].read(chunk_size) + rd1 += ser[1].read(chunk_size) + offset += chunk_size + assert rd0 == payload.lower(), f'Port0 wrong data ({size}): expected {payload.lower()[:16]}... was {rd0[:16]}' + assert rd1 == payload.upper(), f'Port1 wrong data ({size}): expected {payload.upper()[:16]}... was {rd1[:16]}' + + for size in sizes: + payload0 = rand_ascii(size) + write_and_check(0, payload0) + + payload1 = rand_ascii(size) + write_and_check(1, payload1) ser[0].close() ser[1].close() def test_device_cdc_msc(board): uid = board['uid'] - # Echo test + # CDC Echo test port = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 0) ser = open_serial_dev(port) - test_str = b"test_str" - ser.write(test_str) - ser.flush() - rd_str = ser.read(len(test_str)) + def rand_ascii(length): + return "".join(random.choices(string.ascii_letters + string.digits, k=length)).encode("ascii") + + sizes = [32, 64, 128, 256, 512, random.randint(2000, 5000)] + for size in sizes: + test_str = rand_ascii(size) + rd_str = b'' + offset = 0 + # Write in chunks of random 1-64 bytes (device has 64-byte buffer) + while offset < size: + chunk_size = min(random.randint(1, 64), size - offset) + ser.write(test_str[offset:offset + chunk_size]) + ser.flush() + rd_str += ser.read(chunk_size) + offset += chunk_size + assert rd_str == test_str, f'CDC wrong data ({size} bytes):\n expected: {test_str}\n received: {rd_str}' ser.close() - assert rd_str == test_str, f'CDC wrong data: expected: {test_str} was {rd_str}' - # Block test - data = read_disk_file(uid,0,'README.TXT') + # MSC Block test + data = read_disk_file(uid, 0, 'README.TXT') readme = \ - b"This is tinyusb's MassStorage Class demo.\r\n\r\n\ + b"This is tinyusb's MassStorage Class demo.\r\n\r\n\ If you find any bugs or get any questions, feel free to file an\r\n\ issue at github.com/hathach/tinyusb" - assert data == readme, 'MSC wrong data' + assert data == readme, f'MSC wrong data in README.TXT\n expected: {readme.decode()}\n received: {data.decode()}' def test_device_cdc_msc_freertos(board): @@ -611,9 +650,7 @@ def test_example(board, f1, example): if f1 != "": f1_str = '-f1_' + f1.replace(' ', '_') - fw_dir = f'{TINYUSB_ROOT}/cmake-build/cmake-build-{name}{f1_str}/{example}' - if not os.path.exists(fw_dir): - fw_dir = f'{TINYUSB_ROOT}/examples/cmake-build-{name}{f1_str}/{example}' + fw_dir = f'{TINYUSB_ROOT}/{build_dir}/cmake-build-{name}{f1_str}/{example}' fw_name = f'{fw_dir}/{os.path.basename(example)}' print(f'{name+f1_str:40} {example:30} ...', end='') @@ -625,7 +662,7 @@ def test_example(board, f1, example): print(f'Flashing {fw_name}.elf') # flash firmware. It may fail randomly, retry a few times - max_rety = 3 + max_rety = 1 start_s = time.time() for i in range(max_rety): ret = globals()[f'flash_{board["flasher"]["name"].lower()}'](board, fw_name) @@ -701,6 +738,7 @@ def main(): """ global verbose global test_only + global build_dir duration = time.time() @@ -709,6 +747,7 @@ def main(): parser.add_argument('-b', '--board', action='append', default=[], help='Boards to test, all if not specified') parser.add_argument('-s', '--skip', action='append', default=[], help='Skip boards from test') parser.add_argument('-t', '--test-only', action='append', default=[], help='Tests to run, all if not specified') + parser.add_argument('-B', '--build', default='cmake-build', help='Build folder name (default: cmake-build)') parser.add_argument('-v', '--verbose', action='store_true', help='Verbose output') args = parser.parse_args() @@ -717,6 +756,7 @@ def main(): skip_boards = args.skip verbose = args.verbose test_only = args.test_only + build_dir = args.build # if config file is not found, try to find it in the same directory as this script if not os.path.exists(config_file): diff --git a/test/unit-test/CMakeLists.txt b/test/unit-test/CMakeLists.txt new file mode 100644 index 000000000..7172f5575 --- /dev/null +++ b/test/unit-test/CMakeLists.txt @@ -0,0 +1,132 @@ +cmake_minimum_required(VERSION 3.20) + +project(tinyusb_unit_tests LANGUAGES C) + +set(CMAKE_C_STANDARD 99) +set(CMAKE_C_STANDARD_REQUIRED ON) +set(CMAKE_C_EXTENSIONS ON) + +# Command to invoke Ceedling. Supports multi-word commands such as "bundle exec ceedling". +set(CEEDLING_COMMAND "ceedling" CACHE STRING "Command used to invoke Ceedling (Ruby gem).") +separate_arguments(CEEDLING_COMMAND_LIST NATIVE_COMMAND "${CEEDLING_COMMAND}") +if (CEEDLING_COMMAND_LIST STREQUAL "") + message(FATAL_ERROR "CEEDLING_COMMAND is empty; set it to a valid Ceedling invocation.") +endif () + +list(GET CEEDLING_COMMAND_LIST 0 CEEDLING_LAUNCHER) +find_program(CEEDLING_LAUNCHER_PATH NAMES ${CEEDLING_LAUNCHER}) +if (NOT CEEDLING_LAUNCHER_PATH) + message(FATAL_ERROR "Could not find '${CEEDLING_LAUNCHER}' on PATH; adjust CEEDLING_COMMAND or PATH.") +endif () +list(REMOVE_AT CEEDLING_COMMAND_LIST 0) +list(INSERT CEEDLING_COMMAND_LIST 0 ${CEEDLING_LAUNCHER_PATH}) + +set(CEEDLING_WORKDIR ${CMAKE_CURRENT_LIST_DIR}) +set(CEEDLING_BUILD_DIR ${CEEDLING_WORKDIR}/_build) + +# Helper to add a Ceedling-backed test target that compiles into a real CMake executable. +function(add_ceedling_test TARGET_NAME TEST_SOURCE PRODUCT_SOURCES MOCK_SOURCES) + set(runner ${CEEDLING_BUILD_DIR}/test/runners/${TARGET_NAME}_runner.c) + + add_custom_target(ceedling_gen_${TARGET_NAME} + COMMAND ${CEEDLING_COMMAND_LIST} test:${TARGET_NAME} + WORKING_DIRECTORY ${CEEDLING_WORKDIR} + BYPRODUCTS ${runner} + USES_TERMINAL + COMMENT "Generate Ceedling runner/mocks for ${TARGET_NAME}" + ) + + add_executable(${TARGET_NAME} + ${TEST_SOURCE} + ${runner} + ${MOCK_SOURCES} + ${CEEDLING_BUILD_DIR}/vendor/unity/src/unity.c + ${CEEDLING_BUILD_DIR}/vendor/cmock/src/cmock.c + ${PRODUCT_SOURCES} + ) + + set_source_files_properties( + ${runner} + ${MOCK_SOURCES} + ${CEEDLING_BUILD_DIR}/vendor/unity/src/unity.c + ${CEEDLING_BUILD_DIR}/vendor/cmock/src/cmock.c + PROPERTIES GENERATED TRUE + ) + + add_dependencies(${TARGET_NAME} ceedling_gen_${TARGET_NAME}) + + target_include_directories(${TARGET_NAME} PRIVATE + ${CEEDLING_WORKDIR}/test + ${CEEDLING_WORKDIR}/test/support + ${CEEDLING_BUILD_DIR}/test/runners + ${CEEDLING_BUILD_DIR}/test/mocks/${TARGET_NAME} + ${CEEDLING_BUILD_DIR}/vendor/unity/src + ${CEEDLING_BUILD_DIR}/vendor/cmock/src + ${CEEDLING_WORKDIR}/../../src + ${CEEDLING_WORKDIR}/../../src/common + ${CEEDLING_WORKDIR}/../../src/device + ${CEEDLING_WORKDIR}/../../src/class + ${CEEDLING_WORKDIR}/../../src/class/msc + ${CEEDLING_WORKDIR}/../../src/host + ${CEEDLING_WORKDIR}/../../src/typec + ${CEEDLING_WORKDIR}/../../src/osal + ) + + target_compile_definitions(${TARGET_NAME} PRIVATE _UNITY_TEST_) + target_compile_options(${TARGET_NAME} PRIVATE -Wall -Wextra) + add_test(NAME ${TARGET_NAME} COMMAND ${TARGET_NAME}) +endfunction() + +# Custom targets to keep plain Ceedling entry-points available. +add_custom_target(ceedling_all + COMMAND ${CEEDLING_COMMAND_LIST} test:all + WORKING_DIRECTORY ${CEEDLING_WORKDIR} + USES_TERMINAL + COMMENT "Run Ceedling (Unity) unit tests" + ) + +add_custom_target(ceedling_clean + COMMAND ${CEEDLING_COMMAND_LIST} clean + WORKING_DIRECTORY ${CEEDLING_WORKDIR} + USES_TERMINAL + COMMENT "Clean Ceedling build outputs" + ) + +add_custom_target(ceedling_clobber + COMMAND ${CEEDLING_COMMAND_LIST} clobber + WORKING_DIRECTORY ${CEEDLING_WORKDIR} + USES_TERMINAL + COMMENT "Clobber Ceedling build outputs" + ) + +# Per-test wiring: mocks are generated under _build/test/mocks/<name>/. +add_ceedling_test( + test_common_func + ${CEEDLING_WORKDIR}/test/test_common_func.c + "" + "" + ) + +add_ceedling_test( + test_fifo + ${CEEDLING_WORKDIR}/test/test_fifo.c + ${CEEDLING_WORKDIR}/../../src/common/tusb_fifo.c + "" + ) +target_compile_definitions(test_fifo PRIVATE CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32=1) + +add_ceedling_test( + test_usbd + ${CEEDLING_WORKDIR}/test/device/usbd/test_usbd.c + "${CEEDLING_WORKDIR}/../../src/tusb.c;${CEEDLING_WORKDIR}/../../src/device/usbd.c;${CEEDLING_WORKDIR}/../../src/device/usbd_control.c;${CEEDLING_WORKDIR}/../../src/common/tusb_fifo.c" + "${CEEDLING_BUILD_DIR}/test/mocks/test_usbd/mock_dcd.c;${CEEDLING_BUILD_DIR}/test/mocks/test_usbd/mock_msc_device.c" + ) + +add_ceedling_test( + test_msc_device + ${CEEDLING_WORKDIR}/test/device/msc/test_msc_device.c + "${CEEDLING_WORKDIR}/../../src/tusb.c;${CEEDLING_WORKDIR}/../../src/device/usbd.c;${CEEDLING_WORKDIR}/../../src/device/usbd_control.c;${CEEDLING_WORKDIR}/../../src/class/msc/msc_device.c;${CEEDLING_WORKDIR}/../../src/common/tusb_fifo.c" + "${CEEDLING_BUILD_DIR}/test/mocks/test_msc_device/mock_dcd.c" + ) + +enable_testing() diff --git a/test/unit-test/project.yml b/test/unit-test/project.yml index 6c86b0205..d971d098d 100644 --- a/test/unit-test/project.yml +++ b/test/unit-test/project.yml @@ -128,6 +128,7 @@ :defines: :test: - _UNITY_TEST_ + - CFG_TUSB_FIFO_ACCESS_FIXED_ADDR_RW32 :release: [] # Enable to inject name of a test as a unique compilation symbol into its respective executable build. diff --git a/test/unit-test/test/test_common_func.c b/test/unit-test/test/test_common_func.c index 981531dd7..8afcc5b2b 100644 --- a/test/unit-test/test/test_common_func.c +++ b/test/unit-test/test/test_common_func.c @@ -80,3 +80,113 @@ void test_TU_ARGS_NUM(void) TEST_ASSERT_EQUAL(31, TU_ARGS_NUM(a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20, a21, a22, a23, a24, a25, a26, a27, a28, a29, a30, a31)); TEST_ASSERT_EQUAL(32, TU_ARGS_NUM(a1, a2, a3, a4, a5, a6, a7, a8, a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20, a21, a22, a23, a24, a25, a26, a27, a28, a29, a30, a31, a32)); } + +void test_tu_scatter_read32(void) { + // Test data: 0x04030201 + uint8_t buf1[] = {0x01, 0x02, 0x03, 0x04}; + uint8_t buf2[] = {0x05, 0x06, 0x07, 0x08}; + + // len1=1, len2=0: read 1 byte from buf1 + TEST_ASSERT_EQUAL_HEX32(0x01, tu_scatter_read32(buf1, 1, buf2, 0)); + + // len1=1, len2=1: read 1 byte from buf1, 1 byte from buf2 + TEST_ASSERT_EQUAL_HEX32(0x0501, tu_scatter_read32(buf1, 1, buf2, 1)); + + // len1=1, len2=2: read 1 byte from buf1, 2 bytes from buf2 + TEST_ASSERT_EQUAL_HEX32(0x060501, tu_scatter_read32(buf1, 1, buf2, 2)); + + // len1=1, len2=3: read 1 byte from buf1, 3 bytes from buf2 + TEST_ASSERT_EQUAL_HEX32(0x07060501, tu_scatter_read32(buf1, 1, buf2, 3)); + + // len1=2, len2=0: read 2 bytes from buf1 + TEST_ASSERT_EQUAL_HEX32(0x0201, tu_scatter_read32(buf1, 2, buf2, 0)); + + // len1=2, len2=1: read 2 bytes from buf1, 1 byte from buf2 + TEST_ASSERT_EQUAL_HEX32(0x050201, tu_scatter_read32(buf1, 2, buf2, 1)); + + // len1=2, len2=2: read 2 bytes from buf1, 2 bytes from buf2 + TEST_ASSERT_EQUAL_HEX32(0x06050201, tu_scatter_read32(buf1, 2, buf2, 2)); + + // len1=3, len2=0: read 3 bytes from buf1 + TEST_ASSERT_EQUAL_HEX32(0x030201, tu_scatter_read32(buf1, 3, buf2, 0)); + + // len1=3, len2=1: read 3 bytes from buf1, 1 byte from buf2 + TEST_ASSERT_EQUAL_HEX32(0x05030201, tu_scatter_read32(buf1, 3, buf2, 1)); +} + +void test_tu_scatter_write32(void) { + uint8_t buf1[4]; + uint8_t buf2[4]; + + // len1=1, len2=0: write 1 byte to buf1 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x01, buf1, 1, buf2, 0); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x00, buf2[0]); + + // len1=1, len2=1: write 1 byte to buf1, 1 byte to buf2 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x0201, buf1, 1, buf2, 1); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf2[0]); + + // len1=1, len2=2: write 1 byte to buf1, 2 bytes to buf2 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x030201, buf1, 1, buf2, 2); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf2[0]); + TEST_ASSERT_EQUAL_HEX8(0x03, buf2[1]); + + // len1=1, len2=3: write 1 byte to buf1, 3 bytes to buf2 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x04030201, buf1, 1, buf2, 3); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf2[0]); + TEST_ASSERT_EQUAL_HEX8(0x03, buf2[1]); + TEST_ASSERT_EQUAL_HEX8(0x04, buf2[2]); + + // len1=2, len2=0: write 2 bytes to buf1 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x0201, buf1, 2, buf2, 0); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf1[1]); + + // len1=2, len2=1: write 2 bytes to buf1, 1 byte to buf2 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x030201, buf1, 2, buf2, 1); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf1[1]); + TEST_ASSERT_EQUAL_HEX8(0x03, buf2[0]); + + // len1=2, len2=2: write 2 bytes to buf1, 2 bytes to buf2 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x04030201, buf1, 2, buf2, 2); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf1[1]); + TEST_ASSERT_EQUAL_HEX8(0x03, buf2[0]); + TEST_ASSERT_EQUAL_HEX8(0x04, buf2[1]); + + // len1=3, len2=0: write 3 bytes to buf1 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x030201, buf1, 3, buf2, 0); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf1[1]); + TEST_ASSERT_EQUAL_HEX8(0x03, buf1[2]); + + // len1=3, len2=1: write 3 bytes to buf1, 1 byte to buf2 + memset(buf1, 0, sizeof(buf1)); + memset(buf2, 0, sizeof(buf2)); + tu_scatter_write32(0x04030201, buf1, 3, buf2, 1); + TEST_ASSERT_EQUAL_HEX8(0x01, buf1[0]); + TEST_ASSERT_EQUAL_HEX8(0x02, buf1[1]); + TEST_ASSERT_EQUAL_HEX8(0x03, buf1[2]); + TEST_ASSERT_EQUAL_HEX8(0x04, buf2[0]); +} diff --git a/test/unit-test/test/test_fifo.c b/test/unit-test/test/test_fifo.c index 3b4deb33e..35bbeaa62 100644 --- a/test/unit-test/test/test_fifo.c +++ b/test/unit-test/test/test_fifo.c @@ -30,51 +30,52 @@ #include "osal/osal.h" #include "tusb_fifo.h" -#define FIFO_SIZE 64 -uint8_t tu_ff_buf[FIFO_SIZE * sizeof(uint8_t)]; +#define FIFO_SIZE 64 +uint8_t tu_ff_buf[FIFO_SIZE * sizeof(uint8_t)]; tu_fifo_t tu_ff = TU_FIFO_INIT(tu_ff_buf, FIFO_SIZE, uint8_t, false); -tu_fifo_t* ff = &tu_ff; +tu_fifo_t *ff = &tu_ff; tu_fifo_buffer_info_t info; uint8_t test_data[4096]; uint8_t rd_buf[FIFO_SIZE]; -void setUp(void) -{ +void setUp(void) { tu_fifo_clear(ff); memset(&info, 0, sizeof(tu_fifo_buffer_info_t)); - for(int i=0; i<sizeof(test_data); i++) test_data[i] = i; + for (size_t i = 0; i < sizeof(test_data); i++) { + test_data[i] = i; + } memset(rd_buf, 0, sizeof(rd_buf)); } -void tearDown(void) -{ +void tearDown(void) { } //--------------------------------------------------------------------+ // Tests //--------------------------------------------------------------------+ -void test_normal(void) -{ - for(uint8_t i=0; i < FIFO_SIZE; i++) tu_fifo_write(ff, &i); +void test_normal(void) { + for (uint8_t i = 0; i < FIFO_SIZE; i++) { + tu_fifo_write(ff, &i); + } - for(uint8_t i=0; i < FIFO_SIZE; i++) - { + for (uint8_t i = 0; i < FIFO_SIZE; i++) { uint8_t c; tu_fifo_read(ff, &c); TEST_ASSERT_EQUAL(i, c); } } -void test_item_size(void) -{ - uint8_t ff4_buf[FIFO_SIZE * sizeof(uint32_t)]; +void test_item_size(void) { + uint8_t ff4_buf[FIFO_SIZE * sizeof(uint32_t)]; tu_fifo_t ff4 = TU_FIFO_INIT(ff4_buf, FIFO_SIZE, uint32_t, false); - uint32_t data4[2*FIFO_SIZE]; - for(uint32_t i=0; i<sizeof(data4)/4; i++) data4[i] = i; + uint32_t data4[2 * FIFO_SIZE]; + for (uint32_t i = 0; i < sizeof(data4) / 4; i++) { + data4[i] = i; + } // fill up fifo tu_fifo_write_n(&ff4, data4, FIFO_SIZE); @@ -84,78 +85,77 @@ void test_item_size(void) // read 0 -> 4 rd_count = tu_fifo_read_n(&ff4, rd_buf4, 5); - TEST_ASSERT_EQUAL( 5, rd_count ); - TEST_ASSERT_EQUAL_UINT32_ARRAY( data4, rd_buf4, rd_count ); // 0 -> 4 + TEST_ASSERT_EQUAL(5, rd_count); + TEST_ASSERT_EQUAL_UINT32_ARRAY(data4, rd_buf4, rd_count); // 0 -> 4 - tu_fifo_write_n(&ff4, data4+FIFO_SIZE, 5); + tu_fifo_write_n(&ff4, data4 + FIFO_SIZE, 5); // read all 5 -> 68 rd_count = tu_fifo_read_n(&ff4, rd_buf4, FIFO_SIZE); - TEST_ASSERT_EQUAL( FIFO_SIZE, rd_count ); - TEST_ASSERT_EQUAL_UINT32_ARRAY( data4+5, rd_buf4, rd_count ); // 5 -> 68 + TEST_ASSERT_EQUAL(FIFO_SIZE, rd_count); + TEST_ASSERT_EQUAL_UINT32_ARRAY(data4 + 5, rd_buf4, rd_count); // 5 -> 68 } -void test_read_n(void) -{ +void test_read_n(void) { uint16_t rd_count; // fill up fifo - for(uint8_t i=0; i < FIFO_SIZE; i++) tu_fifo_write(ff, test_data+i); + for (uint8_t i = 0; i < FIFO_SIZE; i++) { + tu_fifo_write(ff, test_data + i); + } // case 1: Read index + count < depth // read 0 -> 4 rd_count = tu_fifo_read_n(ff, rd_buf, 5); - TEST_ASSERT_EQUAL( 5, rd_count ); - TEST_ASSERT_EQUAL_MEMORY( test_data, rd_buf, rd_count ); // 0 -> 4 + TEST_ASSERT_EQUAL(5, rd_count); + TEST_ASSERT_EQUAL_MEMORY(test_data, rd_buf, rd_count); // 0 -> 4 // case 2: Read index + count > depth // write 10, 11, 12 - tu_fifo_write(ff, test_data+FIFO_SIZE); - tu_fifo_write(ff, test_data+FIFO_SIZE+1); - tu_fifo_write(ff, test_data+FIFO_SIZE+2); + tu_fifo_write(ff, test_data + FIFO_SIZE); + tu_fifo_write(ff, test_data + FIFO_SIZE + 1); + tu_fifo_write(ff, test_data + FIFO_SIZE + 2); rd_count = tu_fifo_read_n(ff, rd_buf, 7); - TEST_ASSERT_EQUAL( 7, rd_count ); + TEST_ASSERT_EQUAL(7, rd_count); - TEST_ASSERT_EQUAL_MEMORY( test_data+5, rd_buf, rd_count ); // 5 -> 11 + TEST_ASSERT_EQUAL_MEMORY(test_data + 5, rd_buf, rd_count); // 5 -> 11 // Should only read until empty - TEST_ASSERT_EQUAL( FIFO_SIZE-5+3-7, tu_fifo_read_n(ff, rd_buf, 100) ); + TEST_ASSERT_EQUAL(FIFO_SIZE - 5 + 3 - 7, tu_fifo_read_n(ff, rd_buf, 100)); } -void test_write_n(void) -{ +void test_write_n(void) { // case 1: wr + count < depth tu_fifo_write_n(ff, test_data, 32); // wr = 32, count = 32 uint16_t rd_count; rd_count = tu_fifo_read_n(ff, rd_buf, 16); // wr = 32, count = 16 - TEST_ASSERT_EQUAL( 16, rd_count ); - TEST_ASSERT_EQUAL_MEMORY( test_data, rd_buf, rd_count ); + TEST_ASSERT_EQUAL(16, rd_count); + TEST_ASSERT_EQUAL_MEMORY(test_data, rd_buf, rd_count); // case 2: wr + count > depth - tu_fifo_write_n(ff, test_data+32, 40); // wr = 72 -> 8, count = 56 + tu_fifo_write_n(ff, test_data + 32, 40); // wr = 72 -> 8, count = 56 - tu_fifo_read_n(ff, rd_buf, 32); // count = 24 - TEST_ASSERT_EQUAL_MEMORY( test_data+16, rd_buf, rd_count); + tu_fifo_read_n(ff, rd_buf, 32); // count = 24 + TEST_ASSERT_EQUAL_MEMORY(test_data + 16, rd_buf, rd_count); TEST_ASSERT_EQUAL(24, tu_fifo_count(ff)); } -void test_write_double_overflowed(void) -{ +void test_write_double_overflowed(void) { tu_fifo_set_overwritable(ff, true); - uint8_t rd_buf[FIFO_SIZE] = { 0 }; - uint8_t* buf = test_data; + uint8_t rd_buf[FIFO_SIZE] = {0}; + uint8_t *buf = test_data; // full buf += tu_fifo_write_n(ff, buf, FIFO_SIZE); TEST_ASSERT_EQUAL(FIFO_SIZE, tu_fifo_count(ff)); // write more, should still full - buf += tu_fifo_write_n(ff, buf, FIFO_SIZE-8); + buf += tu_fifo_write_n(ff, buf, FIFO_SIZE - 8); TEST_ASSERT_EQUAL(FIFO_SIZE, tu_fifo_count(ff)); // double overflowed: in total, write more than > 2*FIFO_SIZE @@ -165,14 +165,13 @@ void test_write_double_overflowed(void) // reading back should give back data from last FIFO_SIZE write tu_fifo_read_n(ff, rd_buf, FIFO_SIZE); - TEST_ASSERT_EQUAL_MEMORY(buf-16, rd_buf+FIFO_SIZE-16, 16); + TEST_ASSERT_EQUAL_MEMORY(buf - 16, rd_buf + FIFO_SIZE - 16, 16); // TODO whole buffer should match, but we deliberately not implement it // TEST_ASSERT_EQUAL_MEMORY(buf-FIFO_SIZE, rd_buf, FIFO_SIZE); } -static uint16_t help_write(uint16_t total, uint16_t n) -{ +static uint16_t help_write(uint16_t total, uint16_t n) { tu_fifo_write_n(ff, test_data, n); total = tu_min16(FIFO_SIZE, total + n); @@ -182,8 +181,7 @@ static uint16_t help_write(uint16_t total, uint16_t n) return total; } -void test_write_overwritable2(void) -{ +void test_write_overwritable2(void) { tu_fifo_set_overwritable(ff, true); // based on actual crash tests detected by fuzzing @@ -202,13 +200,15 @@ void test_write_overwritable2(void) total = help_write(total, 192); } -void test_peek(void) -{ +void test_peek(void) { uint8_t temp; - temp = 10; tu_fifo_write(ff, &temp); - temp = 20; tu_fifo_write(ff, &temp); - temp = 30; tu_fifo_write(ff, &temp); + temp = 10; + tu_fifo_write(ff, &temp); + temp = 20; + tu_fifo_write(ff, &temp); + temp = 30; + tu_fifo_write(ff, &temp); temp = 0; @@ -222,12 +222,13 @@ void test_peek(void) TEST_ASSERT_EQUAL(30, temp); } -void test_get_read_info_when_no_wrap() -{ +void test_get_read_info_when_no_wrap() { uint8_t ch = 1; // write 6 items - for(uint8_t i=0; i < 6; i++) tu_fifo_write(ff, &ch); + for (uint8_t i = 0; i < 6; i++) { + tu_fifo_write(ff, &ch); + } // read 2 items tu_fifo_read(ff, &ch); @@ -235,22 +236,25 @@ void test_get_read_info_when_no_wrap() tu_fifo_get_read_info(ff, &info); - TEST_ASSERT_EQUAL(4, info.len_lin); - TEST_ASSERT_EQUAL(0, info.len_wrap); + TEST_ASSERT_EQUAL(4, info.linear.len); + TEST_ASSERT_EQUAL(0, info.wrapped.len); - TEST_ASSERT_EQUAL_PTR(ff->buffer+2, info.ptr_lin); - TEST_ASSERT_NULL(info.ptr_wrap); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 2, info.linear.ptr); + TEST_ASSERT_NULL(info.wrapped.ptr); } -void test_get_read_info_when_wrapped() -{ +void test_get_read_info_when_wrapped() { uint8_t ch = 1; // make fifo full - for(uint8_t i=0; i < FIFO_SIZE; i++) tu_fifo_write(ff, &ch); + for (uint8_t i = 0; i < FIFO_SIZE; i++) { + tu_fifo_write(ff, &ch); + } // read 6 items - for(uint8_t i=0; i < 6; i++) tu_fifo_read(ff, &ch); + for (uint8_t i = 0; i < 6; i++) { + tu_fifo_read(ff, &ch); + } // write 2 items tu_fifo_write(ff, &ch); @@ -258,15 +262,14 @@ void test_get_read_info_when_wrapped() tu_fifo_get_read_info(ff, &info); - TEST_ASSERT_EQUAL(FIFO_SIZE-6, info.len_lin); - TEST_ASSERT_EQUAL(2, info.len_wrap); + TEST_ASSERT_EQUAL(FIFO_SIZE - 6, info.linear.len); + TEST_ASSERT_EQUAL(2, info.wrapped.len); - TEST_ASSERT_EQUAL_PTR(ff->buffer+6, info.ptr_lin); - TEST_ASSERT_EQUAL_PTR(ff->buffer, info.ptr_wrap); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 6, info.linear.ptr); + TEST_ASSERT_EQUAL_PTR(ff->buffer, info.wrapped.ptr); } -void test_get_write_info_when_no_wrap() -{ +void test_get_write_info_when_no_wrap() { uint8_t ch = 1; // write 2 items @@ -275,20 +278,21 @@ void test_get_write_info_when_no_wrap() tu_fifo_get_write_info(ff, &info); - TEST_ASSERT_EQUAL(FIFO_SIZE-2, info.len_lin); - TEST_ASSERT_EQUAL(0, info.len_wrap); + TEST_ASSERT_EQUAL(FIFO_SIZE - 2, info.linear.len); + TEST_ASSERT_EQUAL(0, info.wrapped.len); - TEST_ASSERT_EQUAL_PTR(ff->buffer+2, info .ptr_lin); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 2, info.linear.ptr); // application should check len instead of ptr. - // TEST_ASSERT_NULL(info.ptr_wrap); + // TEST_ASSERT_NULL(info.wrapped.ptr); } -void test_get_write_info_when_wrapped() -{ +void test_get_write_info_when_wrapped() { uint8_t ch = 1; // write 6 items - for(uint8_t i=0; i < 6; i++) tu_fifo_write(ff, &ch); + for (uint8_t i = 0; i < 6; i++) { + tu_fifo_write(ff, &ch); + } // read 2 items tu_fifo_read(ff, &ch); @@ -296,68 +300,67 @@ void test_get_write_info_when_wrapped() tu_fifo_get_write_info(ff, &info); - TEST_ASSERT_EQUAL(FIFO_SIZE-6, info.len_lin); - TEST_ASSERT_EQUAL(2, info.len_wrap); + TEST_ASSERT_EQUAL(FIFO_SIZE - 6, info.linear.len); + TEST_ASSERT_EQUAL(2, info.wrapped.len); - TEST_ASSERT_EQUAL_PTR(ff->buffer+6, info .ptr_lin); - TEST_ASSERT_EQUAL_PTR(ff->buffer, info.ptr_wrap); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 6, info.linear.ptr); + TEST_ASSERT_EQUAL_PTR(ff->buffer, info.wrapped.ptr); } -void test_empty(void) -{ +void test_empty(void) { uint8_t temp; TEST_ASSERT_TRUE(tu_fifo_empty(ff)); // read info tu_fifo_get_read_info(ff, &info); - TEST_ASSERT_EQUAL(0, info.len_lin); - TEST_ASSERT_EQUAL(0, info.len_wrap); + TEST_ASSERT_EQUAL(0, info.linear.len); + TEST_ASSERT_EQUAL(0, info.wrapped.len); - TEST_ASSERT_NULL(info.ptr_lin); - TEST_ASSERT_NULL(info.ptr_wrap); + TEST_ASSERT_NULL(info.linear.ptr); + TEST_ASSERT_NULL(info.wrapped.ptr); // write info tu_fifo_get_write_info(ff, &info); - TEST_ASSERT_EQUAL(FIFO_SIZE, info.len_lin); - TEST_ASSERT_EQUAL(0, info.len_wrap); + TEST_ASSERT_EQUAL(FIFO_SIZE, info.linear.len); + TEST_ASSERT_EQUAL(0, info.wrapped.len); - TEST_ASSERT_EQUAL_PTR(ff->buffer, info .ptr_lin); + TEST_ASSERT_EQUAL_PTR(ff->buffer, info.linear.ptr); // application should check len instead of ptr. - // TEST_ASSERT_NULL(info.ptr_wrap); + // TEST_ASSERT_NULL(info.wrapped.ptr); // write 1 then re-check empty tu_fifo_write(ff, &temp); TEST_ASSERT_FALSE(tu_fifo_empty(ff)); } -void test_full(void) -{ +void test_full(void) { TEST_ASSERT_FALSE(tu_fifo_full(ff)); - for(uint8_t i=0; i < FIFO_SIZE; i++) tu_fifo_write(ff, &i); + for (uint8_t i = 0; i < FIFO_SIZE; i++) { + tu_fifo_write(ff, &i); + } TEST_ASSERT_TRUE(tu_fifo_full(ff)); // read info tu_fifo_get_read_info(ff, &info); - TEST_ASSERT_EQUAL(FIFO_SIZE, info.len_lin); - TEST_ASSERT_EQUAL(0, info.len_wrap); + TEST_ASSERT_EQUAL(FIFO_SIZE, info.linear.len); + TEST_ASSERT_EQUAL(0, info.wrapped.len); - TEST_ASSERT_EQUAL_PTR(ff->buffer, info.ptr_lin); + TEST_ASSERT_EQUAL_PTR(ff->buffer, info.linear.ptr); // skip this, application must check len instead of buffer - // TEST_ASSERT_NULL(info.ptr_wrap); + // TEST_ASSERT_NULL(info.wrapped.ptr); // write info } -void test_rd_idx_wrap() -{ +void test_rd_idx_wrap(void) { tu_fifo_t ff10; - uint8_t buf[10]; - uint8_t dst[10]; + uint8_t buf[10]; + uint8_t dst[10]; tu_fifo_config(&ff10, buf, 10, 1, 1); @@ -376,3 +379,187 @@ void test_rd_idx_wrap() TEST_ASSERT_EQUAL(n, 2); TEST_ASSERT_EQUAL(ff10.rd_idx, 6); } + +void test_advance_write_pointer_cases(void) { + tu_fifo_clear(ff); + + tu_fifo_advance_write_pointer(ff, 3); + TEST_ASSERT_EQUAL(3, ff->wr_idx); + TEST_ASSERT_EQUAL(3, tu_fifo_count(ff)); + + // advance to cross depth but stay within 0..2*depth window + ff->wr_idx = FIFO_SIZE - 2; // 62 + ff->rd_idx = 0; + tu_fifo_advance_write_pointer(ff, 10); // 62 + 10 = 72 within window + TEST_ASSERT_EQUAL(72, ff->wr_idx); + TEST_ASSERT_EQUAL(FIFO_SIZE, tu_fifo_count(ff)); + + // advance past the unused index space (beyond 2*depth) + ff->wr_idx = (uint16_t)(2 * FIFO_SIZE - 3); // 125 + ff->rd_idx = 0; + tu_fifo_advance_write_pointer(ff, 6); // forces wrap across unused space + TEST_ASSERT_EQUAL(3, ff->wr_idx); + TEST_ASSERT_EQUAL(3, tu_fifo_count(ff)); +} + +void test_advance_read_pointer_cases(void) { + tu_fifo_clear(ff); + + ff->wr_idx = 6; + tu_fifo_advance_read_pointer(ff, 3); + TEST_ASSERT_EQUAL(3, ff->rd_idx); + TEST_ASSERT_EQUAL(3, tu_fifo_count(ff)); + + ff->wr_idx = FIFO_SIZE + 10; // 74 + ff->rd_idx = FIFO_SIZE - 10; // 54 + tu_fifo_advance_read_pointer(ff, 20); // move to match write index within window + TEST_ASSERT_EQUAL(74, ff->rd_idx); + TEST_ASSERT_EQUAL(0, tu_fifo_count(ff)); + + ff->wr_idx = 9; + ff->rd_idx = (uint16_t)(2 * FIFO_SIZE - 1); // 127 + tu_fifo_advance_read_pointer(ff, 6); // crosses unused index space + TEST_ASSERT_EQUAL(5, ff->rd_idx); + TEST_ASSERT_EQUAL(4, tu_fifo_count(ff)); +} + +void test_write_n_fixed_addr_rw32_nowrap(void) { + tu_fifo_clear(ff); + + volatile uint32_t reg = 0x11223344; + uint8_t expected[8] = {0x44, 0x33, 0x22, 0x11, 0x44, 0x33, 0x22, 0x11}; + + for (uint8_t n = 1; n <= 8; n++) { + tu_fifo_clear(ff); + uint16_t written = tu_fifo_write_n_access_mode(ff, (const void *)®, n, TU_FIFO_FIXED_ADDR_RW32); + TEST_ASSERT_EQUAL(n, written); + TEST_ASSERT_EQUAL(n, tu_fifo_count(ff)); + + uint8_t out[8] = {0}; + tu_fifo_read_n(ff, out, n); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, out, n); + } +} + +void test_write_n_fixed_addr_rw32_wrapped(void) { + tu_fifo_clear(ff); + + volatile uint32_t reg = 0xA1B2C3D4; + uint8_t expected[8] = {0xD4, 0xC3, 0xB2, 0xA1, 0xD4, 0xC3, 0xB2, 0xA1}; + + for (uint8_t n = 1; n <= 8; n++) { + tu_fifo_clear(ff); + // Position the fifo near the end so writes wrap + ff->wr_idx = FIFO_SIZE - 3; + ff->rd_idx = FIFO_SIZE - 3; + + uint16_t written = tu_fifo_write_n_access_mode(ff, (const void *)®, n, TU_FIFO_FIXED_ADDR_RW32); + TEST_ASSERT_EQUAL(n, written); + TEST_ASSERT_EQUAL(n, tu_fifo_count(ff)); + + uint8_t out[8] = {0}; + tu_fifo_read_n(ff, out, n); + TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, out, n); + } +} + +void test_read_n_fixed_addr_rw32_nowrap(void) { + uint8_t pattern[8] = {0x10, 0x21, 0x32, 0x43, 0x54, 0x65, 0x76, 0x87}; + uint32_t reg_expected[8] = { + 0x00000010, 0x00002110, 0x00322110, 0x43322110, 0x00000054, 0x00006554, 0x00766554, 0x87766554}; + + for (uint8_t n = 1; n <= 8; n++) { + tu_fifo_clear(ff); + tu_fifo_write_n(ff, pattern, 8); + + uint32_t reg = 0; + uint16_t read_cnt = tu_fifo_read_n_access_mode(ff, ®, n, TU_FIFO_FIXED_ADDR_RW32); + TEST_ASSERT_EQUAL(n, read_cnt); + TEST_ASSERT_EQUAL(8 - n, tu_fifo_count(ff)); + + TEST_ASSERT_EQUAL_HEX32(reg_expected[n - 1], reg); + } +} + +void test_read_n_fixed_addr_rw32_wrapped(void) { + uint8_t pattern[8] = {0xF0, 0xE1, 0xD2, 0xC3, 0xB4, 0xA5, 0x96, 0x87}; + uint32_t reg_expected[8] = { + 0x000000F0, 0x0000E1F0, 0x00D2E1F0, 0xC3D2E1F0, 0x000000B4, 0x0000A5B4, 0x0096A5B4, 0x8796A5B4}; + + for (uint8_t n = 1; n <= 8; n++) { + tu_fifo_clear(ff); + ff->rd_idx = FIFO_SIZE - 2; + ff->wr_idx = (uint16_t)(ff->rd_idx + n); + + for (uint8_t i = 0; i < n; i++) { + uint8_t idx = (uint8_t)((ff->rd_idx + i) % FIFO_SIZE); + ff->buffer[idx] = pattern[i]; + } + + uint32_t reg = 0; + uint16_t read_cnt = tu_fifo_read_n_access_mode(ff, ®, n, TU_FIFO_FIXED_ADDR_RW32); + TEST_ASSERT_EQUAL(n, read_cnt); + TEST_ASSERT_EQUAL(0, tu_fifo_count(ff)); + + TEST_ASSERT_EQUAL_HEX32(reg_expected[n - 1], reg); + } +} + +void test_get_read_info_advanced_cases(void) { + tu_fifo_clear(ff); + + ff->wr_idx = 20; + ff->rd_idx = 2; + tu_fifo_get_read_info(ff, &info); + TEST_ASSERT_EQUAL(18, info.linear.len); + TEST_ASSERT_EQUAL(0, info.wrapped.len); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 2, info.linear.ptr); + TEST_ASSERT_NULL(info.wrapped.ptr); + + ff->wr_idx = 68; // ptr = 4 + ff->rd_idx = 56; // ptr = 56 + tu_fifo_get_read_info(ff, &info); + TEST_ASSERT_EQUAL(8, info.linear.len); + TEST_ASSERT_EQUAL(4, info.wrapped.len); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 56, info.linear.ptr); + TEST_ASSERT_EQUAL_PTR(ff->buffer, info.wrapped.ptr); +} + +void test_get_write_info_advanced_cases(void) { + tu_fifo_clear(ff); + + ff->wr_idx = 10; + ff->rd_idx = 104; // ptr = 40 + tu_fifo_get_write_info(ff, &info); + TEST_ASSERT_EQUAL(30, info.linear.len); + TEST_ASSERT_EQUAL(0, info.wrapped.len); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 10, info.linear.ptr); + TEST_ASSERT_NULL(info.wrapped.ptr); + + ff->wr_idx = 60; + ff->rd_idx = 20; + tu_fifo_get_write_info(ff, &info); + TEST_ASSERT_EQUAL(4, info.linear.len); + TEST_ASSERT_EQUAL(20, info.wrapped.len); + TEST_ASSERT_EQUAL_PTR(ff->buffer + 60, info.linear.ptr); + TEST_ASSERT_EQUAL_PTR(ff->buffer, info.wrapped.ptr); +} + +void test_correct_read_pointer_cases(void) { + tu_fifo_clear(ff); + + // wr beyond depth: rd should be wr - depth + ff->wr_idx = FIFO_SIZE + 6; // 70 + tu_fifo_correct_read_pointer(ff); + TEST_ASSERT_EQUAL(6, ff->rd_idx); + + // wr exactly at depth: rd should wrap to zero + ff->wr_idx = FIFO_SIZE; + tu_fifo_correct_read_pointer(ff); + TEST_ASSERT_EQUAL(0, ff->rd_idx); + + // wr below depth: rd should be wr + depth + ff->wr_idx = 10; + tu_fifo_correct_read_pointer(ff); + TEST_ASSERT_EQUAL(FIFO_SIZE + 10, ff->rd_idx); +} diff --git a/tools/get_deps.py b/tools/get_deps.py index 35f3b3e92..d749e4c84 100755 --- a/tools/get_deps.py +++ b/tools/get_deps.py @@ -246,7 +246,7 @@ deps_optional = { 'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x ' 'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 ' 'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 ' - 'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba' + 'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba ' 'sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg ' 'tm4c '], 'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git', @@ -343,7 +343,7 @@ def main(): for f in families: for d in deps_optional: - if d not in deps and f in deps_optional[d][2]: + if d not in deps and f in deps_optional[d][2].split(): deps.append(d) if print_only: |