- spelling fixes to pass ci

- added mca156 the list in boards.rst.
-  Fixup to family.cmake for mcxa156 to pass ci

4 files changed, 17 insertions, 16 deletions

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index 4739467bc..5786b2182 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -165,6 +165,7 @@ lpcxpresso55s28     LPCXpresso55s28                            lpc55          ht
 lpcxpresso55s69     LPCXpresso55s69                            lpc55          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso55s69-development-board:LPC55S69-EVK
 mcu_link            MCU Link                                   lpc55          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcu-link-debug-probe:MCU-LINK
 frdm_mcxa153        Freedom MCXA153                            mcx            https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA153
+frdm_mcxa156        Freedom MCXA156                            mcx            https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA156
 frdm_mcxn947        Freedom MCXN947                            mcx            https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXN947
 mcxn947brk          MCXN947 Breakout                           mcx            n/a
 ==================  =========================================  =============  =========================================================================================================================================================================  ======
diff --git a/hw/bsp/mcx/drivers/spc/fsl_spc.c b/hw/bsp/mcx/drivers/spc/fsl_spc.c
index c6a9b2932..b39a406cb 100644
--- a/hw/bsp/mcx/drivers/spc/fsl_spc.c
+++ b/hw/bsp/mcx/drivers/spc/fsl_spc.c
@@ -161,7 +161,7 @@ void SPC_SetSRAMOperateVoltage(SPC_Type *base, const spc_sram_voltage_config_t *
  * @note To disable bandgap in Active mode:
  *          1. Disable all LVD's and HVD's in active mode;
  *          2. Disable Glitch detect;
- *          3. Configrue LDO's and DCDC to low drive strength in active mode;
+ *          3. Configure LDO's and DCDC to low drive strength in active mode;
  *          4. Invoke this function to disable bandgap in active mode;
  *      otherwise the error status will be reported.
  *
@@ -1115,7 +1115,7 @@ status_t SPC_SetActiveModeSystemLDORegulatorConfig(SPC_Type *base, const spc_act
         return kStatus_SPC_BandgapModeWrong;
     }
 
-    /* 3. Must disable system LDO high voltage detector before specifing overdrive voltage. */
+    /* 3. Must disable system LDO high voltage detector before specifying overdrive voltage. */
     if ((option->SysLDOVoltage == kSPC_SysLDO_OverDriveVoltage) &&
         ((SPC_GetActiveModeVoltageDetectStatus(base) & SPC_ACTIVE_CFG_SYS_HVDE_MASK) != 0UL))
     {
@@ -1138,14 +1138,14 @@ status_t SPC_SetActiveModeSystemLDORegulatorConfig(SPC_Type *base, const spc_act
  * param voltageLevel Specify the voltage level of System LDO Regulator in Active mode.
  *
  * retval #kStatus_Success Set System LDO Regulator voltage level in Active mode successfully.
- * retval #kStatus_SPC_SYSLDOOverDriveVoltageFail Must disable system LDO high voltage detector before specifing
+ * retval #kStatus_SPC_SYSLDOOverDriveVoltageFail Must disable system LDO high voltage detector before specifying
  * overdrive voltage.
  */
 status_t SPC_SetActiveModeSystemLDORegulatorVoltageLevel(SPC_Type *base, spc_sys_ldo_voltage_level_t voltageLevel)
 {
     if (voltageLevel == kSPC_SysLDO_OverDriveVoltage)
     {
-        /* Must disable system LDO high voltage detector before specifing overdrive voltage. */
+        /* Must disable system LDO high voltage detector before specifying overdrive voltage. */
         if ((SPC_GetActiveModeVoltageDetectStatus(base) & SPC_ACTIVE_CFG_SYS_HVDE_MASK) != 0UL)
         {
             return kStatus_SPC_SYSLDOOverDriveVoltageFail;
@@ -1490,7 +1490,7 @@ void SPC_SetDCDCRefreshCount(SPC_Type *base, uint16_t count)
  *
  *
  * @note Some hardware restrictions not covered, application should be aware of this and follow this hardware
- * restrictions otherwise some unkown issue may occur:
+ * restrictions otherwise some unknown issue may occur:
  *        1. If Core LDO's drive strength are set to same value in both Active mode and low power mode,
  *          the voltage level should also set to same value.
  *        2. When switching Core LDO's drive strength from low to normal, ensure the LDO_CORE high voltage level is set
@@ -1538,7 +1538,7 @@ status_t SPC_SetActiveModeRegulatorsConfig(SPC_Type *base, const spc_active_mode
     }
 
 #if (defined(FSL_FEATURE_MCX_SPC_HAS_SYS_LDO) && FSL_FEATURE_MCX_SPC_HAS_SYS_LDO)
-    /*  2. Must disable system LDO high voltage detector before specifing SysLDO to overdrive voltage  */
+    /*  2. Must disable system LDO high voltage detector before specifying SysLDO to overdrive voltage  */
     if (((activeModeVDValue & SPC_ACTIVE_CFG_SYS_HVDE_MASK) != 0UL) &&
         (config->SysLDOOption.SysLDOVoltage == kSPC_SysLDO_OverDriveVoltage))
     {
diff --git a/hw/bsp/mcx/drivers/spc/fsl_spc.h b/hw/bsp/mcx/drivers/spc/fsl_spc.h
index 52cb71c24..d3e75fbcb 100644
--- a/hw/bsp/mcx/drivers/spc/fsl_spc.h
+++ b/hw/bsp/mcx/drivers/spc/fsl_spc.h
@@ -128,7 +128,7 @@ enum _spc_analog_module_control
 };
 
 /*!
- * @brief The enumeration of spc power domain, the connected power domain is chip specfic, please refer to chip's RM
+ * @brief The enumeration of spc power domain, the connected power domain is chip specific, please refer to chip's RM
  * for details.
  */
 typedef enum _spc_power_domain_id
@@ -153,8 +153,8 @@ typedef enum _spc_power_domain_low_power_mode
  */
 typedef enum _spc_lowPower_request_pin_polarity
 {
-    kSPC_HighTruePolarity = 0x0U, /*!< Control the High Polarity of the Low Power Reqest Pin. */
-    kSPC_LowTruePolarity  = 0x1U, /*!< Control the Low Polarity of the Low Power Reqest Pin. */
+    kSPC_HighTruePolarity = 0x0U, /*!< Control the High Polarity of the Low Power Request Pin. */
+    kSPC_LowTruePolarity  = 0x1U, /*!< Control the Low Polarity of the Low Power Request Pin. */
 } spc_lowpower_request_pin_polarity_t;
 
 /*!
@@ -197,7 +197,7 @@ typedef enum _spc_dcdc_voltage_level
 /*!
  * @brief DCDC regulator Drive Strength enumeration in Active mode or Low Power Mode.
  *
- * @note Different drive strength differ in these DCDC characterstics:
+ * @note Different drive strength differ in these DCDC characteristics:
  *              Maximum load current
  *              Quiescent current
  *              Transient response.
@@ -901,7 +901,7 @@ static inline uint32_t SPC_GetActiveModeVoltageDetectStatus(SPC_Type *base)
  * @note To disable bandgap in Active mode:
  *          1. Disable all LVD's and HVD's in active mode;
  *          2. Disable Glitch detect;
- *          3. Configrue LDO's and DCDC to low drive strength in active mode;
+ *          3. Configure LDO's and DCDC to low drive strength in active mode;
  *          4. Invoke this function to disable bandgap in active mode;
  *      otherwise the error status will be reported.
  *
@@ -962,7 +962,7 @@ static inline void SPC_SetActiveModeVoltageTrimDelay(SPC_Type *base, uint16_t de
  *
  *
  * @note Some hardware restrictions not covered, application should be aware of this and follow this hardware
- * restrictions otherwise some unkown issue may occur:
+ * restrictions otherwise some unknown issue may occur:
  *        1. If Core LDO's drive strength are set to same value in both Active mode and low power mode,
  *          the voltage level should also set to same value.
  *        2. When switching Core LDO's drive strength from low to normal, ensure the LDO_CORE high voltage level is set
@@ -1275,7 +1275,7 @@ static inline void SPC_SetLowPowerWakeUpDelay(SPC_Type *base, uint16_t delay)
  * parameters do not satisfy hardware restrictions the specific error will be reported.
  *
  * @note Some hardware restrictions not covered, application should be aware of this and follow this hardware
- * restrictions otherwise some unkown issue may occur:
+ * restrictions otherwise some unknown issue may occur:
  *        1. If Core LDO's drive strength are set to same value in both Active mode and low power mode,
  *          the voltage level should also set to same value.
  *        2. When switching Core LDO's drive strength from low to normal, ensure the LDO_CORE high voltage level is set
@@ -2084,7 +2084,7 @@ status_t SPC_SetActiveModeSystemLDORegulatorConfig(SPC_Type *base, const spc_act
  * @param voltageLevel Specify the voltage level of System LDO Regulator in Active mode.
  *
  * @retval #kStatus_Success Set System LDO Regulator voltage level in Active mode successfully.
- * @retval #kStatus_SPC_SYSLDOOverDriveVoltageFail Must disable system LDO high voltage detector before specifing
+ * @retval #kStatus_SPC_SYSLDOOverDriveVoltageFail Must disable system LDO high voltage detector before specifying
  * overdrive voltage.
  */
 status_t SPC_SetActiveModeSystemLDORegulatorVoltageLevel(SPC_Type *base, spc_sys_ldo_voltage_level_t voltageLevel);
@@ -2229,7 +2229,7 @@ static inline void SPC_TriggerDCDCBurstRequest(SPC_Type *base)
 }
 
 /*!
- * @brief Check if burst acknowlege flag is asserted.
+ * @brief Check if burst acknowledge flag is asserted.
  *
  * @param base SPC peripheral base address.
  *
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 305497b79..f857ed31a 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -11,7 +11,7 @@ if (MCU_VARIANT STREQUAL "MCXA153")
   set(CMAKE_SYSTEM_CPU cortex-m33-nodsp-nofp CACHE INTERNAL "System Processor")
   set(FAMILY_MCUS MCXA15 CACHE INTERNAL "")
 elseif (MCU_VARIANT STREQUAL "MCXA156")
-    set(CMAKE_SYSTEM_PROCESSOR cortex-m33 CACHE INTERNAL "System Processor")
+    set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")
     set(FAMILY_MCUS MCXA15 CACHE INTERNAL "")
 elseif (MCU_VARIANT STREQUAL "MCXN947")
   set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")