Merge branch 'master' into fork/HiFiPhile/async_io

17 files changed, 2375 insertions, 1208 deletions

diff --git a/CONTRIBUTORS.rst b/CONTRIBUTORS.rst
index 085f8082a..451ac0783 100644
--- a/CONTRIBUTORS.rst
+++ b/CONTRIBUTORS.rst
@@ -31,6 +31,13 @@ Notable contributors
 -  Most features development
 
 
+`Heiko Kuester <https://github.com/IngHK>`__
+--------------------------------------------
+
+-  Add CH34x and PL2303 support (CDC host)
+-  Improve FTDI and CP210x support (CDC host)
+
+
 `Hristo Gochkov <https://github.com/me-no-dev>`__
 -------------------------------------------------
 
diff --git a/README.rst b/README.rst
index f4dfb0831..b873bc42b 100644
--- a/README.rst
+++ b/README.rst
@@ -74,7 +74,7 @@ Host Stack
 - Human Interface Device (HID): Keyboard, Mouse, Generic
 - Mass Storage Class (MSC)
 - Communication Device Class: CDC-ACM
-- Vendor serial over USB: FTDI, CP210x, CH34x
+- Vendor serial over USB: FTDI, CP210x, CH34x, PL2303
 - Hub with multiple-level support
 
 Similar to the Device Stack, if you have a special requirement, ``usbh_app_driver_get_cb()`` can be used to write your own class driver without modifying the stack.
diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index e68ec383b..2fa9a8560 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -31,8 +31,7 @@ static size_t get_console_inputs(uint8_t* buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
     int ch = board_getchar();
-    if (ch <= 0) break;
-
+    if (ch <= 0) { break; }
     buf[count] = (uint8_t) ch;
     count++;
   }
@@ -69,10 +68,12 @@ void tuh_cdc_rx_cb(uint8_t idx) {
   uint32_t const bufsize = sizeof(buf) - 1;
 
   // forward cdc interfaces -> console
-  uint32_t count = tuh_cdc_read(idx, buf, bufsize);
-  buf[count] = 0;
-
-  printf("%s", (char*) buf);
+  const uint32_t count = tuh_cdc_read(idx, buf, bufsize);
+  if (count) {
+    buf[count] = 0;
+    printf("%s", (char*) buf);
+    fflush(stdout);
+  }
 }
 
 // Invoked when a device with CDC interface is mounted
@@ -88,7 +89,7 @@ void tuh_cdc_mount_cb(uint8_t idx) {
   // If CFG_TUH_CDC_LINE_CODING_ON_ENUM is defined, line coding will be set by tinyusb stack
   // while eneumerating new cdc device
   cdc_line_coding_t line_coding = {0};
-  if (tuh_cdc_get_local_line_coding(idx, &line_coding)) {
+  if (tuh_cdc_get_line_coding_local(idx, &line_coding)) {
     printf("  Baudrate: %" PRIu32 ", Stop Bits : %u\r\n", line_coding.bit_rate, line_coding.stop_bits);
     printf("  Parity  : %u, Data Width: %u\r\n", line_coding.parity, line_coding.data_bits);
   }
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index cc8d6e5c4..2f8cb5e03 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -103,10 +103,11 @@
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
-#define CFG_TUH_CDC                 1 // CDC ACM
+#define CFG_TUH_CDC                 2 // number of supported CDC devices. also activates CDC ACM
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_PL2303          1 // PL2303 Serial. PL2303 is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
@@ -122,7 +123,7 @@
 
 // Set Line Control state on enumeration/mounted:
 // DTR ( bit 0), RTS (bit 1)
-#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    0x03
+#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    (CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS)
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
 // bit rate = 115200, 1 stop bit, no parity, 8 bit data width
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
index 682265f59..bc8887211 100644
--- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -108,10 +108,11 @@
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
-#define CFG_TUH_CDC                 1 // CDC ACM
+#define CFG_TUH_CDC                 1 // number of supported CDC devices. also activates CDC ACM
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_PL2303          1 // PL2303 Serial. PL2303 is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
@@ -127,7 +128,7 @@
 
 // Set Line Control state on enumeration/mounted:
 // DTR ( bit 0), RTS (bit 1)
-#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    0x03
+#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    (CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS)
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
 // bit rate = 115200, 1 stop bit, no parity, 8 bit data width
diff --git a/src/class/audio/audio_device.c b/src/class/audio/audio_device.c
index 11a3d4a73..a877dc900 100644
--- a/src/class/audio/audio_device.c
+++ b/src/class/audio/audio_device.c
@@ -1003,20 +1003,22 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
                 ep_fb = desc_ep->bEndpointAddress;
               }
   #endif
-              // Data EP
-              if (desc_ep->bmAttributes.usage == 0) {
-                if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
   #if CFG_TUD_AUDIO_ENABLE_EP_IN
-                  ep_in = desc_ep->bEndpointAddress;
-                  ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
+              // Data or data with implicit feedback IN EP
+              if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN
+                  && (desc_ep->bmAttributes.usage == 0 || desc_ep->bmAttributes.usage == 2)) {
+                ep_in = desc_ep->bEndpointAddress;
+                ep_in_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_in_size);
+              }
   #endif
-                } else {
   #if CFG_TUD_AUDIO_ENABLE_EP_OUT
-                  ep_out = desc_ep->bEndpointAddress;
-                  ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
-  #endif
-                }
+              // Data OUT EP
+              if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_OUT
+                  && desc_ep->bmAttributes.usage == 0) {
+                ep_out = desc_ep->bEndpointAddress;
+                ep_out_size = TU_MAX(tu_edpt_packet_size(desc_ep), ep_out_size);
               }
+  #endif
             }
           }
 
@@ -1052,10 +1054,10 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
           if (tu_desc_type(p_desc) == TUSB_DESC_ENDPOINT) {
             tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
             if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) {
-              if (desc_ep->bmAttributes.usage == 0) {
-                if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
-                  _audiod_fct[i].interval_tx = desc_ep->bInterval;
-                }
+              // For data or data with implicit feedback IN EP
+              if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN
+                  && (desc_ep->bmAttributes.usage == 0 || desc_ep->bmAttributes.usage == 2)) {
+                _audiod_fct[i].interval_tx = desc_ep->bInterval;
               }
             }
           } else if (tu_desc_type(p_desc) == TUSB_DESC_CS_INTERFACE && tu_desc_subtype(p_desc) == AUDIO_CS_AC_INTERFACE_OUTPUT_TERMINAL) {
@@ -1227,7 +1229,8 @@ static bool audiod_set_interface(uint8_t rhport, tusb_control_request_t const *p
           usbd_edpt_clear_stall(rhport, ep_addr);
 
 #if CFG_TUD_AUDIO_ENABLE_EP_IN
-          if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && desc_ep->bmAttributes.usage == 0x00)// Check if usage is data EP
+          // For data or data with implicit feedback IN EP
+          if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN && (desc_ep->bmAttributes.usage == 0 || desc_ep->bmAttributes.usage == 2))
           {
             // Save address
             audio->ep_in = ep_addr;
diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h
index 5cbd658fe..9f3ace63c 100644
--- a/src/class/cdc/cdc.h
+++ b/src/class/cdc/cdc.h
@@ -192,6 +192,11 @@ typedef enum {
   CDC_LINE_CODING_STOP_BITS_2   = 2, // 2   bits
 } cdc_line_coding_stopbits_t;
 
+#define CDC_LINE_CODING_STOP_BITS_TEXT(STOP_BITS) (        \
+  STOP_BITS == CDC_LINE_CODING_STOP_BITS_1 ?   "1" :       \
+  STOP_BITS == CDC_LINE_CODING_STOP_BITS_1_5 ? "1.5" :     \
+  STOP_BITS == CDC_LINE_CODING_STOP_BITS_2 ?   "2"   : "?" )
+
 // TODO Backward compatible for typos. Maybe removed in the future release
 #define CDC_LINE_CONDING_STOP_BITS_1   CDC_LINE_CODING_STOP_BITS_1
 #define CDC_LINE_CONDING_STOP_BITS_1_5 CDC_LINE_CODING_STOP_BITS_1_5
@@ -205,6 +210,13 @@ typedef enum {
   CDC_LINE_CODING_PARITY_SPACE = 4,
 } cdc_line_coding_parity_t;
 
+#define CDC_LINE_CODING_PARITY_CHAR(PARITY) (        \
+  PARITY == CDC_LINE_CODING_PARITY_NONE  ? 'N' :     \
+  PARITY == CDC_LINE_CODING_PARITY_ODD   ? 'O' :     \
+  PARITY == CDC_LINE_CODING_PARITY_EVEN  ? 'E' :     \
+  PARITY == CDC_LINE_CODING_PARITY_MARK  ? 'M' :     \
+  PARITY == CDC_LINE_CODING_PARITY_SPACE ? 'S' : '?' )
+
 //--------------------------------------------------------------------+
 // Management Element Notification (Notification Endpoint)
 //--------------------------------------------------------------------+
@@ -392,8 +404,7 @@ static inline uint8_t cdc_functional_desc_typeof(uint8_t const * p_desc)
 //--------------------------------------------------------------------+
 // Requests
 //--------------------------------------------------------------------+
-typedef struct TU_ATTR_PACKED
-{
+typedef struct TU_ATTR_PACKED {
   uint32_t bit_rate;
   uint8_t  stop_bits; ///< 0: 1 stop bit - 1: 1.5 stop bits - 2: 2 stop bits
   uint8_t  parity;    ///< 0: None - 1: Odd - 2: Even - 3: Mark - 4: Space
@@ -402,15 +413,16 @@ typedef struct TU_ATTR_PACKED
 
 TU_VERIFY_STATIC(sizeof(cdc_line_coding_t) == 7, "size is not correct");
 
-typedef struct TU_ATTR_PACKED
-{
-  uint16_t dtr : 1;
-  uint16_t rts : 1;
-  uint16_t : 6;
-  uint16_t : 8;
+typedef union TU_ATTR_PACKED {
+  struct {
+    uint8_t dtr : 1;
+    uint8_t rts : 1;
+    uint8_t     : 6;
+  };
+  uint8_t value;
 } cdc_line_control_state_t;
 
-TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 2, "size is not correct");
+TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 1, "size is not correct");
 
 TU_ATTR_PACKED_END  // End of all packed definitions
 TU_ATTR_BIT_FIELD_ORDER_END
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index bf245db3f..f4567fac4 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -24,7 +24,7 @@
  * This file is part of the TinyUSB stack.
  *
  * Contribution
- * - Heiko Kuester: CH34x support
+ * - Heiko Kuester: add support of CH34x & PL2303, improve support of FTDI & CP210x
  */
 
 #include "tusb_option.h"
@@ -35,13 +35,19 @@
 #include "host/usbh_pvt.h"
 
 #include "cdc_host.h"
+#include "serial/ftdi_sio.h"
+#include "serial/cp210x.h"
+#include "serial/ch34x.h"
+#include "serial/pl2303.h"
 
 // Level where CFG_TUSB_DEBUG must be at least for this driver is logged
 #ifndef CFG_TUH_CDC_LOG_LEVEL
-  #define CFG_TUH_CDC_LOG_LEVEL   CFG_TUH_LOG_LEVEL
+  #define CFG_TUH_CDC_LOG_LEVEL   2
 #endif
 
-#define TU_LOG_DRV(...)   TU_LOG(CFG_TUH_CDC_LOG_LEVEL, __VA_ARGS__)
+#define TU_LOG_DRV(...)                 TU_LOG(CFG_TUH_CDC_LOG_LEVEL, __VA_ARGS__)
+#define TU_LOG_CDC(_cdc, _format, ...)  TU_LOG_DRV("[:%u:%u] CDCh %s " _format "\r\n", _cdc->daddr, _cdc->bInterfaceNumber, \
+                                                    serial_drivers[_cdc->serial_drid].name, ##__VA_ARGS__)
 
 //--------------------------------------------------------------------+
 // Host CDC Interface
@@ -56,30 +62,40 @@ typedef struct {
   uint8_t ep_notif;
   uint8_t serial_drid; // Serial Driver ID
   bool mounted;        // Enumeration is complete
-  cdc_acm_capability_t acm_capability;
 
-  TU_ATTR_ALIGNED(4) cdc_line_coding_t line_coding; // Baudrate, stop bits, parity, data width
-  uint8_t line_state;                               // DTR (bit0), RTS (bit1)
+  struct {
+    TU_ATTR_ALIGNED(4) cdc_line_coding_t coding; // Baudrate, stop bits, parity, data width
+    cdc_line_control_state_t control_state;      // DTR, RTS
+  } line, requested_line;
 
-  #if CFG_TUH_CDC_FTDI || CFG_TUH_CDC_CP210X || CFG_TUH_CDC_CH34X
-  cdc_line_coding_t requested_line_coding;
-  // 1 byte padding
-  #endif
+  tuh_xfer_cb_t user_complete_cb; // required since we handle request internally first
 
-  tuh_xfer_cb_t user_control_cb;
+  union {
+    struct {
+      cdc_acm_capability_t capability;
+    } acm;
+
+    #if CFG_TUH_CDC_FTDI
+    ftdi_private_t ftdi;
+    #endif
+
+    #if CFG_TUH_CDC_PL2303
+    pl2303_private_t pl2303;
+    #endif
+  };
 
   struct {
     tu_edpt_stream_t tx;
     tu_edpt_stream_t rx;
 
     uint8_t tx_ff_buf[CFG_TUH_CDC_TX_BUFSIZE];
-    uint8_t rx_ff_buf[CFG_TUH_CDC_TX_BUFSIZE];
+    uint8_t rx_ff_buf[CFG_TUH_CDC_RX_BUFSIZE];
   } stream;
 } cdch_interface_t;
 
 typedef struct {
   TUH_EPBUF_DEF(tx, CFG_TUH_CDC_TX_EPSIZE);
-  TUH_EPBUF_DEF(rx, CFG_TUH_CDC_TX_EPSIZE);
+  TUH_EPBUF_DEF(rx, CFG_TUH_CDC_RX_EPSIZE);
 } cdch_epbuf_t;
 
 static cdch_interface_t cdch_data[CFG_TUH_CDC];
@@ -89,58 +105,70 @@ CFG_TUH_MEM_SECTION static cdch_epbuf_t cdch_epbuf[CFG_TUH_CDC];
 // Serial Driver
 //--------------------------------------------------------------------+
 
+// General driver
+static void cdch_process_set_config(tuh_xfer_t *xfer);
+static void cdch_process_line_state_on_enum(tuh_xfer_t *xfer); // invoked after set config is processed
+static void cdch_internal_control_complete(tuh_xfer_t *xfer);
+static void cdch_set_line_coding_stage1_baudrate_complete(tuh_xfer_t *xfer);
+static void cdch_set_line_coding_stage2_data_format_complete(tuh_xfer_t *xfer);
+
 //------------- ACM prototypes -------------//
-static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
-static void acm_process_config(tuh_xfer_t* xfer);
+static bool acm_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+static bool acm_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
+static void acm_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
 
-static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool acm_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool acm_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool acm_set_control_line_state(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
 //------------- FTDI prototypes -------------//
 #if CFG_TUH_CDC_FTDI
-#include "serial/ftdi_sio.h"
-
 static uint16_t const ftdi_vid_pid_list[][2] = {CFG_TUH_CDC_FTDI_VID_PID_LIST};
+static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t * itf_desc, uint16_t max_len);
+static bool ftdi_proccess_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
+static void ftdi_internal_control_complete(cdch_interface_t* p_cdc, tuh_xfer_t *xfer);
 
-static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
-static void ftdi_process_config(tuh_xfer_t* xfer);
-
-static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool ftdi_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool ftdi_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ftdi_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ftdi_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ftdi_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 #endif
 
 //------------- CP210X prototypes -------------//
 #if CFG_TUH_CDC_CP210X
-#include "serial/cp210x.h"
-
 static uint16_t const cp210x_vid_pid_list[][2] = {CFG_TUH_CDC_CP210X_VID_PID_LIST};
 
-static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len);
-static void cp210x_process_config(tuh_xfer_t* xfer);
+static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+static bool cp210x_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
+static void cp210x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
 
-static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool cp210x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool cp210x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool cp210x_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool cp210x_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool cp210x_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 #endif
 
 //------------- CH34x prototypes -------------//
 #if CFG_TUH_CDC_CH34X
-#include "serial/ch34x.h"
-
 static uint16_t const ch34x_vid_pid_list[][2] = {CFG_TUH_CDC_CH34X_VID_PID_LIST};
 
-static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uint16_t max_len);
-static void ch34x_process_config(tuh_xfer_t* xfer);
+static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+static bool ch34x_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
+static void ch34x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
 
-static bool ch34x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool ch34x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool ch34x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool ch34x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ch34x_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ch34x_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool ch34x_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+#endif
+
+//------------- PL2303 prototypes -------------//
+#if CFG_TUH_CDC_PL2303
+static uint16_t const pl2303_vid_pid_list[][2] = {CFG_TUH_CDC_PL2303_VID_PID_LIST};
+static const pl2303_type_data_t pl2303_type_data[PL2303_TYPE_COUNT] = {PL2303_TYPE_DATA};
+
+static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+static bool pl2303_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
+static void pl2303_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer);
+
+static bool pl2303_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool pl2303_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 #endif
 
 //------------- Common -------------//
@@ -159,31 +187,48 @@ enum {
   SERIAL_DRIVER_CH34X,
 #endif
 
+#if CFG_TUH_CDC_PL2303
+  SERIAL_DRIVER_PL2303,
+#endif
+
   SERIAL_DRIVER_COUNT
 };
 
+typedef bool (*serial_driver_func_t)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
 typedef struct {
   uint16_t const (*vid_pid_list)[2];
   uint16_t const vid_pid_count;
-  bool (*const open)(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len);
-  void (*const process_set_config)(tuh_xfer_t* xfer);
-  bool (*const set_control_line_state)(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-  bool (*const set_baudrate)(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-  bool (*const set_data_format)(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-  bool (*const set_line_coding)(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+  bool (*const open)(uint8_t daddr, const tusb_desc_interface_t * itf_desc, uint16_t max_len);
+  bool (*const process_set_config)(cdch_interface_t * p_cdc, tuh_xfer_t * xfer);
+  void (*const request_complete)(cdch_interface_t * p_cdc, tuh_xfer_t * xfer); // internal request complete handler to update line state
+
+  serial_driver_func_t set_control_line_state, set_baudrate, set_data_format, set_line_coding;
+
+  #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
+  const char * name;
+  #endif
 } cdch_serial_driver_t;
 
+#if CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
+  #define DRIVER_NAME_DECLARE(_str)  .name = _str
+#else
+  #define DRIVER_NAME_DECLARE(_str)
+#endif
+
 // Note driver list must be in the same order as SERIAL_DRIVER enum
 static const cdch_serial_driver_t serial_drivers[] = {
   {
       .vid_pid_list           = NULL,
       .vid_pid_count          = 0,
       .open                   = acm_open,
-      .process_set_config     = acm_process_config,
+      .process_set_config     = acm_process_set_config,
+      .request_complete       = acm_internal_control_complete,
       .set_control_line_state = acm_set_control_line_state,
-      .set_baudrate           = acm_set_baudrate,
-      .set_data_format        = acm_set_data_format,
-      .set_line_coding        = acm_set_line_coding
+      .set_baudrate           = acm_set_line_coding,
+      .set_data_format        = acm_set_line_coding,
+      .set_line_coding        = acm_set_line_coding,
+      DRIVER_NAME_DECLARE("ACM")
   },
 
   #if CFG_TUH_CDC_FTDI
@@ -191,11 +236,13 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = ftdi_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(ftdi_vid_pid_list),
       .open                   = ftdi_open,
-      .process_set_config     = ftdi_process_config,
-      .set_control_line_state = ftdi_sio_set_modem_ctrl,
-      .set_baudrate           = ftdi_sio_set_baudrate,
+      .process_set_config     = ftdi_proccess_set_config,
+      .request_complete       = ftdi_internal_control_complete,
+      .set_control_line_state = ftdi_set_modem_ctrl,
+      .set_baudrate           = ftdi_set_baudrate,
       .set_data_format        = ftdi_set_data_format,
-      .set_line_coding        = ftdi_set_line_coding
+      .set_line_coding        = NULL, // 2 stage set line coding
+      DRIVER_NAME_DECLARE("FTDI")
   },
   #endif
 
@@ -204,11 +251,13 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = cp210x_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(cp210x_vid_pid_list),
       .open                   = cp210x_open,
-      .process_set_config     = cp210x_process_config,
+      .process_set_config     = cp210x_process_set_config,
+      .request_complete       = cp210x_internal_control_complete,
       .set_control_line_state = cp210x_set_modem_ctrl,
       .set_baudrate           = cp210x_set_baudrate,
       .set_data_format        = cp210x_set_data_format,
-      .set_line_coding        = cp210x_set_line_coding
+      .set_line_coding        = NULL, // 2 stage set line coding
+      DRIVER_NAME_DECLARE("CP210x")
   },
   #endif
 
@@ -217,13 +266,31 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = ch34x_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(ch34x_vid_pid_list),
       .open                   = ch34x_open,
-      .process_set_config     = ch34x_process_config,
+      .process_set_config     = ch34x_process_set_config,
+      .request_complete       = ch34x_internal_control_complete,
+
       .set_control_line_state = ch34x_set_modem_ctrl,
       .set_baudrate           = ch34x_set_baudrate,
       .set_data_format        = ch34x_set_data_format,
-      .set_line_coding        = ch34x_set_line_coding
+      .set_line_coding        = NULL, // 2 stage set line coding
+      DRIVER_NAME_DECLARE("CH34x")
   },
   #endif
+
+  #if CFG_TUH_CDC_PL2303
+  {
+      .vid_pid_list           = pl2303_vid_pid_list,
+      .vid_pid_count          = TU_ARRAY_SIZE(pl2303_vid_pid_list),
+      .open                   = pl2303_open,
+      .process_set_config     = pl2303_process_set_config,
+      .request_complete       = pl2303_internal_control_complete,
+      .set_control_line_state = pl2303_set_modem_ctrl,
+      .set_baudrate           = pl2303_set_line_coding,
+      .set_data_format        = pl2303_set_line_coding,
+      .set_line_coding        = pl2303_set_line_coding,
+      DRIVER_NAME_DECLARE("PL2303")
+  }
+  #endif
 };
 
 TU_VERIFY_STATIC(TU_ARRAY_SIZE(serial_drivers) == SERIAL_DRIVER_COUNT, "Serial driver count mismatch");
@@ -232,17 +299,20 @@ TU_VERIFY_STATIC(TU_ARRAY_SIZE(serial_drivers) == SERIAL_DRIVER_COUNT, "Serial d
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
 
-static inline cdch_interface_t* get_itf(uint8_t idx) {
+TU_ATTR_ALWAYS_INLINE static inline cdch_interface_t * get_itf(uint8_t idx) {
   TU_ASSERT(idx < CFG_TUH_CDC, NULL);
-  cdch_interface_t* p_cdc = &cdch_data[idx];
-
+  cdch_interface_t * p_cdc = &cdch_data[idx];
   return (p_cdc->daddr != 0) ? p_cdc : NULL;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline uint8_t get_idx_by_ptr(cdch_interface_t* p_cdc) {
+  return (uint8_t) (p_cdc - cdch_data);
+}
+
 static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) {
   for(uint8_t i=0; i<CFG_TUH_CDC; i++) {
-    cdch_interface_t* p_cdc = &cdch_data[i];
-    if ( (p_cdc->daddr == daddr) &&
+    cdch_interface_t * p_cdc = &cdch_data[i];
+    if ((p_cdc->daddr == daddr) &&
          (ep_addr == p_cdc->ep_notif || ep_addr == p_cdc->stream.rx.ep_addr || ep_addr == p_cdc->stream.tx.ep_addr)) {
       return i;
     }
@@ -251,15 +321,67 @@ static inline uint8_t get_idx_by_ep_addr(uint8_t daddr, uint8_t ep_addr) {
   return TUSB_INDEX_INVALID_8;
 }
 
-static cdch_interface_t* make_new_itf(uint8_t daddr, tusb_desc_interface_t const *itf_desc) {
+// determine the interface from the completed transfer
+static cdch_interface_t* get_itf_by_xfer(const tuh_xfer_t * xfer) {
+  TU_VERIFY(xfer->daddr != 0, NULL);
+  for(uint8_t i=0; i<CFG_TUH_CDC; i++) {
+    cdch_interface_t * p_cdc = &cdch_data[i];
+    if (p_cdc->daddr == xfer->daddr) {
+      switch (p_cdc->serial_drid) {
+        #if CFG_TUH_CDC_CP210X
+        case SERIAL_DRIVER_CP210X:
+        #endif
+        case SERIAL_DRIVER_ACM: {
+          // Driver use wIndex for bInterfaceNumber
+          const uint8_t itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+          if (p_cdc->bInterfaceNumber == itf_num) {
+            return p_cdc;
+          }
+          break;
+        }
+
+        #if CFG_TUH_CDC_FTDI
+        case SERIAL_DRIVER_FTDI: {
+          // FTDI uses wIndex for channel number, if channel is 0 then it is the default channel
+          const uint8_t channel = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+          if (p_cdc->ftdi.channel == 0 || p_cdc->ftdi.channel == channel) {
+            return p_cdc;
+          }
+          break;
+        }
+        #endif
+
+        #if CFG_TUH_CDC_CH34X
+        case SERIAL_DRIVER_CH34X:
+          // ch34x has only one interface
+          return p_cdc;
+        #endif
+
+        #if CFG_TUH_CDC_PL2303
+        case SERIAL_DRIVER_PL2303:
+          // pl2303 has only one interface
+          return p_cdc;
+        #endif
+
+        default:
+          break;
+      }
+    }
+  }
+
+  return NULL;
+}
+
+static cdch_interface_t * make_new_itf(uint8_t daddr, tusb_desc_interface_t const * itf_desc) {
   for(uint8_t i=0; i<CFG_TUH_CDC; i++) {
     if (cdch_data[i].daddr == 0) {
-      cdch_interface_t* p_cdc = &cdch_data[i];
+      cdch_interface_t * p_cdc = &cdch_data[i];
       p_cdc->daddr              = daddr;
       p_cdc->bInterfaceNumber   = itf_desc->bInterfaceNumber;
       p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass;
       p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol;
-      p_cdc->line_state         = 0;
+      p_cdc->line.coding        = (cdc_line_coding_t) { 0, 0, 0, 0 };
+      p_cdc->line.control_state.value = 0;
       return p_cdc;
     }
   }
@@ -267,9 +389,7 @@ static cdch_interface_t* make_new_itf(uint8_t daddr, tusb_desc_interface_t const
   return NULL;
 }
 
-static bool open_ep_stream_pair(cdch_interface_t* p_cdc , tusb_desc_endpoint_t const *desc_ep);
-static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num);
-static void cdch_internal_control_complete(tuh_xfer_t* xfer);
+static bool open_ep_stream_pair(cdch_interface_t * p_cdc , tusb_desc_endpoint_t const *desc_ep);
 
 //--------------------------------------------------------------------+
 // APPLICATION API
@@ -277,21 +397,20 @@ static void cdch_internal_control_complete(tuh_xfer_t* xfer);
 
 uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) {
   for (uint8_t i = 0; i < CFG_TUH_CDC; i++) {
-    const cdch_interface_t* p_cdc = &cdch_data[i];
-    if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i;
+    const cdch_interface_t * p_cdc = &cdch_data[i];
+    if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) { return i; }
   }
-
   return TUSB_INDEX_INVALID_8;
 }
 
-bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t * info) {
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && info);
 
   info->daddr = p_cdc->daddr;
 
-  // re-construct descriptor
-  tusb_desc_interface_t* desc = &info->desc;
+  // re-construct interface descriptor
+  tusb_desc_interface_t * desc = &info->desc;
   desc->bLength            = sizeof(tusb_desc_interface_t);
   desc->bDescriptorType    = TUSB_DESC_INTERFACE;
 
@@ -307,31 +426,22 @@ bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info) {
 }
 
 bool tuh_cdc_mounted(uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
   return p_cdc->mounted;
 }
 
-bool tuh_cdc_get_dtr(uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
-  TU_VERIFY(p_cdc);
-
-  return (p_cdc->line_state & CDC_CONTROL_LINE_STATE_DTR) ? true : false;
-}
-
-bool tuh_cdc_get_rts(uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+bool tuh_cdc_get_control_line_state_local(uint8_t idx, uint16_t* line_state) {
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
-  return (p_cdc->line_state & CDC_CONTROL_LINE_STATE_RTS) ? true : false;
+  *line_state = p_cdc->line.control_state.value;
+  return true;
 }
 
-bool tuh_cdc_get_local_line_coding(uint8_t idx, cdc_line_coding_t* line_coding) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+bool tuh_cdc_get_line_coding_local(uint8_t idx, cdc_line_coding_t * line_coding) {
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
-  *line_coding = p_cdc->line_coding;
-
+  *line_coding = p_cdc->line.coding;
   return true;
 }
 
@@ -339,31 +449,27 @@ bool tuh_cdc_get_local_line_coding(uint8_t idx, cdc_line_coding_t* line_coding)
 // Write
 //--------------------------------------------------------------------+
 
-uint32_t tuh_cdc_write(uint8_t idx, void const* buffer, uint32_t bufsize) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+uint32_t tuh_cdc_write(uint8_t idx, void const * buffer, uint32_t bufsize) {
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   return tu_edpt_stream_write(p_cdc->daddr, &p_cdc->stream.tx, buffer, bufsize);
 }
 
 uint32_t tuh_cdc_write_flush(uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   return tu_edpt_stream_write_xfer(p_cdc->daddr, &p_cdc->stream.tx);
 }
 
 bool tuh_cdc_write_clear(uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   return tu_edpt_stream_clear(&p_cdc->stream.tx);
 }
 
 uint32_t tuh_cdc_write_available(uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   return tu_edpt_stream_write_available(p_cdc->daddr, &p_cdc->stream.tx);
 }
 
@@ -371,29 +477,26 @@ uint32_t tuh_cdc_write_available(uint8_t idx) {
 // Read
 //--------------------------------------------------------------------+
 
-uint32_t tuh_cdc_read (uint8_t idx, void* buffer, uint32_t bufsize) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+uint32_t tuh_cdc_read (uint8_t idx, void * buffer, uint32_t bufsize) {
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   return tu_edpt_stream_read(p_cdc->daddr, &p_cdc->stream.rx, buffer, bufsize);
 }
 
 uint32_t tuh_cdc_read_available(uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   return tu_edpt_stream_read_available(&p_cdc->stream.rx);
 }
 
-bool tuh_cdc_peek(uint8_t idx, uint8_t* ch) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+bool tuh_cdc_peek(uint8_t idx, uint8_t * ch) {
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   return tu_edpt_stream_peek(&p_cdc->stream.rx, ch);
 }
 
 bool tuh_cdc_read_clear (uint8_t idx) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
 
   bool ret = tu_edpt_stream_clear(&p_cdc->stream.rx);
@@ -405,218 +508,115 @@ bool tuh_cdc_read_clear (uint8_t idx) {
 // Control Endpoint API
 //--------------------------------------------------------------------+
 
-static void process_internal_control_complete(tuh_xfer_t* xfer, uint8_t itf_num) {
-  uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t* p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc, );
-  uint16_t const value = tu_le16toh(xfer->setup->wValue);
-
-  if (xfer->result == XFER_RESULT_SUCCESS) {
-    switch (p_cdc->serial_drid) {
-      case SERIAL_DRIVER_ACM:
-        switch (xfer->setup->bRequest) {
-          case CDC_REQUEST_SET_CONTROL_LINE_STATE:
-            p_cdc->line_state = (uint8_t) value;
-            break;
-
-          case CDC_REQUEST_SET_LINE_CODING: {
-            uint16_t const len = tu_min16(sizeof(cdc_line_coding_t), tu_le16toh(xfer->setup->wLength));
-            memcpy(&p_cdc->line_coding, xfer->buffer, len);
-            break;
-          }
-
-          default: break;
-        }
-        break;
-
-      #if CFG_TUH_CDC_FTDI
-      case SERIAL_DRIVER_FTDI:
-        switch (xfer->setup->bRequest) {
-          case FTDI_SIO_MODEM_CTRL:
-            p_cdc->line_state = (uint8_t) value;
-            break;
-
-          case FTDI_SIO_SET_BAUD_RATE:
-            p_cdc->line_coding.bit_rate = p_cdc->requested_line_coding.bit_rate;
-            break;
-
-          default: break;
-        }
-        break;
-      #endif
-
-      #if CFG_TUH_CDC_CP210X
-      case SERIAL_DRIVER_CP210X:
-        switch(xfer->setup->bRequest) {
-          case CP210X_SET_MHS:
-            p_cdc->line_state = (uint8_t) value;
-            break;
-
-          case CP210X_SET_BAUDRATE: {
-            uint32_t baudrate;
-            memcpy(&baudrate, xfer->buffer, sizeof(uint32_t));
-            p_cdc->line_coding.bit_rate = tu_le32toh(baudrate);
-            break;
-          }
-
-          default: break;
-        }
-        break;
-      #endif
-
-      #if CFG_TUH_CDC_CH34X
-      case SERIAL_DRIVER_CH34X:
-        switch (xfer->setup->bRequest) {
-          case CH34X_REQ_WRITE_REG:
-            // register write request
-            switch (value) {
-              case CH34X_REG16_DIVISOR_PRESCALER:
-                // baudrate
-                p_cdc->line_coding.bit_rate = p_cdc->requested_line_coding.bit_rate;
-                break;
-
-              case CH32X_REG16_LCR2_LCR:
-                // data format
-                p_cdc->line_coding.stop_bits = p_cdc->requested_line_coding.stop_bits;
-                p_cdc->line_coding.parity = p_cdc->requested_line_coding.parity;
-                p_cdc->line_coding.data_bits = p_cdc->requested_line_coding.data_bits;
-                break;
-
-              default: break;
-            }
-            break;
-
-          case CH34X_REQ_MODEM_CTRL: {
-            // set modem controls RTS/DTR request. Note: signals are inverted
-            uint16_t const modem_signal = ~value;
-            if (modem_signal & CH34X_BIT_RTS) {
-              p_cdc->line_state |= CDC_CONTROL_LINE_STATE_RTS;
-            } else {
-              p_cdc->line_state &= (uint8_t) ~CDC_CONTROL_LINE_STATE_RTS;
-            }
-
-            if (modem_signal & CH34X_BIT_DTR) {
-              p_cdc->line_state |= CDC_CONTROL_LINE_STATE_DTR;
-            } else {
-              p_cdc->line_state &= (uint8_t) ~CDC_CONTROL_LINE_STATE_DTR;
-            }
-            break;
-          }
-
-          default: break;
-        }
-        break;
-      #endif
-
-      default: break;
-    }
-  }
-
-  xfer->complete_cb = p_cdc->user_control_cb;
-  if (xfer->complete_cb) {
-    xfer->complete_cb(xfer);
-  }
-}
-
-// internal control complete to update state such as line state, encoding
-static void cdch_internal_control_complete(tuh_xfer_t* xfer) {
-  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  process_internal_control_complete(xfer, itf_num);
-}
-
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid];
+  TU_LOG_CDC(p_cdc, "set control line state dtr = %u rts = %u", p_cdc->requested_line.control_state.dtr, p_cdc->requested_line.control_state.rts);
+  const cdch_serial_driver_t * driver = &serial_drivers[p_cdc->serial_drid];
 
-  if (complete_cb) {
-    return driver->set_control_line_state(p_cdc, line_state, complete_cb, user_data);
-  } else {
-    // blocking
-    xfer_result_t result = XFER_RESULT_INVALID;
-    bool ret = driver->set_control_line_state(p_cdc, line_state, complete_cb, (uintptr_t) &result);
-
-    if (user_data) {
-      // user_data is not NULL, return result via user_data
-      *((xfer_result_t*) user_data) = result;
-    }
+  p_cdc->requested_line.control_state.value = (uint8_t) line_state;
+  p_cdc->user_complete_cb = complete_cb;
+  TU_VERIFY(driver->set_control_line_state(p_cdc, complete_cb ? cdch_internal_control_complete : NULL, user_data));
 
-    TU_VERIFY(ret && result == XFER_RESULT_SUCCESS);
-    p_cdc->line_state = (uint8_t) line_state;
-    return true;
+  if (!complete_cb) {
+    // blocking, update line state if request was successful
+    p_cdc->line.control_state.value = (uint8_t) line_state;
   }
+
+  return true;
 }
 
 bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid];
+  TU_LOG_CDC(p_cdc, "set baudrate %lu", baudrate);
+  const cdch_serial_driver_t *driver = &serial_drivers[p_cdc->serial_drid];
 
-  if (complete_cb) {
-    return driver->set_baudrate(p_cdc, baudrate, complete_cb, user_data);
-  } else {
-    // blocking
-    xfer_result_t result = XFER_RESULT_INVALID;
-    bool ret = driver->set_baudrate(p_cdc, baudrate, complete_cb, (uintptr_t) &result);
-
-    if (user_data) {
-      // user_data is not NULL, return result via user_data
-      *((xfer_result_t*) user_data) = result;
-    }
+  p_cdc->requested_line = p_cdc->line; // keep current line coding
+  p_cdc->requested_line.coding.bit_rate = baudrate;
+  p_cdc->user_complete_cb = complete_cb;
+  TU_VERIFY(driver->set_baudrate(p_cdc, complete_cb ? cdch_internal_control_complete : NULL, user_data));
 
-    TU_VERIFY(ret && result == XFER_RESULT_SUCCESS);
-    p_cdc->line_coding.bit_rate = baudrate;
-    return true;
+  if (!complete_cb) {
+    p_cdc->line.coding.bit_rate = baudrate;
   }
+
+  return true;
 }
 
 bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uint8_t data_bits,
                              tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid];
+  TU_LOG_CDC(p_cdc, "set data format %u%c%s",
+               data_bits, CDC_LINE_CODING_PARITY_CHAR(parity),
+               CDC_LINE_CODING_STOP_BITS_TEXT(stop_bits));
+  const cdch_serial_driver_t *driver = &serial_drivers[p_cdc->serial_drid];
 
-  if (complete_cb) {
-    return driver->set_data_format(p_cdc, stop_bits, parity, data_bits, complete_cb, user_data);
-  } else {
-    // blocking
-    xfer_result_t result = XFER_RESULT_INVALID;
-    bool ret = driver->set_data_format(p_cdc, stop_bits, parity, data_bits, complete_cb, (uintptr_t) &result);
+  p_cdc->requested_line = p_cdc->line; // keep current line coding
+  p_cdc->requested_line.coding.stop_bits = stop_bits;
+  p_cdc->requested_line.coding.parity    = parity;
+  p_cdc->requested_line.coding.data_bits = data_bits;
 
-    if (user_data) {
-      // user_data is not NULL, return result via user_data
-      *((xfer_result_t*) user_data) = result;
-    }
+  p_cdc->user_complete_cb = complete_cb;
+  TU_VERIFY(driver->set_data_format(p_cdc, complete_cb ? cdch_internal_control_complete : NULL, user_data));
 
-    TU_VERIFY(ret && result == XFER_RESULT_SUCCESS);
-    p_cdc->line_coding.stop_bits = stop_bits;
-    p_cdc->line_coding.parity = parity;
-    p_cdc->line_coding.data_bits = data_bits;
-    return true;
+  if (!complete_cb) {
+    // blocking
+    p_cdc->line.coding.stop_bits = stop_bits;
+    p_cdc->line.coding.parity    = parity;
+    p_cdc->line.coding.data_bits = data_bits;
   }
+
+  return true;
 }
 
-bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t* p_cdc = get_itf(idx);
+bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
+                             tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  cdch_serial_driver_t const* driver = &serial_drivers[p_cdc->serial_drid];
+  TU_LOG_CDC(p_cdc, "set line coding %lu %u%c%s",
+               line_coding->bit_rate, line_coding->data_bits,
+               CDC_LINE_CODING_PARITY_CHAR(line_coding->parity),
+               CDC_LINE_CODING_STOP_BITS_TEXT(line_coding->stop_bits));
+  cdch_serial_driver_t const *driver = &serial_drivers[p_cdc->serial_drid];
+  p_cdc->requested_line.coding = *line_coding;
+  p_cdc->user_complete_cb = complete_cb;
 
-  if ( complete_cb ) {
-    return driver->set_line_coding(p_cdc, line_coding, complete_cb, user_data);
-  } else {
-    // blocking
-    xfer_result_t result = XFER_RESULT_INVALID;
-    bool ret = driver->set_line_coding(p_cdc, line_coding, complete_cb, (uintptr_t) &result);
+  if (driver->set_line_coding) {
+    // driver support set_line_coding request
+    TU_VERIFY(driver->set_line_coding(p_cdc, complete_cb ? cdch_internal_control_complete : NULL, user_data));
 
-    if (user_data) {
-      // user_data is not NULL, return result via user_data
-      *((xfer_result_t*) user_data) = result;
+    if (!complete_cb) {
+      p_cdc->line.coding = *line_coding;
     }
+  } else {
+    // driver does not support set_line_coding and need 2 stage to set baudrate and data format separately
+    if (complete_cb) {
+      // non-blocking
+      TU_VERIFY(driver->set_baudrate(p_cdc, cdch_set_line_coding_stage1_baudrate_complete, user_data));
+    } else {
+      // blocking
+      xfer_result_t result = XFER_RESULT_INVALID;
+
+      TU_VERIFY(driver->set_baudrate(p_cdc, NULL, (uintptr_t) &result));
+      if (user_data) {
+        *((xfer_result_t *) user_data) = result;
+      }
+      TU_VERIFY(result == XFER_RESULT_SUCCESS);
+      p_cdc->line.coding.bit_rate = p_cdc->requested_line.coding.bit_rate; // update baudrate
 
-    TU_VERIFY(ret && result == XFER_RESULT_SUCCESS);
-    p_cdc->line_coding = *line_coding;
-    return true;
+      result = XFER_RESULT_INVALID;
+      TU_VERIFY(driver->set_data_format(p_cdc, NULL, (uintptr_t) &result));
+      if (user_data) {
+        *((xfer_result_t *) user_data) = result;
+      }
+      TU_VERIFY(result == XFER_RESULT_SUCCESS);
+      p_cdc->line.coding = p_cdc->requested_line.coding; // update data format
+    }
   }
+
+  return true;
 }
 
 //--------------------------------------------------------------------+
@@ -627,8 +627,8 @@ bool cdch_init(void) {
   TU_LOG_DRV("sizeof(cdch_interface_t) = %u\r\n", sizeof(cdch_interface_t));
   tu_memclr(cdch_data, sizeof(cdch_data));
   for (size_t i = 0; i < CFG_TUH_CDC; i++) {
-    cdch_interface_t* p_cdc = &cdch_data[i];
-    cdch_epbuf_t* epbuf = &cdch_epbuf[i];
+    cdch_interface_t *p_cdc = &cdch_data[i];
+    cdch_epbuf_t *epbuf = &cdch_epbuf[i];
     tu_edpt_stream_init(&p_cdc->stream.tx, true, true, false,
                         p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE,
                         epbuf->tx, CFG_TUH_CDC_TX_EPSIZE);
@@ -643,7 +643,7 @@ bool cdch_init(void) {
 
 bool cdch_deinit(void) {
   for (size_t i = 0; i < CFG_TUH_CDC; i++) {
-    cdch_interface_t* p_cdc = &cdch_data[i];
+    cdch_interface_t *p_cdc = &cdch_data[i];
     tu_edpt_stream_deinit(&p_cdc->stream.tx);
     tu_edpt_stream_deinit(&p_cdc->stream.rx);
   }
@@ -652,9 +652,9 @@ bool cdch_deinit(void) {
 
 void cdch_close(uint8_t daddr) {
   for (uint8_t idx = 0; idx < CFG_TUH_CDC; idx++) {
-    cdch_interface_t* p_cdc = &cdch_data[idx];
+    cdch_interface_t *p_cdc = &cdch_data[idx];
     if (p_cdc->daddr == daddr) {
-      TU_LOG_DRV("  CDCh close addr = %u index = %u\r\n", daddr, idx);
+      TU_LOG_CDC(p_cdc, "close");
 
       // Invoke application callback
       if (tuh_cdc_umount_cb) {
@@ -675,42 +675,47 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
   TU_VERIFY(event == XFER_RESULT_SUCCESS);
 
   uint8_t const idx = get_idx_by_ep_addr(daddr, ep_addr);
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc);
 
-  if ( ep_addr == p_cdc->stream.tx.ep_addr ) {
+  if (ep_addr == p_cdc->stream.tx.ep_addr) {
     // invoke tx complete callback to possibly refill tx fifo
     if (tuh_cdc_tx_complete_cb) {
       tuh_cdc_tx_complete_cb(idx);
     }
 
-    if ( 0 == tu_edpt_stream_write_xfer(daddr, &p_cdc->stream.tx) ) {
+    if (0 == tu_edpt_stream_write_xfer(daddr, &p_cdc->stream.tx)) {
       // If there is no data left, a ZLP should be sent if:
       // - xferred_bytes is multiple of EP Packet size and not zero
       tu_edpt_stream_write_zlp_if_needed(daddr, &p_cdc->stream.tx, xferred_bytes);
     }
-  } else if ( ep_addr == p_cdc->stream.rx.ep_addr ) {
+  } else if (ep_addr == p_cdc->stream.rx.ep_addr) {
     #if CFG_TUH_CDC_FTDI
-    if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI && xferred_bytes > 2) {
+    if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI) {
       // FTDI reserve 2 bytes for status
       // uint8_t status[2] = {p_cdc->stream.rx.ep_buf[0], p_cdc->stream.rx.ep_buf[1]};
-      tu_edpt_stream_read_xfer_complete_with_buf(&p_cdc->stream.rx, p_cdc->stream.rx.ep_buf+2, xferred_bytes-2);
-    }else
+      if (xferred_bytes > 2) {
+        tu_edpt_stream_read_xfer_complete_with_buf(&p_cdc->stream.rx, p_cdc->stream.rx.ep_buf + 2, xferred_bytes - 2);
+
+        if (tuh_cdc_rx_cb) {
+          tuh_cdc_rx_cb(idx); // invoke receive callback
+        }
+      }
+    } else
     #endif
     {
       tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes);
-    }
 
-    // invoke receive callback
-    if (tuh_cdc_rx_cb) {
-      tuh_cdc_rx_cb(idx);
+      if (tuh_cdc_rx_cb) {
+        tuh_cdc_rx_cb(idx); // invoke receive callback
+      }
     }
 
     // prepare for next transfer if needed
     tu_edpt_stream_read_xfer(daddr, &p_cdc->stream.rx);
-  }else if ( ep_addr == p_cdc->ep_notif ) {
+  } else if (ep_addr == p_cdc->ep_notif) {
     // TODO handle notification endpoint
-  }else {
+  } else {
     TU_ASSERT(false);
   }
 
@@ -721,7 +726,7 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 // Enumeration
 //--------------------------------------------------------------------+
 
-static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t const* desc_ep) {
+static bool open_ep_stream_pair(cdch_interface_t *p_cdc, tusb_desc_endpoint_t const *desc_ep) {
   for (size_t i = 0; i < 2; i++) {
     TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType &&
               TUSB_XFER_BULK == desc_ep->bmAttributes.xfer);
@@ -733,7 +738,7 @@ static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t co
       tu_edpt_stream_open(&p_cdc->stream.tx, desc_ep);
     }
 
-    desc_ep = (tusb_desc_endpoint_t const*) tu_desc_next(desc_ep);
+    desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(desc_ep);
   }
 
   return true;
@@ -741,10 +746,9 @@ static bool open_ep_stream_pair(cdch_interface_t* p_cdc, tusb_desc_endpoint_t co
 
 bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
   (void) rhport;
-
   // For CDC: only support ACM subclass
   // Note: Protocol 0xFF can be RNDIS device
-  if (TUSB_CLASS_CDC                           == itf_desc->bInterfaceClass &&
+  if (TUSB_CLASS_CDC == itf_desc->bInterfaceClass &&
       CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass) {
     return acm_open(daddr, itf_desc, max_len);
   } else if (SERIAL_DRIVER_COUNT > 1 &&
@@ -753,10 +757,12 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
     TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid));
 
     for (size_t dr = 1; dr < SERIAL_DRIVER_COUNT; dr++) {
-      cdch_serial_driver_t const* driver = &serial_drivers[dr];
+      const cdch_serial_driver_t *driver = &serial_drivers[dr];
       for (size_t i = 0; i < driver->vid_pid_count; i++) {
         if (driver->vid_pid_list[i][0] == vid && driver->vid_pid_list[i][1] == pid) {
-          return driver->open(daddr, itf_desc, max_len);
+          const bool ret = driver->open(daddr, itf_desc, max_len);
+          TU_LOG_DRV("[:%u:%u] CDCh %s open %s\r\n", daddr, itf_desc->bInterfaceNumber, driver->name, ret ? "OK" : "FAILED");
+          return ret;
         }
       }
     }
@@ -765,123 +771,170 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
   return false;
 }
 
-static void set_config_complete(cdch_interface_t * p_cdc, uint8_t idx, uint8_t itf_num) {
-  TU_LOG_DRV("CDCh Set Configure complete\r\n");
-  p_cdc->mounted = true;
-  if (tuh_cdc_mount_cb) {
-    tuh_cdc_mount_cb(idx);
-  }
-
-  // Prepare for incoming data
-  tu_edpt_stream_read_xfer(p_cdc->daddr, &p_cdc->stream.rx);
-
-  // notify usbh that driver enumeration is complete
-  usbh_driver_set_config_complete(p_cdc->daddr, itf_num);
-}
-
 bool cdch_set_config(uint8_t daddr, uint8_t itf_num) {
   tusb_control_request_t request;
   request.wIndex = tu_htole16((uint16_t) itf_num);
+  uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
+  TU_LOG_CDC(p_cdc, "set config");
 
-  // fake transfer to kick-off process
+  // fake transfer to kick-off process_set_config()
   tuh_xfer_t xfer;
-  xfer.daddr  = daddr;
+  xfer.daddr = daddr;
   xfer.result = XFER_RESULT_SUCCESS;
-  xfer.setup  = &request;
-  xfer.user_data = 0; // initial state
+  xfer.setup = &request;
+  xfer.user_data = 0; // initial state 0
+  cdch_process_set_config(&xfer);
 
-  uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-
-  serial_drivers[p_cdc->serial_drid].process_set_config(&xfer);
   return true;
 }
 
-//--------------------------------------------------------------------+
-// ACM
-//--------------------------------------------------------------------+
+static void set_config_complete(cdch_interface_t *p_cdc, bool success) {
+  if (success) {
+    const uint8_t idx = get_idx_by_ptr(p_cdc);
+    p_cdc->mounted = true;
+    if (tuh_cdc_mount_cb) {
+      tuh_cdc_mount_cb(idx);
+    }
+    // Prepare for incoming data
+    tu_edpt_stream_read_xfer(p_cdc->daddr, &p_cdc->stream.rx);
+  } else {
+    // clear the interface entry
+    p_cdc->daddr = 0;
+    p_cdc->bInterfaceNumber = 0;
+  }
 
-enum {
-  CONFIG_ACM_SET_CONTROL_LINE_STATE = 0,
-  CONFIG_ACM_SET_LINE_CODING,
-  CONFIG_ACM_COMPLETE,
-};
+  // notify usbh that driver enumeration is complete
+  const uint8_t itf_offset = (p_cdc->serial_drid == SERIAL_DRIVER_ACM) ? 1 : 0;
+  usbh_driver_set_config_complete(p_cdc->daddr, p_cdc->bInterfaceNumber + itf_offset);
+}
 
-static bool acm_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uint16_t max_len) {
-  uint8_t const* p_desc_end = ((uint8_t const*) itf_desc) + max_len;
+static void cdch_process_set_config(tuh_xfer_t *xfer) {
+  cdch_interface_t *p_cdc = get_itf_by_xfer(xfer);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT,);
+  TU_LOG_DRV("  state = %u\r\n", xfer->user_data);
+  const cdch_serial_driver_t *driver = &serial_drivers[p_cdc->serial_drid];
 
-  cdch_interface_t* p_cdc = make_new_itf(daddr, itf_desc);
-  TU_VERIFY(p_cdc);
-  p_cdc->serial_drid = SERIAL_DRIVER_ACM;
+  if (!driver->process_set_config(p_cdc, xfer)) {
+    set_config_complete(p_cdc, false);
+  }
+}
 
-  //------------- Control Interface -------------//
-  uint8_t const* p_desc = tu_desc_next(itf_desc);
+static bool set_line_state_on_enum(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  enum {
+    ENUM_SET_LINE_CODING = 0,
+    ENUM_SET_LINE_CONTROL,
+    ENUM_SET_LINE_COMPLETE,
+  };
+  const uint8_t idx = get_idx_by_ptr(p_cdc);
+  const uintptr_t state = xfer->user_data;
 
-  // Communication Functional Descriptors
-  while ((p_desc < p_desc_end) && (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc))) {
-    if (CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT == cdc_functional_desc_typeof(p_desc)) {
-      // save ACM bmCapabilities
-      p_cdc->acm_capability = ((cdc_desc_func_acm_t const*) p_desc)->bmCapabilities;
+  switch (state) {
+    case ENUM_SET_LINE_CODING: {
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      // ch34x already set line coding in serial init
+      if (p_cdc->serial_drid != SERIAL_DRIVER_CH34X) {
+        const cdc_line_coding_t line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+        TU_ASSERT(tuh_cdc_set_line_coding(idx, &line_coding,
+                                          cdch_process_line_state_on_enum, ENUM_SET_LINE_CONTROL));
+        break;
+      }
+      #endif
+      TU_ATTR_FALLTHROUGH;
     }
 
-    p_desc = tu_desc_next(p_desc);
+    case ENUM_SET_LINE_CONTROL:
+      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      TU_ASSERT(tuh_cdc_set_control_line_state(idx, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM,
+                                               cdch_process_line_state_on_enum, ENUM_SET_LINE_COMPLETE));
+      break;
+      #else
+      TU_ATTR_FALLTHROUGH;
+      #endif
+
+    case ENUM_SET_LINE_COMPLETE:
+      set_config_complete(p_cdc, true);
+      break;
+
+    default:
+      return false;
   }
 
-  // Open notification endpoint of control interface if any
-  if (itf_desc->bNumEndpoints == 1) {
-    TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(p_desc));
-    tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const*) p_desc;
+  return true;
+}
 
-    TU_ASSERT(tuh_edpt_open(daddr, desc_ep));
-    p_cdc->ep_notif = desc_ep->bEndpointAddress;
+static void cdch_process_line_state_on_enum(tuh_xfer_t *xfer) {
+  cdch_interface_t *p_cdc = get_itf_by_xfer(xfer);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT,);
+  if (xfer->result != XFER_RESULT_SUCCESS || !set_line_state_on_enum(p_cdc, xfer)) {
+    set_config_complete(p_cdc, false);
+  }
+}
 
-    p_desc = tu_desc_next(p_desc);
+
+static void cdch_internal_control_complete(tuh_xfer_t *xfer) {
+  cdch_interface_t *p_cdc = get_itf_by_xfer(xfer);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT,);
+  TU_LOG_DRV("  request result = %u\r\n", xfer->result);
+  const cdch_serial_driver_t *driver = &serial_drivers[p_cdc->serial_drid];
+  driver->request_complete(p_cdc, xfer);
+
+  // Invoke application callback
+  xfer->complete_cb = p_cdc->user_complete_cb;
+  if (xfer->complete_cb) {
+    xfer->complete_cb(xfer);
   }
+}
 
-  //------------- Data Interface (if any) -------------//
-  if ((TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) &&
-      (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const*) p_desc)->bInterfaceClass)) {
-    // next to endpoint descriptor
-    p_desc = tu_desc_next(p_desc);
+static void cdch_set_line_coding_stage1_baudrate_complete(tuh_xfer_t *xfer) {
+  cdch_interface_t *p_cdc = get_itf_by_xfer(xfer);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT,);
+  TU_LOG_DRV("  stage1 set baudrate result = %u\r\n", xfer->result);
+  const cdch_serial_driver_t *driver = &serial_drivers[p_cdc->serial_drid];
 
-    // data endpoints expected to be in pairs
-    TU_ASSERT(open_ep_stream_pair(p_cdc, (tusb_desc_endpoint_t const*) p_desc));
+  if (xfer->result == XFER_RESULT_SUCCESS) {
+    p_cdc->line.coding.bit_rate = p_cdc->requested_line.coding.bit_rate; // update baudrate
+    TU_ASSERT(driver->set_data_format(p_cdc, cdch_set_line_coding_stage2_data_format_complete, xfer->user_data),);
+  } else {
+    xfer->complete_cb = p_cdc->user_complete_cb;
+    if (xfer->complete_cb) {
+      xfer->complete_cb(xfer);
+    }
   }
+}
 
-  return true;
+static void cdch_set_line_coding_stage2_data_format_complete(tuh_xfer_t *xfer) {
+  cdch_interface_t *p_cdc = get_itf_by_xfer(xfer);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT,);
+  TU_LOG_DRV("  stage2 set data format result = %u\r\n", xfer->result);
+
+  if (xfer->result == XFER_RESULT_SUCCESS) {
+    p_cdc->line.coding = p_cdc->requested_line.coding; // update data format
+  }
+
+  xfer->complete_cb = p_cdc->user_complete_cb;
+  if (xfer->complete_cb) {
+    xfer->complete_cb(xfer);
+  }
 }
 
-static void acm_process_config(tuh_xfer_t* xfer) {
-  uintptr_t const state = xfer->user_data;
-  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t* p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+//--------------------------------------------------------------------+
+// ACM
+//--------------------------------------------------------------------+
 
-  switch (state) {
-    case CONFIG_ACM_SET_CONTROL_LINE_STATE:
-      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      if (p_cdc->acm_capability.support_line_request) {
-        TU_ASSERT(acm_set_control_line_state(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, acm_process_config, CONFIG_ACM_SET_LINE_CODING),);
-        break;
-      }
-      #endif
-      TU_ATTR_FALLTHROUGH;
+// internal control complete to update state such as line state, encoding
+static void acm_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_VERIFY (xfer->result == XFER_RESULT_SUCCESS,);
+  const tusb_control_request_t * setup = xfer->setup;
 
-    case CONFIG_ACM_SET_LINE_CODING:
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      if (p_cdc->acm_capability.support_line_request) {
-        cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-        TU_ASSERT(acm_set_line_coding(p_cdc, &line_coding, acm_process_config, CONFIG_ACM_COMPLETE),);
-        break;
-      }
-      #endif
-      TU_ATTR_FALLTHROUGH;
+  switch (setup->bRequest) {
+    case CDC_REQUEST_SET_CONTROL_LINE_STATE:
+      p_cdc->line.control_state = p_cdc->requested_line.control_state;
+      break;
 
-    case CONFIG_ACM_COMPLETE:
-      // itf_num+1 to account for data interface as well
-      set_config_complete(p_cdc, idx, itf_num + 1);
+    case CDC_REQUEST_SET_LINE_CODING:
+      p_cdc->line.coding = p_cdc->requested_line.coding;
       break;
 
     default:
@@ -889,39 +942,37 @@ static void acm_process_config(tuh_xfer_t* xfer) {
   }
 }
 
-static bool acm_set_control_line_state(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_VERIFY(p_cdc->acm_capability.support_line_request);
-  TU_LOG_DRV("CDC ACM Set Control Line State\r\n");
+static bool acm_set_control_line_state(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_VERIFY(p_cdc->acm.capability.support_line_request);
 
-  tusb_control_request_t const request = {
+  const tusb_control_request_t request = {
     .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_INTERFACE,
       .type      = TUSB_REQ_TYPE_CLASS,
       .direction = TUSB_DIR_OUT
     },
     .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
-    .wValue   = tu_htole16(line_state),
+    .wValue   = tu_htole16((uint16_t) p_cdc->requested_line.control_state.value),
     .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
     .wLength  = 0
   };
 
-  p_cdc->user_control_cb = complete_cb;
-
   tuh_xfer_t xfer = {
     .daddr       = p_cdc->daddr,
     .ep_addr     = 0,
     .setup       = &request,
     .buffer      = NULL,
-    .complete_cb = complete_cb ? cdch_internal_control_complete : NULL, // complete_cb is NULL for sync call
+    .complete_cb = complete_cb,
     .user_data   = user_data
   };
 
-  TU_ASSERT(tuh_control_xfer(&xfer));
-  return true;
+  return tuh_control_xfer(&xfer);
 }
 
-static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_DRV("CDC ACM Set Line Conding\r\n");
+static bool acm_set_line_coding(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_VERIFY(p_cdc->acm.capability.support_line_request);
+  TU_VERIFY((p_cdc->requested_line.coding.data_bits >= 5 && p_cdc->requested_line.coding.data_bits <= 8) ||
+            p_cdc->requested_line.coding.data_bits == 16);
 
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
@@ -931,46 +982,93 @@ static bool acm_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const
     },
     .bRequest = CDC_REQUEST_SET_LINE_CODING,
     .wValue   = 0,
-    .wIndex   = tu_htole16(p_cdc->bInterfaceNumber),
-    .wLength  = tu_htole16(sizeof(cdc_line_coding_t))
+    .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
+    .wLength  = tu_htole16((uint16_t) sizeof(cdc_line_coding_t))
   };
 
   // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
-  uint8_t* enum_buf = usbh_get_enum_buf();
-  memcpy(enum_buf, line_coding, sizeof(cdc_line_coding_t));
+  uint8_t *enum_buf = usbh_get_enum_buf();
+  memcpy(enum_buf, &p_cdc->requested_line.coding, sizeof(cdc_line_coding_t));
 
-  p_cdc->user_control_cb = complete_cb;
   tuh_xfer_t xfer = {
     .daddr       = p_cdc->daddr,
     .ep_addr     = 0,
     .setup       = &request,
     .buffer      = enum_buf,
-    .complete_cb = complete_cb ? cdch_internal_control_complete : NULL, // complete_cb is NULL for sync call
+    .complete_cb = complete_cb,
     .user_data   = user_data
   };
 
-  TU_ASSERT(tuh_control_xfer(&xfer));
-  return true;
+  return tuh_control_xfer(&xfer);
 }
 
-static bool acm_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits,
-                                tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_DRV("CDC ACM Set Data Format\r\n");
+//------------- Enumeration -------------//
+enum {
+  CONFIG_ACM_COMPLETE = 0
+};
+
+static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  uint8_t const *p_desc_end = ((uint8_t const *) itf_desc) + max_len;
+
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  p_cdc->serial_drid = SERIAL_DRIVER_ACM;
+
+  //------------- Control Interface -------------//
+  uint8_t const *p_desc = tu_desc_next(itf_desc);
+
+  // Communication Functional Descriptors
+  while ((p_desc < p_desc_end) && (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc))) {
+    if (CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT == cdc_functional_desc_typeof(p_desc)) {
+      // save ACM bmCapabilities
+      p_cdc->acm.capability = ((cdc_desc_func_acm_t const *) p_desc)->bmCapabilities;
+    }
+
+    p_desc = tu_desc_next(p_desc);
+  }
+
+  // Open notification endpoint of control interface if any
+  if (itf_desc->bNumEndpoints == 1) {
+    TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(p_desc));
+    tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+
+    TU_ASSERT(tuh_edpt_open(daddr, desc_ep));
+    p_cdc->ep_notif = desc_ep->bEndpointAddress;
+
+    p_desc = tu_desc_next(p_desc);
+  }
 
-  cdc_line_coding_t line_coding;
-  line_coding.bit_rate = p_cdc->line_coding.bit_rate;
-  line_coding.stop_bits = stop_bits;
-  line_coding.parity = parity;
-  line_coding.data_bits = data_bits;
+  //------------- Data Interface (if any) -------------//
+  if ((TUSB_DESC_INTERFACE == tu_desc_type(p_desc)) &&
+      (TUSB_CLASS_CDC_DATA == ((tusb_desc_interface_t const *) p_desc)->bInterfaceClass)) {
+    // next to endpoint descriptor
+    p_desc = tu_desc_next(p_desc);
 
-  return acm_set_line_coding(p_cdc, &line_coding, complete_cb, user_data);
+    // data endpoints expected to be in pairs
+    TU_ASSERT(open_ep_stream_pair(p_cdc, (tusb_desc_endpoint_t const *) p_desc));
+  }
+
+  return true;
 }
 
-static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_VERIFY(p_cdc->acm_capability.support_line_request);
-  cdc_line_coding_t line_coding = p_cdc->line_coding;
-  line_coding.bit_rate = baudrate;
-  return acm_set_line_coding(p_cdc, &line_coding, complete_cb, user_data);
+static bool acm_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_ASSERT(xfer->result == XFER_RESULT_SUCCESS);
+  (void) p_cdc;
+  const uintptr_t state = xfer->user_data;
+
+  switch (state) {
+    case CONFIG_ACM_COMPLETE: {
+      xfer->user_data = 0; // kick-off set line state on enum
+      cdch_process_line_state_on_enum(xfer);
+      break;
+    }
+
+    default:
+      return false; // invalid state
+  }
+
+  return true;
 }
 
 //--------------------------------------------------------------------+
@@ -978,50 +1076,26 @@ static bool acm_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfe
 //--------------------------------------------------------------------+
 #if CFG_TUH_CDC_FTDI
 
-enum {
-  CONFIG_FTDI_RESET = 0,
-  CONFIG_FTDI_MODEM_CTRL,
-  CONFIG_FTDI_SET_BAUDRATE,
-  CONFIG_FTDI_SET_DATA,
-  CONFIG_FTDI_COMPLETE
-};
+static bool ftdi_determine_type(cdch_interface_t *p_cdc);
+static uint32_t ftdi_get_divisor(cdch_interface_t *p_cdc);
 
-static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len) {
-  // FTDI Interface includes 1 vendor interface + 2 bulk endpoints
-  TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff && itf_desc->bNumEndpoints == 2);
-  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
-
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
-  TU_VERIFY(p_cdc);
-
-  TU_LOG_DRV("FTDI opened\r\n");
-  p_cdc->serial_drid = SERIAL_DRIVER_FTDI;
-
-  // endpoint pair
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
-
-  // data endpoints expected to be in pairs
-  return open_ep_stream_pair(p_cdc, desc_ep);
-}
+//------------- Control Request -------------//
 
 // set request without data
-static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  tusb_control_request_t const request = {
-    .bmRequestType_bit = {
-      .recipient = TUSB_REQ_RCPT_DEVICE,
-      .type      = TUSB_REQ_TYPE_VENDOR,
-      .direction = TUSB_DIR_OUT
-    },
-    .bRequest = command,
-    .wValue   = tu_htole16(value),
-    .wIndex   = 0,
-    .wLength  = 0
+static bool ftdi_set_request(cdch_interface_t *p_cdc, uint8_t request, uint8_t requesttype,
+                             uint16_t value, uint16_t index, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request_setup = {
+    .bmRequestType = requesttype,
+    .bRequest      = request,
+    .wValue        = tu_htole16(value),
+    .wIndex        = tu_htole16(index),
+    .wLength       = 0
   };
 
   tuh_xfer_t xfer = {
     .daddr       = p_cdc->daddr,
     .ep_addr     = 0,
-    .setup       = &request,
+    .setup       = &request_setup,
     .buffer      = NULL,
     .complete_cb = complete_cb,
     .user_data   = user_data
@@ -1030,162 +1104,380 @@ static bool ftdi_sio_set_request(cdch_interface_t* p_cdc, uint8_t command, uint1
   return tuh_control_xfer(&xfer);
 }
 
-static bool ftdi_sio_reset(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  return ftdi_sio_set_request(p_cdc, FTDI_SIO_RESET, FTDI_SIO_RESET_SIO, complete_cb, user_data);
+#ifdef CFG_TUH_CDC_FTDI_LATENCY
+static int8_t ftdi_write_latency_timer(cdch_interface_t * p_cdc, uint16_t latency,
+                                       tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  if (p_cdc->ftdi.chip_type == FTDI_SIO /* || p_cdc->ftdi.chip_type == FT232A */ )
+    return FTDI_NOT_POSSIBLE;
+  return ftdi_set_request(p_cdc, FTDI_SIO_SET_LATENCY_TIMER_REQUEST, FTDI_SIO_SET_LATENCY_TIMER_REQUEST_TYPE,
+                          latency, p_cdc->ftdi.channel, complete_cb, user_data) ? FTDI_REQUESTED : FTDI_FAIL;
 }
+#endif
 
-static bool ftdi_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits,
-                                 tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  (void) p_cdc;
-  (void) stop_bits;
-  (void) parity;
-  (void) data_bits;
-  (void) complete_cb;
-  (void) user_data;
-  // TODO not implemented yet
-  return false;
+static inline bool ftdi_sio_reset(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return ftdi_set_request(p_cdc, FTDI_SIO_RESET_REQUEST, FTDI_SIO_RESET_REQUEST_TYPE, FTDI_SIO_RESET_SIO,
+                          p_cdc->ftdi.channel, complete_cb, user_data);
 }
 
-static bool ftdi_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  (void) p_cdc;
-  (void) line_coding;
-  (void) complete_cb;
-  (void) user_data;
-  // TODO not implemented yet
-  return false;
-}
 
-static bool ftdi_sio_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_DRV("CDC FTDI Set Control Line State\r\n");
-  p_cdc->user_control_cb = complete_cb;
-  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_MODEM_CTRL, 0x0300 | line_state,
-                                 complete_cb ? cdch_internal_control_complete : NULL, user_data));
-  return true;
-}
+//------------- Driver API -------------//
 
-static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) {
-  const uint8_t divfrac[8] = { 0, 3, 2, 4, 1, 5, 6, 7 };
-  uint32_t divisor;
+// internal control complete to update state such as line state, line_coding
+static void ftdi_internal_control_complete(cdch_interface_t* p_cdc, tuh_xfer_t *xfer) {
+  TU_VERIFY(xfer->result == XFER_RESULT_SUCCESS,);
+  const tusb_control_request_t * setup = xfer->setup;
+  if (xfer->result == XFER_RESULT_SUCCESS) {
+    if (setup->bRequest      == FTDI_SIO_SET_MODEM_CTRL_REQUEST &&
+        setup->bmRequestType == FTDI_SIO_SET_MODEM_CTRL_REQUEST_TYPE ) {
+      p_cdc->line.control_state = p_cdc->requested_line.control_state;
+    }
+    if (setup->bRequest      == FTDI_SIO_SET_DATA_REQUEST &&
+        setup->bmRequestType == FTDI_SIO_SET_DATA_REQUEST_TYPE ) {
+      p_cdc->line.coding.stop_bits = p_cdc->requested_line.coding.stop_bits;
+      p_cdc->line.coding.parity    = p_cdc->requested_line.coding.parity;
+      p_cdc->line.coding.data_bits = p_cdc->requested_line.coding.data_bits;
+    }
+    if (setup->bRequest      == FTDI_SIO_SET_BAUDRATE_REQUEST &&
+        setup->bmRequestType == FTDI_SIO_SET_BAUDRATE_REQUEST_TYPE ) {
+      p_cdc->line.coding.bit_rate = p_cdc->requested_line.coding.bit_rate;
+    }
+  }
+}
 
-  /* divisor shifted 3 bits to the left */
-  uint32_t divisor3 = base / (2 * baud);
-  divisor = (divisor3 >> 3);
-  divisor |= (uint32_t) divfrac[divisor3 & 0x7] << 14;
+static bool ftdi_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_VERIFY(p_cdc->requested_line.coding.data_bits >= 7 && p_cdc->requested_line.coding.data_bits <= 8, 0);
+  uint16_t value = (uint16_t) ((p_cdc->requested_line.coding.data_bits & 0xfUL) |       // data bit quantity is stored in bits 0-3
+                               (p_cdc->requested_line.coding.parity    & 0x7UL) << 8 |  // parity is stored in bits 8-10, same coding
+                               (p_cdc->requested_line.coding.stop_bits & 0x3UL) << 11); // stop bits quantity is stored in bits 11-12, same coding
+                                                                                        // not each FTDI supports 1.5 stop bits
+  return ftdi_set_request(p_cdc, FTDI_SIO_SET_DATA_REQUEST, FTDI_SIO_SET_DATA_REQUEST_TYPE,
+                          value, p_cdc->ftdi.channel, complete_cb, user_data);
+}
 
-  /* Deal with special cases for highest baud rates. */
-  if (divisor == 1) { /* 1.0 */
-    divisor = 0;
-  }
-  else if (divisor == 0x4001) { /* 1.5 */
-    divisor = 1;
+static bool ftdi_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint32_t index_value = ftdi_get_divisor(p_cdc);
+  TU_VERIFY(index_value);
+  uint16_t value = (uint16_t) index_value;
+  uint16_t index = (uint16_t) (index_value >> 16);
+  if (p_cdc->ftdi.channel) {
+    index = (uint16_t) ((index << 8) | p_cdc->ftdi.channel);
   }
 
-  return divisor;
+  return ftdi_set_request(p_cdc, FTDI_SIO_SET_BAUDRATE_REQUEST, FTDI_SIO_SET_BAUDRATE_REQUEST_TYPE,
+                          value, index, complete_cb, user_data);
 }
 
-static uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) {
-  return ftdi_232bm_baud_base_to_divisor(baud, 48000000u);
+static bool ftdi_set_modem_ctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint16_t line_state = (uint16_t) ((p_cdc->requested_line.control_state.dtr ? FTDI_SIO_SET_DTR_HIGH : FTDI_SIO_SET_DTR_LOW) |
+                                    (p_cdc->requested_line.control_state.rts ? FTDI_SIO_SET_RTS_HIGH : FTDI_SIO_SET_RTS_LOW));
+  return ftdi_set_request(p_cdc, FTDI_SIO_SET_MODEM_CTRL_REQUEST, FTDI_SIO_SET_MODEM_CTRL_REQUEST_TYPE,
+                          line_state, p_cdc->ftdi.channel, complete_cb ? cdch_internal_control_complete : NULL, user_data);
 }
 
-static bool ftdi_sio_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  uint16_t const divisor = (uint16_t) ftdi_232bm_baud_to_divisor(baudrate);
-  TU_LOG_DRV("CDC FTDI Set BaudRate = %" PRIu32 ", divisor = 0x%04x\r\n", baudrate, divisor);
+//------------- Enumeration -------------//
+enum {
+  CONFIG_FTDI_DETERMINE_TYPE = 0,
+  CONFIG_FTDI_WRITE_LATENCY,
+  CONFIG_FTDI_SIO_RESET,
+  CONFIG_FTDI_FLOW_CONTROL,
+  CONFIG_FTDI_COMPLETE
+};
 
-  p_cdc->user_control_cb = complete_cb;
-  p_cdc->requested_line_coding.bit_rate = baudrate;
-  TU_ASSERT(ftdi_sio_set_request(p_cdc, FTDI_SIO_SET_BAUD_RATE, divisor,
-                                 complete_cb ? cdch_internal_control_complete : NULL, user_data));
+static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len) {
+  // FTDI Interface includes 1 vendor interface + 2 bulk endpoints
+  TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff &&
+            itf_desc->bNumEndpoints == 2);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2 * sizeof(tusb_desc_endpoint_t) <= max_len);
 
-  return true;
-}
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
 
-static void ftdi_process_config(tuh_xfer_t* xfer) {
-  uintptr_t const state = xfer->user_data;
-  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc, );
+  p_cdc->serial_drid = SERIAL_DRIVER_FTDI;
 
-  switch(state) {
-    // Note may need to read FTDI eeprom
-    case CONFIG_FTDI_RESET:
-      TU_ASSERT(ftdi_sio_reset(p_cdc, ftdi_process_config, CONFIG_FTDI_MODEM_CTRL),);
-      break;
+  // endpoint pair
+  tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
 
-    case CONFIG_FTDI_MODEM_CTRL:
-      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      TU_ASSERT(ftdi_sio_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, ftdi_process_config, CONFIG_FTDI_SET_BAUDRATE),);
-      break;
-      #else
+  /*
+   * NOTE: Some customers have programmed FT232R/FT245R devices
+   * with an endpoint size of 0 - not good.
+   */
+  TU_ASSERT(desc_ep->wMaxPacketSize != 0);
+
+  // data endpoints expected to be in pairs
+  return open_ep_stream_pair(p_cdc, desc_ep);
+}
+
+static bool ftdi_proccess_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_ASSERT(xfer->result == XFER_RESULT_SUCCESS);
+  const uintptr_t state = xfer->user_data;
+  switch (state) {
+    // from here sequence overtaken from Linux Kernel function ftdi_port_probe()
+    case CONFIG_FTDI_DETERMINE_TYPE:
+      // determine type
+      if (p_cdc->bInterfaceNumber == 0) {
+        TU_ASSERT(ftdi_determine_type(p_cdc));
+      } else {
+        // other interfaces have same type as interface 0
+        uint8_t const idx_itf0 = tuh_cdc_itf_get_index(xfer->daddr, 0);
+        cdch_interface_t const *p_cdc_itf0 = get_itf(idx_itf0);
+        TU_ASSERT(p_cdc_itf0);
+        p_cdc->ftdi.chip_type = p_cdc_itf0->ftdi.chip_type;
+      }
       TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_FTDI_WRITE_LATENCY:
+      #ifdef CFG_TUH_CDC_FTDI_LATENCY
+      int8_t result = ftdi_write_latency_timer(p_cdc, CFG_TUH_CDC_FTDI_LATENCY, ftdi_process_config,
+                                               CONFIG_FTDI_SIO_RESET);
+      TU_ASSERT(result != FTDI_FAIL);
+      if (result == FTDI_REQUESTED) {
+        break;
+      }// else FTDI_NOT_POSSIBLE => continue directly with next state
       #endif
+      TU_ATTR_FALLTHROUGH;
 
-    case CONFIG_FTDI_SET_BAUDRATE: {
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(ftdi_sio_set_baudrate(p_cdc, line_coding.bit_rate, ftdi_process_config, CONFIG_FTDI_SET_DATA),);
+      // from here sequence overtaken from Linux Kernel function ftdi_open()
+    case CONFIG_FTDI_SIO_RESET:
+      TU_ASSERT(ftdi_sio_reset(p_cdc, cdch_process_set_config, CONFIG_FTDI_FLOW_CONTROL));
       break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-    }
 
-    case CONFIG_FTDI_SET_DATA: {
-      #if 0 // TODO set data format
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(ftdi_sio_set_data(p_cdc, process_ftdi_config, CONFIG_FTDI_COMPLETE),);
+    case CONFIG_FTDI_FLOW_CONTROL:
+      // disable flow control
+      TU_ASSERT(ftdi_set_request(p_cdc, FTDI_SIO_SET_FLOW_CTRL_REQUEST, FTDI_SIO_SET_FLOW_CTRL_REQUEST_TYPE, FTDI_SIO_DISABLE_FLOW_CTRL,
+                                 p_cdc->ftdi.channel, cdch_process_set_config, CONFIG_FTDI_COMPLETE));
       break;
-      #endif
-      #endif
 
-      TU_ATTR_FALLTHROUGH;
+    case CONFIG_FTDI_COMPLETE: {
+      xfer->user_data = 0; // kick-off set line state on enum
+      cdch_process_line_state_on_enum(xfer);
+      break;
     }
 
-    case CONFIG_FTDI_COMPLETE:
-      set_config_complete(p_cdc, idx, itf_num);
+    default:
+      return false;
+  }
+
+  return true;
+}
+
+//------------- Helper -------------//
+
+static bool ftdi_determine_type(cdch_interface_t *p_cdc) {
+  tusb_desc_device_t desc_dev;
+  TU_VERIFY(tuh_descriptor_get_device_local(p_cdc->daddr, &desc_dev));
+  uint16_t const version = desc_dev.bcdDevice;
+  uint8_t const itf_num = p_cdc->bInterfaceNumber;
+
+  p_cdc->ftdi.chip_type = FTDI_UNKNOWN;
+
+  /* Assume Hi-Speed type */
+  p_cdc->ftdi.channel = CHANNEL_A + itf_num;
+
+  switch (version) {
+    case 0x200:
+      // FT232A not supported to keep it simple (no extra _read_latency_timer()) not testable
+      // p_cdc->ftdi.chip_type = FT232A;
+      // p_cdc->ftdi.baud_base = 48000000 / 2;
+      // p_cdc->ftdi.channel = 0;
+      // /*
+      //  * FT232B devices have a bug where bcdDevice gets set to 0x200
+      //  * when iSerialNumber is 0. Assume it is an FT232B in case the
+      //  * latency timer is readable.
+      //  */
+      // if (desc->iSerialNumber == 0 &&
+      //     _read_latency_timer(port) >= 0) {
+      //   p_cdc->ftdi.chip_type = FTDI_FT232B;
+      // }
       break;
 
+    case 0x400 : p_cdc->ftdi.chip_type = FTDI_FT232B; p_cdc->ftdi.channel = 0; break;
+    case 0x500 : p_cdc->ftdi.chip_type = FTDI_FT2232C; break;
+    case 0x600 : p_cdc->ftdi.chip_type = FTDI_FT232R; p_cdc->ftdi.channel = 0; break;
+    case 0x700 : p_cdc->ftdi.chip_type = FTDI_FT2232H; break;
+    case 0x800 : p_cdc->ftdi.chip_type = FTDI_FT4232H; break;
+    case 0x900 : p_cdc->ftdi.chip_type = FTDI_FT232H; break;
+    case 0x1000: p_cdc->ftdi.chip_type = FTDI_FTX; break;
+    case 0x2800: p_cdc->ftdi.chip_type = FTDI_FT2233HP; break;
+    case 0x2900: p_cdc->ftdi.chip_type = FTDI_FT4233HP; break;
+    case 0x3000: p_cdc->ftdi.chip_type = FTDI_FT2232HP; break;
+    case 0x3100: p_cdc->ftdi.chip_type = FTDI_FT4232HP; break;
+    case 0x3200: p_cdc->ftdi.chip_type = FTDI_FT233HP; break;
+    case 0x3300: p_cdc->ftdi.chip_type = FTDI_FT232HP; break;
+    case 0x3600: p_cdc->ftdi.chip_type = FTDI_FT4232HA; break;
+
     default:
+      if (version < 0x200) {
+        p_cdc->ftdi.chip_type = FTDI_SIO;
+        p_cdc->ftdi.channel = 0;
+      }
       break;
   }
+
+  #if CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
+  const char * ftdi_chip_name[] = { FTDI_CHIP_NAMES };
+  TU_LOG_CDC(p_cdc, "%s detected (bcdDevice = 0x%04x)",
+               ftdi_chip_name[p_cdc->ftdi.chip_type], version);
+  #endif
+
+  return (p_cdc->ftdi.chip_type != FTDI_UNKNOWN);
 }
 
-#endif
+// FT232A not supported
+//static uint32_t ftdi_232am_baud_base_to_divisor(uint32_t baud, uint32_t base)
+//{
+//  uint32_t divisor;
+//  /* divisor shifted 3 bits to the left */
+//  uint32_t divisor3 = DIV_ROUND_CLOSEST(base, 2 * baud);
+//  if ((divisor3 & 0x7) == 7)
+//    divisor3++; /* round x.7/8 up to x+1 */
+//  divisor = divisor3 >> 3;
+//  divisor3 &= 0x7;
+//  if (divisor3 == 1)
+//    divisor |= 0xc000;  /* +0.125 */
+//  else if (divisor3 >= 4)
+//    divisor |= 0x4000;  /* +0.5 */
+//  else if (divisor3 != 0)
+//    divisor |= 0x8000;  /* +0.25 */
+//  else if (divisor == 1)
+//    divisor = 0;    /* special case for maximum baud rate */
+//  return divisor;
+//}
 
-//--------------------------------------------------------------------+
-// CP210x
-//--------------------------------------------------------------------+
+// FT232A not supported
+//static inline uint32_t ftdi_232am_baud_to_divisor(uint32_t baud)
+//{
+//   return ftdi_232am_baud_base_to_divisor(baud, (uint32_t) 48000000);
+//}
 
-#if CFG_TUH_CDC_CP210X
+static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) {
+  uint8_t divfrac[8] = {0, 3, 2, 4, 1, 5, 6, 7};
+  uint32_t divisor;
+  /* divisor shifted 3 bits to the left */
+  uint32_t divisor3 = DIV_ROUND_CLOSEST(base, 2 * baud);
+  divisor = divisor3 >> 3;
+  divisor |= (uint32_t) divfrac[divisor3 & 0x7] << 14;
+  /* Deal with special cases for highest baud rates. */
+  if (divisor == 1) /* 1.0 */ {
+    divisor = 0;
+  } else if (divisor == 0x4001) /* 1.5 */ {
+    divisor = 1;
+  }
+  return divisor;
+}
 
-enum {
-  CONFIG_CP210X_IFC_ENABLE = 0,
-  CONFIG_CP210X_SET_BAUDRATE,
-  CONFIG_CP210X_SET_LINE_CTL,
-  CONFIG_CP210X_SET_DTR_RTS,
-  CONFIG_CP210X_COMPLETE
-};
+static inline uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) {
+  return ftdi_232bm_baud_base_to_divisor(baud, 48000000);
+}
 
-static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
-  // CP210x Interface includes 1 vendor interface + 2 bulk endpoints
-  TU_VERIFY(itf_desc->bInterfaceSubClass == 0 && itf_desc->bInterfaceProtocol == 0 && itf_desc->bNumEndpoints == 2);
-  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, uint32_t base) {
+  static const unsigned char divfrac[8] = {0, 3, 2, 4, 1, 5, 6, 7};
+  uint32_t divisor;
+  uint32_t divisor3;
 
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
-  TU_VERIFY(p_cdc);
+  /* hi-speed baud rate is 10-bit sampling instead of 16-bit */
+  divisor3 = DIV_ROUND_CLOSEST(8 * base, 10 * baud);
 
-  TU_LOG_DRV("CP210x opened\r\n");
-  p_cdc->serial_drid = SERIAL_DRIVER_CP210X;
+  divisor = divisor3 >> 3;
+  divisor |= (uint32_t) divfrac[divisor3 & 0x7] << 14;
+  /* Deal with special cases for highest baud rates. */
+  if (divisor == 1) /* 1.0 */ {
+    divisor = 0;
+  } else if (divisor == 0x4001) /* 1.5 */ {
+    divisor = 1;
+  }
+  /*
+   * Set this bit to turn off a divide by 2.5 on baud rate generator
+   * This enables baud rates up to 12Mbaud but cannot reach below 1200
+   * baud with this bit set
+   */
+  divisor |= 0x00020000;
+  return divisor;
+}
 
-  // endpoint pair
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+static inline uint32_t ftdi_2232h_baud_to_divisor(uint32_t baud) {
+  return ftdi_2232h_baud_base_to_divisor(baud, (uint32_t) 120000000);
+}
 
-  // data endpoints expected to be in pairs
-  return open_ep_stream_pair(p_cdc, desc_ep);
+static inline uint32_t ftdi_get_divisor(cdch_interface_t *p_cdc) {
+  uint32_t baud = p_cdc->requested_line.coding.bit_rate;
+  uint32_t div_value = 0;
+  TU_VERIFY(baud);
+
+  switch (p_cdc->ftdi.chip_type) {
+    case FTDI_UNKNOWN:
+      return 0;
+    case FTDI_SIO:
+      switch (baud) {
+        case 300: div_value = ftdi_sio_b300; break;
+        case 600: div_value = ftdi_sio_b600; break;
+        case 1200: div_value = ftdi_sio_b1200; break;
+        case 2400: div_value = ftdi_sio_b2400; break;
+        case 4800: div_value = ftdi_sio_b4800; break;
+        case 9600: div_value = ftdi_sio_b9600; break;
+        case 19200: div_value = ftdi_sio_b19200; break;
+        case 38400: div_value = ftdi_sio_b38400; break;
+        case 57600: div_value = ftdi_sio_b57600;  break;
+        case 115200: div_value = ftdi_sio_b115200; break;
+        default:
+          // Baudrate not supported
+          return 0;
+          break;
+      }
+      break;
+      // FT232A not supported
+      // case FT232A:
+      //   if (baud <= 3000000) {
+      //     div_value = ftdi_232am_baud_to_divisor(baud);
+      //   } else {
+      //     // Baud rate too high!
+      //     baud = 9600;
+      //     div_value = ftdi_232am_baud_to_divisor(9600);
+      //     div_okay = false;
+      //   }
+      //   break;
+    case FTDI_FT232B:
+    case FTDI_FT2232C:
+    case FTDI_FT232R:
+    case FTDI_FTX:
+      TU_VERIFY(baud <= 3000000); // else Baud rate too high!
+      div_value = ftdi_232bm_baud_to_divisor(baud);
+      break;
+    case FTDI_FT232H:
+    case FTDI_FT2232H:
+    case FTDI_FT4232H:
+    case FTDI_FT4232HA:
+    case FTDI_FT232HP:
+    case FTDI_FT233HP:
+    case FTDI_FT2232HP:
+    case FTDI_FT2233HP:
+    case FTDI_FT4232HP:
+    case FTDI_FT4233HP:
+    default:
+      TU_VERIFY(baud <= 12000000); // else Baud rate too high!
+      if (baud >= 1200) {
+        div_value = ftdi_2232h_baud_to_divisor(baud);
+      } else {
+        div_value = ftdi_232bm_baud_to_divisor(baud);
+      }
+      break;
+  }
+
+  TU_LOG_CDC(p_cdc, "Baudrate divisor = 0x%lu", div_value);
+
+  return div_value;
 }
 
-static bool cp210x_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_t value, uint8_t* buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+#endif
+
+//--------------------------------------------------------------------+
+// CP210x
+//--------------------------------------------------------------------+
+#if CFG_TUH_CDC_CP210X
+
+//------------- Control Request -------------//
+
+static bool cp210x_set_request(cdch_interface_t * p_cdc, uint8_t command, uint16_t value,
+                               uint8_t * buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_INTERFACE,
@@ -1194,12 +1486,12 @@ static bool cp210x_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_
     },
     .bRequest = command,
     .wValue   = tu_htole16(value),
-    .wIndex   = p_cdc->bInterfaceNumber,
+    .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
     .wLength  = tu_htole16(length)
   };
 
   // use usbh enum buf since application variable does not live long enough
-  uint8_t* enum_buf = NULL;
+  uint8_t * enum_buf = NULL;
 
   if (buffer && length > 0) {
     enum_buf = usbh_get_enum_buf();
@@ -1218,91 +1510,103 @@ static bool cp210x_set_request(cdch_interface_t* p_cdc, uint8_t command, uint16_
   return tuh_control_xfer(&xfer);
 }
 
-static bool cp210x_ifc_enable(cdch_interface_t* p_cdc, uint16_t enabled, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool cp210x_ifc_enable(cdch_interface_t *p_cdc, uint16_t enabled, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return cp210x_set_request(p_cdc, CP210X_IFC_ENABLE, enabled, NULL, 0, complete_cb, user_data);
 }
 
-static bool cp210x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  // TODO implement later
-  (void) p_cdc;
-  (void) line_coding;
-  (void) complete_cb;
-  (void) user_data;
-  return false;
+TU_ATTR_ALWAYS_INLINE static inline bool cp210x_set_mhs(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  // CP210x has the same bit coding
+  return cp210x_set_request(p_cdc, CP210X_SET_MHS,
+                            (uint16_t) (CP210X_CONTROL_WRITE_DTR | CP210X_CONTROL_WRITE_RTS | p_cdc->requested_line.control_state.value),
+                            NULL, 0, complete_cb, user_data);
 }
 
-static bool cp210x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_DRV("CDC CP210x Set BaudRate = %" PRIu32 "\r\n", baudrate);
-  uint32_t baud_le = tu_htole32(baudrate);
-  p_cdc->user_control_cb = complete_cb;
-  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4,
-                            complete_cb ? cdch_internal_control_complete : NULL, user_data);
+//------------- Driver API -------------//
+
+// internal control complete to update state such as line state, encoding
+static void cp210x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_VERIFY(xfer->result == XFER_RESULT_SUCCESS,);
+  switch (xfer->setup->bRequest) {
+    case CP210X_SET_MHS:
+      p_cdc->line.control_state = p_cdc->requested_line.control_state;
+      break;
+
+    case CP210X_SET_LINE_CTL:
+      p_cdc->line.coding.stop_bits = p_cdc->requested_line.coding.stop_bits;
+      p_cdc->line.coding.parity    = p_cdc->requested_line.coding.parity;
+      p_cdc->line.coding.data_bits = p_cdc->requested_line.coding.data_bits;
+      break;
+
+    case CP210X_SET_BAUDRATE:
+      p_cdc->line.coding.bit_rate = p_cdc->requested_line.coding.bit_rate;
+      break;
+
+    default: break;
+  }
 }
 
-static bool cp210x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits,
-                                   tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  (void) p_cdc;
-  (void) stop_bits;
-  (void) parity;
-  (void) data_bits;
-  (void) complete_cb;
-  (void) user_data;
-  // TODO not implemented yet
-  return false;
+static bool cp210x_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  // Not every baud rate is supported. See datasheets and AN205 "CP210x Baud Rate Support"
+  uint32_t baud_le = tu_htole32(p_cdc->requested_line.coding.bit_rate);
+  return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4, complete_cb, user_data);
 }
 
-static bool cp210x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  TU_LOG_DRV("CDC CP210x Set Control Line State\r\n");
-  p_cdc->user_control_cb = complete_cb;
-  return cp210x_set_request(p_cdc, CP210X_SET_MHS, 0x0300 | line_state, NULL, 0,
-                            complete_cb ? cdch_internal_control_complete : NULL, user_data);
+static bool cp210x_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  TU_VERIFY(p_cdc->requested_line.coding.data_bits >= 5 && p_cdc->requested_line.coding.data_bits <= 8, 0);
+  uint16_t lcr = (uint16_t) ((p_cdc->requested_line.coding.data_bits & 0xfUL) << 8 | // data bit quantity is stored in bits 8-11
+                             (p_cdc->requested_line.coding.parity    & 0xfUL) << 4 | // parity is stored in bits 4-7, same coding
+                             (p_cdc->requested_line.coding.stop_bits & 0xfUL));      // parity is stored in bits 0-3, same coding
+
+  return cp210x_set_request(p_cdc, CP210X_SET_LINE_CTL, lcr, NULL, 0, complete_cb, user_data);
 }
 
-static void cp210x_process_config(tuh_xfer_t* xfer) {
-  uintptr_t const state   = xfer->user_data;
-  uint8_t const   itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  uint8_t const   idx     = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t *p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+static bool cp210x_set_modem_ctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return cp210x_set_mhs(p_cdc, complete_cb, user_data);
+}
 
-  switch (state) {
-    case CONFIG_CP210X_IFC_ENABLE:
-      TU_ASSERT(cp210x_ifc_enable(p_cdc, 1, cp210x_process_config, CONFIG_CP210X_SET_BAUDRATE),);
-      break;
+//------------- Enumeration -------------//
 
-    case CONFIG_CP210X_SET_BAUDRATE: {
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      TU_ASSERT(cp210x_set_baudrate(p_cdc, line_coding.bit_rate, cp210x_process_config, CONFIG_CP210X_SET_LINE_CTL),);
-      break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-    }
+enum {
+  CONFIG_CP210X_IFC_ENABLE = 0,
+  CONFIG_CP210X_COMPLETE
+};
 
-    case CONFIG_CP210X_SET_LINE_CTL: {
-      #if defined(CFG_TUH_CDC_LINE_CODING_ON_ENUM) && 0 // skip for now
-      cdc_line_coding_t line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-      break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
-    }
+static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  // CP210x Interface includes 1 vendor interface + 2 bulk endpoints
+  TU_VERIFY(itf_desc->bInterfaceSubClass == 0 && itf_desc->bInterfaceProtocol == 0 && itf_desc->bNumEndpoints == 2);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2 * sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  p_cdc->serial_drid = SERIAL_DRIVER_CP210X;
+
+  // endpoint pair
+  tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
 
-    case CONFIG_CP210X_SET_DTR_RTS:
-      #if CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-      TU_ASSERT(cp210x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, cp210x_process_config, CONFIG_CP210X_COMPLETE),);
+  // data endpoints expected to be in pairs
+  return open_ep_stream_pair(p_cdc, desc_ep);
+}
+
+static bool cp210x_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_ASSERT(xfer->result == XFER_RESULT_SUCCESS);
+  const uintptr_t state = xfer->user_data;
+
+    switch (state) {
+    case CONFIG_CP210X_IFC_ENABLE:
+      TU_ASSERT(cp210x_ifc_enable(p_cdc, CP210X_UART_ENABLE, cdch_process_set_config, CONFIG_CP210X_COMPLETE));
       break;
-      #else
-      TU_ATTR_FALLTHROUGH;
-      #endif
 
     case CONFIG_CP210X_COMPLETE:
-      set_config_complete(p_cdc, idx, itf_num);
+      xfer->user_data = 0;// kick-off set line state on enum
+      cdch_process_line_state_on_enum(xfer);
       break;
 
-    default: break;
+    default:
+      return false;
   }
+
+  return true;
 }
 
 #endif
@@ -1313,13 +1617,14 @@ static void cp210x_process_config(tuh_xfer_t* xfer) {
 
 #if CFG_TUH_CDC_CH34X
 
-static uint8_t ch34x_get_lcr(uint8_t stop_bits, uint8_t parity, uint8_t data_bits);
-static uint16_t ch34x_get_divisor_prescaler(uint32_t baval);
+static uint8_t ch34x_get_lcr(cdch_interface_t *p_cdc);
+static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t *p_cdc);
 
-//------------- control request -------------//
+//------------- Control Request -------------//
 
-static bool ch34x_set_request(cdch_interface_t* p_cdc, uint8_t direction, uint8_t request, uint16_t value,
-                              uint16_t index, uint8_t* buffer, uint16_t length, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ch34x_set_request(cdch_interface_t *p_cdc, uint8_t direction, uint8_t request,
+                              uint16_t value, uint16_t index, uint8_t *buffer, uint16_t length,
+                              tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request_setup = {
       .bmRequestType_bit = {
           .recipient = TUSB_REQ_RCPT_DEVICE,
@@ -1327,13 +1632,13 @@ static bool ch34x_set_request(cdch_interface_t* p_cdc, uint8_t direction, uint8_
           .direction = direction & 0x01u
       },
       .bRequest = request,
-      .wValue   = tu_htole16 (value),
-      .wIndex   = tu_htole16 (index),
-      .wLength  = tu_htole16 (length)
+      .wValue   = tu_htole16(value),
+      .wIndex   = tu_htole16(index),
+      .wLength  = tu_htole16(length)
   };
 
   // use usbh enum buf since application variable does not live long enough
-  uint8_t* enum_buf = NULL;
+  uint8_t *enum_buf = NULL;
 
   if (buffer && length > 0) {
     enum_buf = usbh_get_enum_buf();
@@ -1354,164 +1659,101 @@ static bool ch34x_set_request(cdch_interface_t* p_cdc, uint8_t direction, uint8_
   return tuh_control_xfer(&xfer);
 }
 
-static inline bool ch34x_control_out(cdch_interface_t* p_cdc, uint8_t request, uint16_t value, uint16_t index,
-                                     tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool ch34x_control_out(cdch_interface_t *p_cdc, uint8_t request, uint16_t value, uint16_t index,
+                                                           tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return ch34x_set_request(p_cdc, TUSB_DIR_OUT, request, value, index, NULL, 0, complete_cb, user_data);
 }
 
-static inline bool ch34x_control_in(cdch_interface_t* p_cdc, uint8_t request, uint16_t value, uint16_t index,
-                                    uint8_t* buffer, uint16_t buffersize, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool ch34x_control_in(cdch_interface_t *p_cdc, uint8_t request, uint16_t value, uint16_t index,
+                                                          uint8_t *buffer, uint16_t buffersize, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return ch34x_set_request(p_cdc, TUSB_DIR_IN, request, value, index, buffer, buffersize,
                            complete_cb, user_data);
 }
 
-static inline bool ch34x_write_reg(cdch_interface_t* p_cdc, uint16_t reg, uint16_t reg_value, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool ch34x_write_reg(cdch_interface_t *p_cdc, uint16_t reg, uint16_t reg_value,
+                                                         tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return ch34x_control_out(p_cdc, CH34X_REQ_WRITE_REG, reg, reg_value, complete_cb, user_data);
 }
 
-//static bool ch34x_read_reg_request ( cdch_interface_t* p_cdc, uint16_t reg,
+//static bool ch34x_read_reg_request ( cdch_interface_t * p_cdc, uint16_t reg,
 //                                     uint8_t *buffer, uint16_t buffersize, tuh_xfer_cb_t complete_cb, uintptr_t user_data )
 //{
 //  return ch34x_control_in ( p_cdc, CH34X_REQ_READ_REG, reg, 0, buffer, buffersize, complete_cb, user_data );
 //}
 
-static bool ch34x_write_reg_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate,
-                                     tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  uint16_t const div_ps = ch34x_get_divisor_prescaler(baudrate);
-  TU_VERIFY(div_ps);
-  TU_ASSERT(ch34x_write_reg(p_cdc, CH34X_REG16_DIVISOR_PRESCALER, div_ps,
-                            complete_cb, user_data));
-  return true;
-}
-
 //------------- Driver API -------------//
 
 // internal control complete to update state such as line state, encoding
-static void ch34x_control_complete(tuh_xfer_t* xfer) {
-  // CH34x only has 1 interface and use wIndex as payload and not for bInterfaceNumber
-  process_internal_control_complete(xfer, 0);
-}
-
-static bool ch34x_set_data_format(cdch_interface_t* p_cdc, uint8_t stop_bits, uint8_t parity, uint8_t data_bits,
-                                tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  p_cdc->requested_line_coding.stop_bits = stop_bits;
-  p_cdc->requested_line_coding.parity = parity;
-  p_cdc->requested_line_coding.data_bits = data_bits;
+static void ch34x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_VERIFY(xfer->result == XFER_RESULT_SUCCESS,);
+  switch (xfer->setup->bRequest) {
+    case CH34X_REQ_WRITE_REG:
+      // register write request
+      switch (tu_le16toh(xfer->setup->wValue)) {
+        case CH34X_REG16_DIVISOR_PRESCALER:
+          // baudrate
+          p_cdc->line.coding.bit_rate = p_cdc->requested_line.coding.bit_rate;
+          break;
 
-  uint8_t const lcr = ch34x_get_lcr(stop_bits, parity, data_bits);
-  TU_VERIFY(lcr);
-  TU_ASSERT (ch34x_control_out(p_cdc, CH34X_REQ_WRITE_REG, CH32X_REG16_LCR2_LCR, lcr,
-                               complete_cb ? ch34x_control_complete : NULL, user_data));
-  return true;
-}
+        case CH32X_REG16_LCR2_LCR:
+          // data format
+          p_cdc->line.coding.stop_bits = p_cdc->requested_line.coding.stop_bits;
+          p_cdc->line.coding.parity    = p_cdc->requested_line.coding.parity;
+          p_cdc->line.coding.data_bits = p_cdc->requested_line.coding.data_bits;
+          break;
 
-static bool ch34x_set_baudrate(cdch_interface_t* p_cdc, uint32_t baudrate,
-                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  p_cdc->requested_line_coding.bit_rate = baudrate;
-  p_cdc->user_control_cb = complete_cb;
-  TU_ASSERT(ch34x_write_reg_baudrate(p_cdc, baudrate,
-                                     complete_cb ? ch34x_control_complete : NULL, user_data));
-  return true;
-}
+        default: break;
+      }
+      break;
 
-static void ch34x_set_line_coding_stage1_complete(tuh_xfer_t* xfer) {
-  // CH34x only has 1 interface and use wIndex as payload and not for bInterfaceNumber
-  uint8_t const itf_num = 0;
-  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t* p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc, );
+    case CH34X_REQ_MODEM_CTRL:
+      p_cdc->line.control_state = p_cdc->requested_line.control_state;
+      break;
 
-  if (xfer->result == XFER_RESULT_SUCCESS) {
-    // stage 1 success, continue to stage 2
-    p_cdc->line_coding.bit_rate = p_cdc->requested_line_coding.bit_rate;
-    TU_ASSERT(ch34x_set_data_format(p_cdc, p_cdc->requested_line_coding.stop_bits, p_cdc->requested_line_coding.parity,
-                                    p_cdc->requested_line_coding.data_bits, ch34x_control_complete, xfer->user_data), );
-  } else {
-    // stage 1 failed, notify user
-    xfer->complete_cb = p_cdc->user_control_cb;
-    if (xfer->complete_cb) {
-      xfer->complete_cb(xfer);
-    }
+    default: break;
   }
 }
 
-// 2 stages: set baudrate (stage1) + set data format (stage2)
-static bool ch34x_set_line_coding(cdch_interface_t* p_cdc, cdc_line_coding_t const* line_coding,
-                                  tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  p_cdc->requested_line_coding = *line_coding;
-  p_cdc->user_control_cb = complete_cb;
-
-  if (complete_cb) {
-    // stage 1 set baudrate
-    TU_ASSERT(ch34x_write_reg_baudrate(p_cdc, line_coding->bit_rate,
-                                       ch34x_set_line_coding_stage1_complete, user_data));
-  } else {
-    // sync call
-    xfer_result_t result;
-
-    // stage 1 set baudrate
-    TU_ASSERT(ch34x_write_reg_baudrate(p_cdc, line_coding->bit_rate, NULL, (uintptr_t) &result));
-    TU_VERIFY(result == XFER_RESULT_SUCCESS);
-    p_cdc->line_coding.bit_rate = line_coding->bit_rate;
-
-    // stage 2 set data format
-    TU_ASSERT(ch34x_set_data_format(p_cdc, line_coding->stop_bits, line_coding->parity, line_coding->data_bits,
-                                    NULL, (uintptr_t) &result));
-    TU_VERIFY(result == XFER_RESULT_SUCCESS);
-    p_cdc->line_coding.stop_bits = line_coding->stop_bits;
-    p_cdc->line_coding.parity = line_coding->parity;
-    p_cdc->line_coding.data_bits = line_coding->data_bits;
-
-    // update transfer result, user_data is expected to point to xfer_result_t
-    if (user_data) {
-      *((xfer_result_t*) user_data) = result;
-    }
-  }
-
-  return true;
+static bool ch34x_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  const uint8_t lcr = ch34x_get_lcr(p_cdc);
+  TU_VERIFY(lcr);
+  return ch34x_write_reg(p_cdc, CH32X_REG16_LCR2_LCR, lcr, complete_cb, user_data);
 }
 
-static bool ch34x_set_modem_ctrl(cdch_interface_t* p_cdc, uint16_t line_state,
-                                 tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  uint8_t control = 0;
-  if (line_state & CDC_CONTROL_LINE_STATE_RTS) {
-    control |= CH34X_BIT_RTS;
-  }
-  if (line_state & CDC_CONTROL_LINE_STATE_DTR) {
-    control |= CH34X_BIT_DTR;
-  }
+static bool ch34x_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  const uint16_t div_ps = ch34x_get_divisor_prescaler(p_cdc);
+  TU_VERIFY(div_ps);
+  return ch34x_write_reg(p_cdc, CH34X_REG16_DIVISOR_PRESCALER, div_ps, complete_cb, user_data);
+}
 
+static bool ch34x_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // CH34x signals are inverted
-  control = ~control;
-
-  p_cdc->user_control_cb = complete_cb;
-  TU_ASSERT (ch34x_control_out(p_cdc, CH34X_REQ_MODEM_CTRL, control, 0,
-                               complete_cb ? ch34x_control_complete : NULL, user_data));
-  return true;
+  uint8_t control = ~((p_cdc->requested_line.control_state.rts ? CH34X_BIT_RTS : 0) |
+                      (p_cdc->requested_line.control_state.dtr ? CH34X_BIT_DTR : 0));
+  return ch34x_control_out(p_cdc, CH34X_REQ_MODEM_CTRL, control, 0, complete_cb, user_data);
 }
 
 //------------- Enumeration -------------//
+
 enum {
   CONFIG_CH34X_READ_VERSION = 0,
   CONFIG_CH34X_SERIAL_INIT,
   CONFIG_CH34X_SPECIAL_REG_WRITE,
   CONFIG_CH34X_FLOW_CONTROL,
-  CONFIG_CH34X_MODEM_CONTROL,
   CONFIG_CH34X_COMPLETE
 };
 
-static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uint16_t max_len) {
+static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len) {
   // CH34x Interface includes 1 vendor interface + 2 bulk + 1 interrupt endpoints
-  TU_VERIFY (itf_desc->bNumEndpoints == 3);
-  TU_VERIFY (sizeof(tusb_desc_interface_t) + 3 * sizeof(tusb_desc_endpoint_t) <= max_len);
+  TU_VERIFY(itf_desc->bNumEndpoints == 3);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 3 * sizeof(tusb_desc_endpoint_t) <= max_len);
 
-  cdch_interface_t* p_cdc = make_new_itf(daddr, itf_desc);
-  TU_VERIFY (p_cdc);
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
 
-  TU_LOG_DRV ("CH34x opened\r\n");
   p_cdc->serial_drid = SERIAL_DRIVER_CH34X;
 
-  tusb_desc_endpoint_t const* desc_ep = (tusb_desc_endpoint_t const*) tu_desc_next(itf_desc);
+  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
 
   // data endpoints expected to be in pairs
   TU_ASSERT(open_ep_stream_pair(p_cdc, desc_ep));
@@ -1526,69 +1768,66 @@ static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uin
   return true;
 }
 
-static void ch34x_process_config(tuh_xfer_t* xfer) {
-  // CH34x only has 1 interface and use wIndex as payload and not for bInterfaceNumber
-  uint8_t const itf_num = 0;
-  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t* p_cdc = get_itf(idx);
-  uintptr_t const state = xfer->user_data;
-  uint8_t buffer[2]; // TODO remove
-  TU_ASSERT (p_cdc,);
-  TU_ASSERT (xfer->result == XFER_RESULT_SUCCESS,);
+static bool ch34x_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_ASSERT(xfer->result == XFER_RESULT_SUCCESS);
+  const uintptr_t state = xfer->user_data;
 
   switch (state) {
-    case CONFIG_CH34X_READ_VERSION:
-      TU_LOG_DRV("[%u] CDCh CH34x attempt to read Chip Version\r\n", p_cdc->daddr);
-      TU_ASSERT (ch34x_control_in(p_cdc, CH34X_REQ_READ_VERSION, 0, 0, buffer, 2, ch34x_process_config, CONFIG_CH34X_SERIAL_INIT),);
+    case CONFIG_CH34X_READ_VERSION: {
+      uint8_t* enum_buf = usbh_get_enum_buf();
+      TU_ASSERT(ch34x_control_in(p_cdc, CH34X_REQ_READ_VERSION, 0, 0, enum_buf, 2,
+                                 cdch_process_set_config, CONFIG_CH34X_SERIAL_INIT));
       break;
+    }
 
     case CONFIG_CH34X_SERIAL_INIT: {
       // handle version read data, set CH34x line coding (incl. baudrate)
       uint8_t const version = xfer->buffer[0];
-      TU_LOG_DRV("[%u] CDCh CH34x Chip Version = %02x\r\n", p_cdc->daddr, version);
-      // only versions >= 0x30 are tested, below 0x30 seems having other programming, see drivers from WCH vendor, Linux kernel and FreeBSD
-      TU_ASSERT (version >= 0x30,);
-      // init CH34x with line coding
-      cdc_line_coding_t const line_coding = CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X;
-      uint16_t const div_ps = ch34x_get_divisor_prescaler(line_coding.bit_rate);
-      TU_ASSERT(div_ps, );
-      uint8_t const lcr = ch34x_get_lcr(line_coding.stop_bits, line_coding.parity, line_coding.data_bits);
-      TU_ASSERT(lcr, );
-      TU_ASSERT (ch34x_control_out(p_cdc, CH34X_REQ_SERIAL_INIT, tu_u16(lcr, 0x9c), div_ps,
-                                   ch34x_process_config, CONFIG_CH34X_SPECIAL_REG_WRITE),);
+      TU_LOG_CDC(p_cdc, "Chip Version = 0x%02x", version);
+      // only versions >= 0x30 are tested, below 0x30 seems having other programming
+      // see drivers from WCH vendor, Linux kernel and FreeBSD
+      if (version >= 0x30) {
+        // init CH34x with line coding
+        p_cdc->requested_line.coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X;
+        uint16_t const div_ps = ch34x_get_divisor_prescaler(p_cdc);
+        uint8_t const lcr = ch34x_get_lcr(p_cdc);
+        TU_ASSERT(div_ps != 0 && lcr != 0);
+        TU_ASSERT(ch34x_control_out(p_cdc, CH34X_REQ_SERIAL_INIT, tu_u16(lcr, 0x9c), div_ps,
+                                    cdch_process_set_config, CONFIG_CH34X_SPECIAL_REG_WRITE));
+      }
       break;
     }
 
     case CONFIG_CH34X_SPECIAL_REG_WRITE:
       // overtake line coding and do special reg write, purpose unknown, overtaken from WCH driver
-      p_cdc->line_coding = ((cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X);
-      TU_ASSERT (ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x0F, CH341_REG_0x2C), 0x0007, ch34x_process_config, CONFIG_CH34X_FLOW_CONTROL),);
+      p_cdc->line.coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X;
+      TU_ASSERT(ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x0F, CH341_REG_0x2C), 0x0007,
+                                cdch_process_set_config, CONFIG_CH34X_FLOW_CONTROL));
       break;
 
     case CONFIG_CH34X_FLOW_CONTROL:
       // no hardware flow control
-      TU_ASSERT (ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x27, CH341_REG_0x27), 0x0000, ch34x_process_config, CONFIG_CH34X_MODEM_CONTROL),);
-      break;
-
-    case CONFIG_CH34X_MODEM_CONTROL:
-      // !always! set modem controls RTS/DTR (CH34x has no reset state after CH34X_REQ_SERIAL_INIT)
-      TU_ASSERT (ch34x_set_modem_ctrl(p_cdc, CFG_TUH_CDC_LINE_CONTROL_ON_ENUM, ch34x_process_config, CONFIG_CH34X_COMPLETE),);
+      TU_ASSERT(ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x27, CH341_REG_0x27), 0x0000,
+                                cdch_process_set_config, CONFIG_CH34X_COMPLETE));
       break;
 
     case CONFIG_CH34X_COMPLETE:
-      set_config_complete(p_cdc, idx, itf_num);
+      xfer->user_data = 0; // kick-off set line state on enum
+      cdch_process_line_state_on_enum(xfer);
       break;
 
     default:
-      TU_ASSERT (false,);
-      break;
+      return false;
   }
+
+  return true;
 }
 
-//------------- CH34x helper  -------------//
+//------------- Helper -------------//
 
 // calculate divisor and prescaler for baudrate, return it as 16-bit combined value
-static uint16_t ch34x_get_divisor_prescaler(uint32_t baval) {
+static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t *p_cdc) {
+  uint32_t const baval = p_cdc->requested_line.coding.bit_rate;
   uint8_t a;
   uint8_t b;
   uint32_t c;
@@ -1633,16 +1872,20 @@ static uint16_t ch34x_get_divisor_prescaler(uint32_t baval) {
   // reg divisor = a, reg prescaler = b
   // According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE,
   // otherwise the chip will buffer data.
-  return (uint16_t) ((uint16_t)a << 8 | 0x80 | b);
+  return (uint16_t) ((uint16_t) a << 8 | 0x80 | b);
 }
 
 // calculate lcr value from data coding
-static uint8_t ch34x_get_lcr(uint8_t stop_bits, uint8_t parity, uint8_t data_bits) {
+static uint8_t ch34x_get_lcr(cdch_interface_t *p_cdc) {
+  uint8_t const stop_bits = p_cdc->requested_line.coding.stop_bits;
+  uint8_t const parity = p_cdc->requested_line.coding.parity;
+  uint8_t const data_bits = p_cdc->requested_line.coding.data_bits;
+
   uint8_t lcr = CH34X_LCR_ENABLE_RX | CH34X_LCR_ENABLE_TX;
-  TU_VERIFY(data_bits >= 5 && data_bits <= 8, 0);
+  TU_VERIFY(data_bits >= 5 && data_bits <= 8);
   lcr |= (uint8_t) (data_bits - 5);
 
-  switch(parity) {
+  switch (parity) {
     case CDC_LINE_CODING_PARITY_NONE:
       break;
 
@@ -1666,7 +1909,7 @@ static uint8_t ch34x_get_lcr(uint8_t stop_bits, uint8_t parity, uint8_t data_bit
   }
 
   // 1.5 stop bits not supported
-  TU_VERIFY(stop_bits != CDC_LINE_CODING_STOP_BITS_1_5, 0);
+  TU_VERIFY(stop_bits != CDC_LINE_CODING_STOP_BITS_1_5);
   if (stop_bits == CDC_LINE_CODING_STOP_BITS_2) {
     lcr |= CH34X_LCR_STOP_BITS_2;
   }
@@ -1674,7 +1917,612 @@ static uint8_t ch34x_get_lcr(uint8_t stop_bits, uint8_t parity, uint8_t data_bit
   return lcr;
 }
 
-
 #endif // CFG_TUH_CDC_CH34X
 
+//--------------------------------------------------------------------+
+// PL2303
+//--------------------------------------------------------------------+
+#if CFG_TUH_CDC_PL2303
+
+static pl2303_type_t pl2303_detect_type(cdch_interface_t *p_cdc, uint8_t step);
+static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE]);
+
+//------------- Control Request -------------//
+static bool pl2303_set_request(cdch_interface_t *p_cdc, uint8_t request, uint8_t requesttype,
+                               uint16_t value, uint16_t index, uint8_t *buffer, uint16_t length,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request_setup = {
+    .bmRequestType = requesttype,
+    .bRequest      = request,
+    .wValue        = tu_htole16(value),
+    .wIndex        = tu_htole16(index),
+    .wLength       = tu_htole16(length)
+  };
+
+  // use usbh enum buf since application variable does not live long enough
+  uint8_t *enum_buf = NULL;
+
+  if (buffer && length > 0) {
+    enum_buf = usbh_get_enum_buf();
+    if (request_setup.bmRequestType_bit.direction == TUSB_DIR_OUT) {
+      tu_memcpy_s(enum_buf, CFG_TUH_ENUMERATION_BUFSIZE, buffer, length);
+    }
+  }
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request_setup,
+    .buffer      = enum_buf,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  return tuh_control_xfer(&xfer);
+}
+
+static bool pl2303_vendor_read(cdch_interface_t *p_cdc, uint16_t value, uint8_t *buf,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint8_t request = p_cdc->pl2303.type == PL2303_TYPE_HXN ? PL2303_VENDOR_READ_NREQUEST : PL2303_VENDOR_READ_REQUEST;
+  return pl2303_set_request(p_cdc, request, PL2303_VENDOR_READ_REQUEST_TYPE, value, 0, buf, 1, complete_cb, user_data);
+}
+
+static bool pl2303_vendor_write(cdch_interface_t *p_cdc, uint16_t value, uint16_t index,
+                                tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint8_t request = p_cdc->pl2303.type == PL2303_TYPE_HXN ? PL2303_VENDOR_WRITE_NREQUEST : PL2303_VENDOR_WRITE_REQUEST;
+  return pl2303_set_request(p_cdc, request, PL2303_VENDOR_WRITE_REQUEST_TYPE, value, index, NULL, 0, complete_cb, user_data);
+}
+
+static inline bool pl2303_supports_hx_status(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint8_t buf = 0;
+  return pl2303_set_request(p_cdc, PL2303_VENDOR_READ_REQUEST, PL2303_VENDOR_READ_REQUEST_TYPE, PL2303_READ_TYPE_HX_STATUS, 0,
+                            &buf, 1, complete_cb, user_data);
+}
+
+//static bool pl2303_get_line_request(cdch_interface_t * p_cdc, uint8_t buf[PL2303_LINE_CODING_BUFSIZE]) {
+//  return pl2303_set_request(p_cdc, PL2303_GET_LINE_REQUEST, PL2303_GET_LINE_REQUEST_TYPE, 0, 0, buf, PL2303_LINE_CODING_BUFSIZE);
+//}
+
+//static bool pl2303_set_break(cdch_interface_t * p_cdc, bool enable) {
+//  uint16_t state = enable ? PL2303_BREAK_ON : PL2303_BREAK_OFF;
+//  return pl2303_set_request(p_cdc, PL2303_BREAK_REQUEST, PL2303_BREAK_REQUEST_TYPE, state, 0, NULL, 0);
+//}
+
+static inline int pl2303_clear_halt(cdch_interface_t *p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  /* we don't care if it wasn't halted first. in fact some devices
+   * (like some ibmcam model 1 units) seem to expect hosts to make
+   * this request for iso endpoints, which can't halt!
+   */
+  return pl2303_set_request(p_cdc, TUSB_REQ_CLEAR_FEATURE, PL2303_CLEAR_HALT_REQUEST_TYPE, TUSB_REQ_FEATURE_EDPT_HALT, endp,
+                            NULL, 0, complete_cb, user_data);
+}
+
+//------------- Driver API -------------//
+
+// internal control complete to update state such as line state, encoding
+static void pl2303_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  TU_VERIFY(xfer->result == XFER_RESULT_SUCCESS,);
+  if (xfer->setup->bRequest == PL2303_SET_LINE_REQUEST &&
+      xfer->setup->bmRequestType == PL2303_SET_LINE_REQUEST_TYPE) {
+    p_cdc->line.coding = p_cdc->requested_line.coding;
+  }
+  if (xfer->setup->bRequest == PL2303_SET_CONTROL_REQUEST &&
+      xfer->setup->bmRequestType == PL2303_SET_CONTROL_REQUEST_TYPE) {
+    p_cdc->line.control_state = p_cdc->requested_line.control_state;
+  }
+}
+
+static bool pl2303_set_line_coding(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  // the caller has to precheck, that the new line coding different than the current, else false returned
+  uint8_t buf[PL2303_LINE_CODING_BUFSIZE];
+  /*
+   * Some PL2303 are known to lose bytes if you change serial settings
+   * even to the same values as before. Thus we actually need to filter
+   * in this specific case.
+   */
+  TU_VERIFY(p_cdc->requested_line.coding.data_bits != p_cdc->line.coding.data_bits ||
+            p_cdc->requested_line.coding.stop_bits != p_cdc->line.coding.stop_bits ||
+            p_cdc->requested_line.coding.parity    != p_cdc->line.coding.parity    ||
+            p_cdc->requested_line.coding.bit_rate  != p_cdc->line.coding.bit_rate );
+
+  /* For reference buf[6] data bits value */
+  TU_VERIFY(p_cdc->requested_line.coding.data_bits >= 5 && p_cdc->requested_line.coding.data_bits <= 8, 0);
+  buf[6] = p_cdc->requested_line.coding.data_bits;
+
+  /* For reference buf[0]:buf[3] baud rate value */
+  TU_VERIFY(pl2303_encode_baud_rate(p_cdc, &buf[0]));
+
+  /* For reference buf[4]=0 is 1 stop bits */
+  /* For reference buf[4]=1 is 1.5 stop bits */
+  /* For reference buf[4]=2 is 2 stop bits */
+  buf[4] = p_cdc->requested_line.coding.stop_bits; // PL2303 has the same coding
+
+  /* For reference buf[5]=0 is none parity */
+  /* For reference buf[5]=1 is odd parity */
+  /* For reference buf[5]=2 is even parity */
+  /* For reference buf[5]=3 is mark parity */
+  /* For reference buf[5]=4 is space parity */
+  buf[5] = p_cdc->requested_line.coding.parity; // PL2303 has the same coding
+
+  return pl2303_set_request(p_cdc, PL2303_SET_LINE_REQUEST, PL2303_SET_LINE_REQUEST_TYPE, 0, 0,
+                            buf, PL2303_LINE_CODING_BUFSIZE, complete_cb, user_data);
+}
+
+static bool pl2303_set_modem_ctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  // PL2303 has the same bit coding
+  return pl2303_set_request(p_cdc, PL2303_SET_CONTROL_REQUEST, PL2303_SET_CONTROL_REQUEST_TYPE,
+                            p_cdc->requested_line.control_state.value, 0, NULL, 0, complete_cb, user_data);
+}
+
+//------------- Enumeration -------------//
+
+enum {
+  CONFIG_PL2303_DETECT_TYPE = 0,
+  CONFIG_PL2303_READ1,
+  CONFIG_PL2303_WRITE1,
+  CONFIG_PL2303_READ2,
+  CONFIG_PL2303_READ3,
+  CONFIG_PL2303_READ4,
+  CONFIG_PL2303_WRITE2,
+  CONFIG_PL2303_READ5,
+  CONFIG_PL2303_READ6,
+  CONFIG_PL2303_WRITE3,
+  CONFIG_PL2303_WRITE4,
+  CONFIG_PL2303_WRITE5,
+  CONFIG_PL2303_RESET_ENDP1,
+  CONFIG_PL2303_RESET_ENDP2,
+//  CONFIG_PL2303_FLOW_CTRL_READ,
+//  CONFIG_PL2303_FLOW_CTRL_WRITE,
+  CONFIG_PL2303_COMPLETE
+};
+
+static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  // PL2303 Interface includes 1 vendor interface + 1 interrupt endpoints + 2 bulk
+  TU_VERIFY(itf_desc->bNumEndpoints == 3);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 3 * sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  p_cdc->serial_drid = SERIAL_DRIVER_PL2303;
+  p_cdc->pl2303.quirks = 0;
+  p_cdc->pl2303.supports_hx_status = false;
+
+  tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+
+  // Interrupt endpoint: not used for now
+  TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(desc_ep) &&
+            TUSB_XFER_INTERRUPT == desc_ep->bmAttributes.xfer);
+  TU_ASSERT(tuh_edpt_open(daddr, desc_ep));
+  p_cdc->ep_notif = desc_ep->bEndpointAddress;
+  desc_ep += 1;
+
+  // data endpoints expected to be in pairs
+  TU_ASSERT(open_ep_stream_pair(p_cdc, desc_ep));
+
+  return true;
+}
+
+static bool pl2303_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer) {
+  // state CONFIG_PL2303_READ1 may have no success due to expected stall by pl2303_supports_hx_status()
+  const uintptr_t state = xfer->user_data;
+  TU_ASSERT(xfer->result == XFER_RESULT_SUCCESS || state == CONFIG_PL2303_READ1);
+  uint8_t* enum_buf = usbh_get_enum_buf();
+  pl2303_type_t type;
+
+  switch (state) {
+    // from here sequence overtaken from Linux Kernel function pl2303_startup()
+    case CONFIG_PL2303_DETECT_TYPE:
+      // get type and quirks (step 1)
+      type = pl2303_detect_type(p_cdc, 1);
+      TU_ASSERT(type != PL2303_TYPE_UNKNOWN);
+      if (type == PL2303_TYPE_NEED_SUPPORTS_HX_STATUS) {
+        TU_ASSERT(pl2303_supports_hx_status(p_cdc, cdch_process_set_config, CONFIG_PL2303_READ1));
+        break;
+      } else {
+        // no transfer triggered and continue with CONFIG_PL2303_READ1
+        TU_ATTR_FALLTHROUGH;
+      }
+
+    case CONFIG_PL2303_READ1:
+      // get supports_hx_status, type and quirks (step 2), do special read
+      // will not be true, if coming directly from previous case
+      if (xfer->user_data == CONFIG_PL2303_READ1 && xfer->result == XFER_RESULT_SUCCESS) {
+        p_cdc->pl2303.supports_hx_status = true;
+      }
+      type = pl2303_detect_type(p_cdc, 2); // step 2 now with supports_hx_status
+      TU_ASSERT(type != PL2303_TYPE_UNKNOWN);
+      TU_LOG_DRV("  PL2303 type detected: %u\r\n", type);
+
+      p_cdc->pl2303.type = type;
+      p_cdc->pl2303.quirks |= pl2303_type_data[type].quirks;
+
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, enum_buf, cdch_process_set_config, CONFIG_PL2303_WRITE1));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE1:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 0x0404, 0, cdch_process_set_config, CONFIG_PL2303_READ2));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ2:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, enum_buf, cdch_process_set_config, CONFIG_PL2303_READ3));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ3:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8383, enum_buf, cdch_process_set_config, CONFIG_PL2303_READ4));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ4:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, enum_buf, cdch_process_set_config, CONFIG_PL2303_WRITE2));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE2:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 0x0404, 1, cdch_process_set_config, CONFIG_PL2303_READ5));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ5:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, enum_buf, cdch_process_set_config, CONFIG_PL2303_READ6));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ6:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8383, enum_buf, cdch_process_set_config, CONFIG_PL2303_WRITE3));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE3:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 0, 1, cdch_process_set_config, CONFIG_PL2303_WRITE4));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE4:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 1, 0, cdch_process_set_config, CONFIG_PL2303_WRITE5));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE5:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.type != PL2303_TYPE_HXN) {
+        uint16_t const windex = (p_cdc->pl2303.quirks & PL2303_QUIRK_LEGACY) ? 0x24 : 0x44;
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 2, windex, cdch_process_set_config, CONFIG_PL2303_RESET_ENDP1));
+        break;
+      }// else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    // from here sequence overtaken from Linux Kernel function pl2303_open()
+    case CONFIG_PL2303_RESET_ENDP1:
+      // step 1
+      if (p_cdc->pl2303.quirks & PL2303_QUIRK_LEGACY) {
+        TU_ASSERT(pl2303_clear_halt(p_cdc, PL2303_OUT_EP, cdch_process_set_config, CONFIG_PL2303_RESET_ENDP2));
+      } else {
+        /* reset upstream data pipes */
+        if (p_cdc->pl2303.type == PL2303_TYPE_HXN) {
+          TU_ASSERT(pl2303_vendor_write(p_cdc, PL2303_HXN_RESET_REG,// skip CONFIG_PL2303_RESET_ENDP2, no 2nd step
+                                        PL2303_HXN_RESET_UPSTREAM_PIPE | PL2303_HXN_RESET_DOWNSTREAM_PIPE,
+                                        cdch_process_set_config, CONFIG_PL2303_COMPLETE));
+        } else {
+          pl2303_vendor_write(p_cdc, 8, 0, cdch_process_set_config, CONFIG_PL2303_RESET_ENDP2);
+        }
+      }
+      break;
+
+    case CONFIG_PL2303_RESET_ENDP2:
+      // step 2
+      if (p_cdc->pl2303.quirks & PL2303_QUIRK_LEGACY) {
+        TU_ASSERT(pl2303_clear_halt(p_cdc, PL2303_IN_EP, cdch_process_set_config, CONFIG_PL2303_COMPLETE));
+      } else {
+        /* reset upstream data pipes */
+        if (p_cdc->pl2303.type == PL2303_TYPE_HXN) {
+          // here nothing to do, only structure of previous step overtaken for better reading and comparison
+        } else {
+          TU_ASSERT(pl2303_vendor_write(p_cdc, 9, 0, cdch_process_set_config, CONFIG_PL2303_COMPLETE));
+        }
+      }
+      break;
+
+  // skipped, because it's not working with each PL230x. flow control can be also set by PL2303 EEPROM Writer Program
+  //    case CONFIG_PL2303_FLOW_CTRL_READ:
+  //      // read flow control register for modify & write back in next step
+  //      if (p_cdc->pl2303.type == PL2303_TYPE_HXN) {
+  //        TU_LOG_P_CDC ( "1\r\n" );
+  //        TU_ASSERT(pl2303_vendor_read(p_cdc, PL2303_HXN_FLOWCTRL_REG, &buf,
+  //                                     cdch_process_set_config, CONFIG_PL2303_FLOW_CTRL_WRITE));
+  //      } else {
+  //        TU_LOG_P_CDC ( "2\r\n" );
+  //        TU_ASSERT(pl2303_vendor_read(p_cdc, 0, &buf, cdch_process_set_config, CONFIG_PL2303_FLOW_CTRL_WRITE));
+  //      }
+  //      break;
+  //
+  //    case CONFIG_PL2303_FLOW_CTRL_WRITE:
+  //      // no flow control
+  //      buf = xfer->buffer[0];
+  //      if (p_cdc->pl2303.type == PL2303_TYPE_HXN) {
+  //        buf &= (uint8_t) ~PL2303_HXN_FLOWCTRL_MASK;
+  //        buf |= PL2303_HXN_FLOWCTRL_NONE;
+  //        TU_ASSERT(pl2303_vendor_write(p_cdc, PL2303_HXN_FLOWCTRL_REG, buf,
+  //                                      cdch_process_set_config, CONFIG_PL2303_COMPLETE));
+  //      } else {
+  //        buf &= (uint8_t) ~PL2303_FLOWCTRL_MASK;
+  //        TU_ASSERT(pl2303_vendor_write(p_cdc, 0, buf,
+  //                                      cdch_process_set_config, CONFIG_PL2303_COMPLETE));
+  //      }
+  //      break;
+
+    case CONFIG_PL2303_COMPLETE:
+      xfer->user_data = 0; // kick-off set line state on enum
+      cdch_process_line_state_on_enum(xfer);
+      break;
+
+    default:
+      return false;
+  }
+
+  return true;
+}
+
+//------------- Helper -------------//
+
+static pl2303_type_t pl2303_detect_type(cdch_interface_t *p_cdc, uint8_t step) {
+  tusb_desc_device_t desc_dev;
+  TU_VERIFY(tuh_descriptor_get_device_local(p_cdc->daddr, &desc_dev), PL2303_TYPE_UNKNOWN);
+
+  // Legacy PL2303H, variants 0 and 1 (difference unknown).
+  if (desc_dev.bDeviceClass == 0x02) {
+    return PL2303_TYPE_H; /* variant 0 */
+  }
+
+  if (desc_dev.bMaxPacketSize0 != 0x40) {
+    if (desc_dev.bDeviceClass == 0x00 || desc_dev.bDeviceClass == 0xff) {
+      return PL2303_TYPE_H; /* variant 1 */
+    }
+    return PL2303_TYPE_H; /* variant 0 */
+  }
+
+  switch (desc_dev.bcdUSB) {
+    case 0x101:
+      /* USB 1.0.1? Let's assume they meant 1.1... */
+      TU_ATTR_FALLTHROUGH;
+    case 0x110:
+      switch (desc_dev.bcdDevice) {
+        case 0x300: return PL2303_TYPE_HX;
+        case 0x400: return PL2303_TYPE_HXD;
+        default: return PL2303_TYPE_HX;
+      }
+      break;
+
+    case 0x200:
+      switch (desc_dev.bcdDevice) {
+        case 0x100: /* GC */
+        case 0x105:
+          return PL2303_TYPE_HXN;
+
+        case 0x300: /* GT / TA */
+          if (step == 1) {
+            // step 1 trigger pl2303_supports_hx_status() request
+            return PL2303_TYPE_NEED_SUPPORTS_HX_STATUS;
+          } else {
+            // step 2 use supports_hx_status
+            if (p_cdc->pl2303.supports_hx_status) {
+              return PL2303_TYPE_TA;
+            }
+          }
+          TU_ATTR_FALLTHROUGH;
+        case 0x305:
+        case 0x400: /* GL */
+        case 0x405:
+          return PL2303_TYPE_HXN;
+
+        case 0x500: /* GE / TB */
+          if (step == 1) {
+            // step 1 trigger pl2303_supports_hx_status() request
+            return PL2303_TYPE_NEED_SUPPORTS_HX_STATUS;
+          } else {
+            // step 2 use supports_hx_status
+            if (p_cdc->pl2303.supports_hx_status) {
+              return PL2303_TYPE_TB;
+            }
+          }
+          TU_ATTR_FALLTHROUGH;
+        case 0x505:
+        case 0x600: /* GS */
+        case 0x605:
+        case 0x700: /* GR */
+        case 0x705:
+          return PL2303_TYPE_HXN;
+
+        default:
+          break;
+      }
+      break;
+    default: break;
+  }
+
+  TU_LOG_CDC(p_cdc, "unknown device type bcdUSB = 0x%04x", desc_dev.bcdUSB);
+  return PL2303_TYPE_UNKNOWN;
+}
+
+/*
+ * Returns the nearest supported baud rate that can be set directly without
+ * using divisors.
+ */
+static uint32_t pl2303_get_supported_baud_rate(uint32_t baud) {
+  static const uint32_t baud_sup[] = {
+    75, 150, 300, 600, 1200, 1800, 2400, 3600, 4800, 7200, 9600,
+    14400, 19200, 28800, 38400, 57600, 115200, 230400, 460800,
+    614400, 921600, 1228800, 2457600, 3000000, 6000000
+  };
+
+  uint8_t i;
+  for (i = 0; i < TU_ARRAY_SIZE(baud_sup); ++i) {
+    if (baud_sup[i] > baud) {
+      break;
+    }
+  }
+
+  if (i == TU_ARRAY_SIZE(baud_sup)) {
+    baud = baud_sup[i - 1];
+  } else if (i > 0 && (baud_sup[i] - baud) > (baud - baud_sup[i - 1])) {
+    baud = baud_sup[i - 1];
+  } else {
+    baud = baud_sup[i];
+  }
+
+  return baud;
+}
+
+/*
+ * NOTE: If unsupported baud rates are set directly, the PL2303 seems to
+ *       use 9600 baud.
+ */
+static uint32_t pl2303_encode_baud_rate_direct(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud) {
+  uint32_t baud_le = tu_htole32(baud);
+  buf[0] = (uint8_t) ( baud_le        & 0xff);
+  buf[1] = (uint8_t) ((baud_le >>  8) & 0xff);
+  buf[2] = (uint8_t) ((baud_le >> 16) & 0xff);
+  buf[3] = (uint8_t) ((baud_le >> 24) & 0xff);
+
+  return baud;
+}
+
+static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud) {
+  uint32_t baseline, mantissa, exponent;
+
+  /*
+   * Apparently the formula is:
+   *   baudrate = 12M * 32 / (mantissa * 4^exponent)
+   * where
+   *   mantissa = buf[8:0]
+   *   exponent = buf[11:9]
+   */
+  baseline = 12000000 * 32;
+  mantissa = baseline / baud;
+  if (mantissa == 0)
+    mantissa = 1; /* Avoid dividing by zero if baud > 32 * 12M. */
+  exponent = 0;
+  while (mantissa >= 512) {
+    if (exponent < 7) {
+      mantissa >>= 2; /* divide by 4 */
+      exponent++;
+    } else {
+      /* Exponent is maxed. Trim mantissa and leave. */
+      mantissa = 511;
+      break;
+    }
+  }
+
+  buf[3] = 0x80;
+  buf[2] = 0;
+  buf[1] = (uint8_t) ((exponent << 1 | mantissa >> 8) & 0xff);
+  buf[0] = (uint8_t) (mantissa & 0xff);
+
+  /* Calculate and return the exact baud rate. */
+  baud = (baseline / mantissa) >> (exponent << 1);
+
+  return baud;
+}
+
+static uint32_t pl2303_encode_baud_rate_divisor_alt(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud) {
+  uint32_t baseline, mantissa, exponent;
+
+  /*
+   * Apparently, for the TA version the formula is:
+   *   baudrate = 12M * 32 / (mantissa * 2^exponent)
+   * where
+   *   mantissa = buf[10:0]
+   *   exponent = buf[15:13 16]
+   */
+  baseline = 12000000 * 32;
+  mantissa = baseline / baud;
+  if (mantissa == 0) {
+    mantissa = 1; /* Avoid dividing by zero if baud > 32 * 12M. */
+  }
+  exponent = 0;
+  while (mantissa >= 2048) {
+    if (exponent < 15) {
+      mantissa >>= 1; /* divide by 2 */
+      exponent++;
+    } else {
+      /* Exponent is maxed. Trim mantissa and leave. */
+      mantissa = 2047;
+      break;
+    }
+  }
+
+  buf[3] = 0x80;
+  buf[2] = (uint8_t) (exponent & 0x01);
+  buf[1] = (uint8_t) (((exponent & (uint32_t) ~0x01) << 4 | mantissa >> 8) & 0xff);
+  buf[0] = (uint8_t) (mantissa & 0xff);
+
+  /* Calculate and return the exact baud rate. */
+  baud = (baseline / mantissa) >> exponent;
+
+  return baud;
+}
+
+static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE]) {
+  uint32_t baud = p_cdc->requested_line.coding.bit_rate;
+  uint32_t baud_sup;
+  const pl2303_type_data_t* type_data = &pl2303_type_data[p_cdc->pl2303.type];
+
+  TU_VERIFY(baud && baud <= type_data->max_baud_rate);
+  /*
+   * Use direct method for supported baud rates, otherwise use divisors.
+   * Newer chip types do not support divisor encoding.
+   */
+  if (type_data->no_divisors) {
+    baud_sup = baud;
+  } else {
+    baud_sup = pl2303_get_supported_baud_rate(baud);
+  }
+
+  if (baud == baud_sup) {
+    baud = pl2303_encode_baud_rate_direct(buf, baud);
+  } else if (type_data->alt_divisors) {
+    baud = pl2303_encode_baud_rate_divisor_alt(buf, baud);
+  } else {
+    baud = pl2303_encode_baud_rate_divisor(buf, baud);
+  }
+  TU_LOG_CDC(p_cdc, "real baudrate %lu", baud);
+
+  return true;
+}
+
+#endif // CFG_TUH_CDC_PL2303
+
 #endif
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index 8c5399534..37bfca270 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -37,16 +37,6 @@
 // Class Driver Configuration
 //--------------------------------------------------------------------+
 
-// Set Line Control state on enumeration/mounted: DTR ( bit 0), RTS (bit 1)
-#ifndef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    0
-#endif
-
-// Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
-//#ifndef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-//#define CFG_TUH_CDC_LINE_CODING_ON_ENUM   { 115200, CDC_LINE_CODING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }
-//#endif
-
 // RX FIFO size
 #ifndef CFG_TUH_CDC_RX_BUFSIZE
 #define CFG_TUH_CDC_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
@@ -79,14 +69,27 @@ uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num);
 // return true if index is correct and interface is currently mounted
 bool tuh_cdc_itf_get_info(uint8_t idx, tuh_itf_info_t* info);
 
-// Check if a interface is mounted
+// Check if an interface is mounted
 bool tuh_cdc_mounted(uint8_t idx);
 
+// Get local (cached) line state
+// This function should return correct values if tuh_cdc_set_control_line_state() / tuh_cdc_get_control_line_state()
+// are invoked previously or CFG_TUH_CDC_LINE_STATE_ON_ENUM is defined.
+bool tuh_cdc_get_control_line_state_local(uint8_t idx, uint16_t* line_state);
+
 // Get current DTR status
-bool tuh_cdc_get_dtr(uint8_t idx);
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_get_dtr(uint8_t idx) {
+  uint16_t line_state;
+  TU_VERIFY(tuh_cdc_get_control_line_state_local(idx, &line_state));
+  return (line_state & CDC_CONTROL_LINE_STATE_DTR) != 0;
+}
 
 // Get current RTS status
-bool tuh_cdc_get_rts(uint8_t idx);
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_get_rts(uint8_t idx) {
+  uint16_t line_state;
+  TU_VERIFY(tuh_cdc_get_control_line_state_local(idx, &line_state));
+  return (line_state & CDC_CONTROL_LINE_STATE_RTS) != 0;
+}
 
 // Check if interface is connected (DTR active)
 TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_connected(uint8_t idx) {
@@ -97,7 +100,9 @@ TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_connected(uint8_t idx) {
 // This function should return correct values if tuh_cdc_set_line_coding() / tuh_cdc_get_line_coding()
 // are invoked previously or CFG_TUH_CDC_LINE_CODING_ON_ENUM is defined.
 // NOTE: This function does not make any USB transfer request to device.
-bool tuh_cdc_get_local_line_coding(uint8_t idx, cdc_line_coding_t* line_coding);
+bool tuh_cdc_get_line_coding_local(uint8_t idx, cdc_line_coding_t* line_coding);
+
+#define tuh_cdc_get_local_line_coding tuh_cdc_get_line_coding_local // backward compatibility
 
 //--------------------------------------------------------------------+
 // Write API
@@ -132,18 +137,31 @@ bool tuh_cdc_peek(uint8_t idx, uint8_t* ch);
 bool tuh_cdc_read_clear (uint8_t idx);
 
 //--------------------------------------------------------------------+
-// Control Endpoint (Request) API
+// Control Request API
 // Each Function will make a USB control transfer request to/from device
 // - If complete_cb is provided, the function will return immediately and invoke
 // the callback when request is complete.
 // - If complete_cb is NULL, the function will block until request is complete.
-//   - In this case, user_data should be pointed to xfer_result_t to hold the transfer result.
-//   - The function will return true if transfer is successful, false otherwise.
+// In this case, user_data should be usb_xfer_result_t* to hold the transfer result.
 //--------------------------------------------------------------------+
 
 // Request to Set Control Line State: DTR (bit 0), RTS (bit 1)
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
+// Request to Set DTR
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_set_dtr(uint8_t idx, bool dtr_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  cdc_line_control_state_t line_state = { .dtr = dtr_state };
+  line_state.rts = tuh_cdc_get_rts(idx);
+  return tuh_cdc_set_control_line_state(idx, line_state.value, complete_cb, user_data);
+}
+
+// Request to Set RTS
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_set_rts(uint8_t idx, bool rts_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  cdc_line_control_state_t line_state = { .rts = rts_state };
+  line_state.dtr = tuh_cdc_get_dtr(idx);
+  return tuh_cdc_set_control_line_state(idx, line_state.value, complete_cb, user_data);
+}
+
 // Request to set baudrate
 bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
@@ -160,18 +178,53 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
 // bool tuh_cdc_get_line_coding(uint8_t idx, cdc_line_coding_t* coding);
 
 // Connect by set both DTR, RTS
-TU_ATTR_ALWAYS_INLINE static inline
-bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return tuh_cdc_set_control_line_state(idx, CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS, complete_cb, user_data);
 }
 
 // Disconnect by clear both DTR, RTS
-TU_ATTR_ALWAYS_INLINE static inline
-bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return tuh_cdc_set_control_line_state(idx, 0x00, complete_cb, user_data);
 }
 
 //--------------------------------------------------------------------+
+// Control Request Sync API
+// Each Function will make a USB control transfer request to/from device the function will block until request is
+// complete. The function will return the transfer request result
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_control_line_state_sync(uint8_t idx, uint16_t line_state) {
+  TU_API_SYNC(tuh_cdc_set_control_line_state, idx, line_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_dtr_sync(uint8_t idx, bool dtr_state) {
+  TU_API_SYNC(tuh_cdc_set_dtr, idx, dtr_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_rts_sync(uint8_t idx, bool rts_state) {
+  TU_API_SYNC(tuh_cdc_set_rts, idx, rts_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_baudrate_sync(uint8_t idx, uint32_t baudrate) {
+  TU_API_SYNC(tuh_cdc_set_baudrate, idx, baudrate);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_data_format_sync(uint8_t idx, uint8_t stop_bits, uint8_t parity, uint8_t data_bits) {
+  TU_API_SYNC(tuh_cdc_set_data_format, idx, stop_bits, parity, data_bits);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_line_coding_sync(uint8_t idx, cdc_line_coding_t const* line_coding) {
+  TU_API_SYNC(tuh_cdc_set_line_coding, idx, line_coding);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_connect_sync(uint8_t idx) {
+  TU_API_SYNC(tuh_cdc_connect, idx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_disconnect_sync(uint8_t idx) {
+  TU_API_SYNC(tuh_cdc_disconnect, idx);
+}
+
+//--------------------------------------------------------------------+
 // CDC APPLICATION CALLBACKS
 //--------------------------------------------------------------------+
 
diff --git a/src/class/cdc/serial/ch34x.h b/src/class/cdc/serial/ch34x.h
index c18066f57..0e08b0acd 100644
--- a/src/class/cdc/serial/ch34x.h
+++ b/src/class/cdc/serial/ch34x.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _CH34X_H_
-#define _CH34X_H_
+#ifndef TUSB_CH34X_H
+#define TUSB_CH34X_H
 
 // There is no official documentation for the CH34x (CH340, CH341) chips. Reference can be found
 // - https://github.com/WCHSoftGroup/ch341ser_linux
@@ -34,51 +34,51 @@
 
 // set line_coding @ enumeration
 #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-#define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X CFG_TUH_CDC_LINE_CODING_ON_ENUM
+  #define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X CFG_TUH_CDC_LINE_CODING_ON_ENUM
 #else // this default is necessary to work properly
-#define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X { 9600, CDC_LINE_CONDING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }
+  #define CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X { 9600, CDC_LINE_CONDING_STOP_BITS_1, CDC_LINE_CODING_PARITY_NONE, 8 }
 #endif
 
 // USB requests
-#define CH34X_REQ_READ_VERSION 0x5F // dec  95
-#define CH34X_REQ_WRITE_REG    0x9A // dec 154
-#define CH34X_REQ_READ_REG     0x95 // dec 149
-#define CH34X_REQ_SERIAL_INIT  0xA1 // dec 161
-#define CH34X_REQ_MODEM_CTRL   0xA4 // dev 164
+#define CH34X_REQ_READ_VERSION        0x5F // dec  95
+#define CH34X_REQ_WRITE_REG           0x9A // dec 154
+#define CH34X_REQ_READ_REG            0x95 // dec 149
+#define CH34X_REQ_SERIAL_INIT         0xA1 // dec 161
+#define CH34X_REQ_MODEM_CTRL          0xA4 // dev 164
 
 // registers
-#define CH34X_REG_BREAK        0x05
-#define CH34X_REG_PRESCALER    0x12
-#define CH34X_REG_DIVISOR      0x13
-#define CH34X_REG_LCR          0x18
-#define CH34X_REG_LCR2         0x25
-#define CH34X_REG_MCR_MSR      0x06
-#define CH34X_REG_MCR_MSR2     0x07
-#define CH34X_NBREAK_BITS      0x01
+#define CH34X_REG_BREAK               0x05
+#define CH34X_REG_PRESCALER           0x12
+#define CH34X_REG_DIVISOR             0x13
+#define CH34X_REG_LCR                 0x18
+#define CH34X_REG_LCR2                0x25
+#define CH34X_REG_MCR_MSR             0x06
+#define CH34X_REG_MCR_MSR2            0x07
+#define CH34X_NBREAK_BITS             0x01
 
-#define CH341_REG_0x0F         0x0F // undocumented register
-#define CH341_REG_0x2C         0x2C // undocumented register
-#define CH341_REG_0x27         0x27 // hardware flow control (cts/rts)
+#define CH341_REG_0x0F                0x0F // undocumented register
+#define CH341_REG_0x2C                0x2C // undocumented register
+#define CH341_REG_0x27                0x27 // hardware flow control (cts/rts)
 
-#define CH34X_REG16_DIVISOR_PRESCALER  TU_U16(CH34X_REG_DIVISOR, CH34X_REG_PRESCALER)
-#define CH32X_REG16_LCR2_LCR           TU_U16(CH34X_REG_LCR2, CH34X_REG_LCR)
+#define CH34X_REG16_DIVISOR_PRESCALER TU_U16(CH34X_REG_DIVISOR, CH34X_REG_PRESCALER)
+#define CH32X_REG16_LCR2_LCR          TU_U16(CH34X_REG_LCR2, CH34X_REG_LCR)
 
 // modem control bits
-#define CH34X_BIT_RTS ( 1 << 6 )
-#define CH34X_BIT_DTR ( 1 << 5 )
+#define CH34X_BIT_RTS                 (1 << 6)
+#define CH34X_BIT_DTR                 (1 << 5)
 
 // line control bits
-#define CH34X_LCR_ENABLE_RX    0x80
-#define CH34X_LCR_ENABLE_TX    0x40
-#define CH34X_LCR_MARK_SPACE   0x20
-#define CH34X_LCR_PAR_EVEN     0x10
-#define CH34X_LCR_ENABLE_PAR   0x08
-#define CH34X_LCR_PAR_MASK     0x38 // all parity bits
-#define CH34X_LCR_STOP_BITS_2  0x04
-#define CH34X_LCR_CS8          0x03
-#define CH34X_LCR_CS7          0x02
-#define CH34X_LCR_CS6          0x01
-#define CH34X_LCR_CS5          0x00
-#define CH34X_LCR_CS_MASK      0x03 // all CSx bits
+#define CH34X_LCR_ENABLE_RX           0x80
+#define CH34X_LCR_ENABLE_TX           0x40
+#define CH34X_LCR_MARK_SPACE          0x20
+#define CH34X_LCR_PAR_EVEN            0x10
+#define CH34X_LCR_ENABLE_PAR          0x08
+#define CH34X_LCR_PAR_MASK            0x38 // all parity bits
+#define CH34X_LCR_STOP_BITS_2         0x04
+#define CH34X_LCR_CS8                 0x03
+#define CH34X_LCR_CS7                 0x02
+#define CH34X_LCR_CS6                 0x01
+#define CH34X_LCR_CS5                 0x00
+#define CH34X_LCR_CS_MASK             0x03 // all CSx bits
 
-#endif /* _CH34X_H_ */
+#endif // TUSB_CH34X_H
diff --git a/src/class/cdc/serial/cp210x.h b/src/class/cdc/serial/cp210x.h
index 2c749f522..a0eff9e40 100644
--- a/src/class/cdc/serial/cp210x.h
+++ b/src/class/cdc/serial/cp210x.h
@@ -28,9 +28,10 @@
 // Protocol details can be found at AN571: CP210x Virtual COM Port Interface
 // https://www.silabs.com/documents/public/application-notes/AN571.pdf
 
-#define TU_CP210X_VID 0x10C4
+// parts are overtaken from vendors driver
+// https://www.silabs.com/documents/public/software/cp210x-3.1.0.tar.gz
 
-/* Config request codes */
+// Config request codes
 #define CP210X_IFC_ENABLE      0x00
 #define CP210X_SET_BAUDDIV     0x01
 #define CP210X_GET_BAUDDIV     0x02
@@ -59,4 +60,55 @@
 #define CP210X_SET_BAUDRATE    0x1E
 #define CP210X_VENDOR_SPECIFIC 0xFF // GPIO, Recipient must be Device
 
+// SILABSER_IFC_ENABLE_REQUEST_CODE
+#define CP210X_UART_ENABLE              0x0001
+#define CP210X_UART_DISABLE             0x0000
+
+// SILABSER_SET_BAUDDIV_REQUEST_CODE
+#define CP210X_BAUD_RATE_GEN_FREQ     0x384000
+
+// SILABSER_SET_LINE_CTL_REQUEST_CODE
+#define CP210X_BITS_DATA_MASK           0x0f00
+#define CP210X_BITS_DATA_5              0x0500
+#define CP210X_BITS_DATA_6              0x0600
+#define CP210X_BITS_DATA_7              0x0700
+#define CP210X_BITS_DATA_8              0x0800
+#define CP210X_BITS_DATA_9              0x0900
+
+#define CP210X_BITS_PARITY_MASK         0x00f0
+#define CP210X_BITS_PARITY_NONE         0x0000
+#define CP210X_BITS_PARITY_ODD          0x0010
+#define CP210X_BITS_PARITY_EVEN         0x0020
+#define CP210X_BITS_PARITY_MARK         0x0030
+#define CP210X_BITS_PARITY_SPACE        0x0040
+
+#define CP210X_BITS_STOP_MASK           0x000f
+#define CP210X_BITS_STOP_1              0x0000
+#define CP210X_BITS_STOP_1_5            0x0001
+#define CP210X_BITS_STOP_2              0x0002
+
+// SILABSER_SET_BREAK_REQUEST_CODE
+#define CP210X_BREAK_ON                 0x0001
+#define CP210X_BREAK_OFF                0x0000
+
+// SILABSER_SET_MHS_REQUEST_CODE
+#define CP210X_MCR_DTR                  0x0001
+#define CP210X_MCR_RTS                  0x0002
+#define CP210X_MCR_ALL                  0x0003
+#define CP210X_MSR_CTS                  0x0010
+#define CP210X_MSR_DSR                  0x0020
+#define CP210X_MSR_RING                 0x0040
+#define CP210X_MSR_DCD                  0x0080
+#define CP210X_MSR_ALL                  0x00F0
+
+#define CP210X_CONTROL_WRITE_DTR        0x0100UL
+#define CP210X_CONTROL_WRITE_RTS        0x0200UL
+
+#define CP210X_LSR_BREAK                0x0001
+#define CP210X_LSR_FRAMING_ERROR        0x0002
+#define CP210X_LSR_HW_OVERRUN           0x0004
+#define CP210X_LSR_QUEUE_OVERRUN        0x0008
+#define CP210X_LSR_PARITY_ERROR         0x0010
+#define CP210X_LSR_ALL                  0x001F
+
 #endif //TUSB_CP210X_H
diff --git a/src/class/cdc/serial/ftdi_sio.h b/src/class/cdc/serial/ftdi_sio.h
index 0825f0719..8abf74f11 100644
--- a/src/class/cdc/serial/ftdi_sio.h
+++ b/src/class/cdc/serial/ftdi_sio.h
@@ -25,222 +25,207 @@
 #ifndef TUSB_FTDI_SIO_H
 #define TUSB_FTDI_SIO_H
 
-// VID for matching FTDI devices
-#define TU_FTDI_VID 0x0403
+#include <stdint.h>
 
 // Commands
-#define FTDI_SIO_RESET             	0    /* Reset the port */
-#define FTDI_SIO_MODEM_CTRL        	1    /* Set the modem control register */
-#define FTDI_SIO_SET_FLOW_CTRL     	2    /* Set flow control register */
-#define FTDI_SIO_SET_BAUD_RATE     	3    /* Set baud rate */
-#define FTDI_SIO_SET_DATA          	4    /* Set the data characteristics of the port */
-#define FTDI_SIO_GET_MODEM_STATUS  	5    /* Retrieve current value of modem status register */
-#define FTDI_SIO_SET_EVENT_CHAR    	6    /* Set the event character */
-#define FTDI_SIO_SET_ERROR_CHAR    	7    /* Set the error character */
-#define FTDI_SIO_SET_LATENCY_TIMER 	9    /* Set the latency timer */
-#define FTDI_SIO_GET_LATENCY_TIMER 	0x0a /* Get the latency timer */
-#define FTDI_SIO_SET_BITMODE       	0x0b /* Set bitbang mode */
-#define FTDI_SIO_READ_PINS         	0x0c /* Read immediate value of pins */
-#define FTDI_SIO_READ_EEPROM       	0x90 /* Read EEPROM */
+#define FTDI_SIO_RESET                0 // Reset the port
+#define FTDI_SIO_MODEM_CTRL           1 // Set the modem control register
+#define FTDI_SIO_SET_FLOW_CTRL        2 // Set flow control register
+#define FTDI_SIO_SET_BAUD_RATE        3 // Set baud rate
+#define FTDI_SIO_SET_DATA             4 // Set the data characteristics of the port
+#define FTDI_SIO_GET_MODEM_STATUS     5 // Retrieve current value of modem status register
+#define FTDI_SIO_SET_EVENT_CHAR       6 // Set the event character
+#define FTDI_SIO_SET_ERROR_CHAR       7 // Set the error character
+#define FTDI_SIO_SET_LATENCY_TIMER    9 // Set the latency timer
+#define FTDI_SIO_GET_LATENCY_TIMER   10 // Get the latency timer
+#define FTDI_SIO_SET_BITMODE         11 // Set bitbang mode
+#define FTDI_SIO_READ_PINS           12 // Read immediate value of pins
+#define FTDI_SIO_READ_EEPROM       0x90 // Read EEPROM
 
-/* FTDI_SIO_RESET */
-#define FTDI_SIO_RESET_SIO 0
-#define FTDI_SIO_RESET_PURGE_RX 1
-#define FTDI_SIO_RESET_PURGE_TX 2
+// Channel indices for FT2232, FT2232H and FT4232H devices
+#define CHANNEL_A 1
+#define CHANNEL_B 2
+#define CHANNEL_C 3
+#define CHANNEL_D 4
 
-/*
- * BmRequestType:  0100 0000B
- * bRequest:       FTDI_SIO_RESET
- * wValue:         Control Value
- *                   0 = Reset SIO
- *                   1 = Purge RX buffer
- *                   2 = Purge TX buffer
- * wIndex:         Port
- * wLength:        0
- * Data:           None
- *
- * The Reset SIO command has this effect:
- *
- *    Sets flow control set to 'none'
- *    Event char = $0D
- *    Event trigger = disabled
- *    Purge RX buffer
- *    Purge TX buffer
- *    Clear DTR
- *    Clear RTS
- *    baud and data format not reset
- *
- * The Purge RX and TX buffer commands affect nothing except the buffers
- *
-   */
+// Port Identifier Table
+#define PIT_DEFAULT  0 // SIOA
+#define PIT_SIOA     1 // SIOA
+// The device this driver is tested with one has only one port
+#define PIT_SIOB     2 // SIOB
+#define PIT_PARALLEL 3 // Parallel
 
-/* FTDI_SIO_MODEM_CTRL */
-/*
- * BmRequestType:   0100 0000B
- * bRequest:        FTDI_SIO_MODEM_CTRL
- * wValue:          ControlValue (see below)
- * wIndex:          Port
- * wLength:         0
- * Data:            None
- *
- * NOTE: If the device is in RTS/CTS flow control, the RTS set by this
- * command will be IGNORED without an error being returned
- * Also - you can not set DTR and RTS with one control message
- */
+// FTDI_SIO_RESET
+#define FTDI_SIO_RESET_REQUEST                    FTDI_SIO_RESET
+#define FTDI_SIO_RESET_REQUEST_TYPE               0x40
+#define FTDI_SIO_RESET_SIO                        0
+#define FTDI_SIO_RESET_PURGE_RX                   1
+#define FTDI_SIO_RESET_PURGE_TX                   2
 
-#define FTDI_SIO_SET_DTR_MASK 0x1
-#define FTDI_SIO_SET_DTR_HIGH ((FTDI_SIO_SET_DTR_MASK << 8) | 1)
-#define FTDI_SIO_SET_DTR_LOW  ((FTDI_SIO_SET_DTR_MASK << 8) | 0)
-#define FTDI_SIO_SET_RTS_MASK 0x2
-#define FTDI_SIO_SET_RTS_HIGH ((FTDI_SIO_SET_RTS_MASK << 8) | 2)
-#define FTDI_SIO_SET_RTS_LOW  ((FTDI_SIO_SET_RTS_MASK << 8) | 0)
+// FTDI_SIO_SET_BAUDRATE
+#define FTDI_SIO_SET_BAUDRATE_REQUEST_TYPE        0x40
+#define FTDI_SIO_SET_BAUDRATE_REQUEST             3
 
-/*
- * ControlValue
- * B0    DTR state
- *          0 = reset
- *          1 = set
- * B1    RTS state
- *          0 = reset
- *          1 = set
- * B2..7 Reserved
- * B8    DTR state enable
- *          0 = ignore
- *          1 = use DTR state
- * B9    RTS state enable
- *          0 = ignore
- *          1 = use RTS state
- * B10..15 Reserved
- */
+enum ftdi_sio_baudrate {
+  ftdi_sio_b300 = 0,
+  ftdi_sio_b600 = 1,
+  ftdi_sio_b1200 = 2,
+  ftdi_sio_b2400 = 3,
+  ftdi_sio_b4800 = 4,
+  ftdi_sio_b9600 = 5,
+  ftdi_sio_b19200 = 6,
+  ftdi_sio_b38400 = 7,
+  ftdi_sio_b57600 = 8,
+  ftdi_sio_b115200 = 9
+};
 
-/* FTDI_SIO_SET_FLOW_CTRL */
-#define FTDI_SIO_DISABLE_FLOW_CTRL 0x0
-#define FTDI_SIO_RTS_CTS_HS (0x1 << 8)
-#define FTDI_SIO_DTR_DSR_HS (0x2 << 8)
-#define FTDI_SIO_XON_XOFF_HS (0x4 << 8)
+// FTDI_SIO_SET_DATA
+#define FTDI_SIO_SET_DATA_REQUEST                 FTDI_SIO_SET_DATA
+#define FTDI_SIO_SET_DATA_REQUEST_TYPE            0x40
+#define FTDI_SIO_SET_DATA_PARITY_NONE             (0x0 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_ODD              (0x1 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_EVEN             (0x2 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_MARK             (0x3 << 8)
+#define FTDI_SIO_SET_DATA_PARITY_SPACE            (0x4 << 8)
+#define FTDI_SIO_SET_DATA_STOP_BITS_1             (0x0 << 11) // same coding as ACM
+#define FTDI_SIO_SET_DATA_STOP_BITS_15            (0x1 << 11) // 1.5 not supported, for future use?
+#define FTDI_SIO_SET_DATA_STOP_BITS_2             (0x2 << 11)
+#define FTDI_SIO_SET_BREAK                        (0x1 << 14)
 
-/*
- *   BmRequestType:  0100 0000b
- *   bRequest:       FTDI_SIO_SET_FLOW_CTRL
- *   wValue:         Xoff/Xon
- *   wIndex:         Protocol/Port - hIndex is protocol / lIndex is port
- *   wLength:        0
- *   Data:           None
- *
- * hIndex protocol is:
- *   B0 Output handshaking using RTS/CTS
- *       0 = disabled
- *       1 = enabled
- *   B1 Output handshaking using DTR/DSR
- *       0 = disabled
- *       1 = enabled
- *   B2 Xon/Xoff handshaking
- *       0 = disabled
- *       1 = enabled
- *
- * A value of zero in the hIndex field disables handshaking
- *
- * If Xon/Xoff handshaking is specified, the hValue field should contain the
- * XOFF character and the lValue field contains the XON character.
- */
+// FTDI_SIO_MODEM_CTRL
+#define FTDI_SIO_SET_MODEM_CTRL_REQUEST_TYPE      0x40
+#define FTDI_SIO_SET_MODEM_CTRL_REQUEST           FTDI_SIO_MODEM_CTRL
 
-/* FTDI_SIO_SET_BAUD_RATE */
-/*
- * BmRequestType:  0100 0000B
- * bRequest:       FTDI_SIO_SET_BAUDRATE
- * wValue:         BaudDivisor value - see below
- * wIndex:         Port
- * wLength:        0
- * Data:           None
- * The BaudDivisor values are calculated as follows (too complicated):
- */
+#define FTDI_SIO_SET_DTR_MASK                     0x1UL
+#define FTDI_SIO_SET_DTR_HIGH                     ((FTDI_SIO_SET_DTR_MASK << 8) | 1UL)
+#define FTDI_SIO_SET_DTR_LOW                      ((FTDI_SIO_SET_DTR_MASK << 8) | 0UL)
+#define FTDI_SIO_SET_RTS_MASK                     0x2UL
+#define FTDI_SIO_SET_RTS_HIGH                     ((FTDI_SIO_SET_RTS_MASK << 8) | 2UL)
+#define FTDI_SIO_SET_RTS_LOW                      ((FTDI_SIO_SET_RTS_MASK << 8) | 0UL)
 
-/* FTDI_SIO_SET_DATA */
-#define FTDI_SIO_SET_DATA_PARITY_NONE	(0x0 << 8)
-#define FTDI_SIO_SET_DATA_PARITY_ODD	(0x1 << 8)
-#define FTDI_SIO_SET_DATA_PARITY_EVEN	(0x2 << 8)
-#define FTDI_SIO_SET_DATA_PARITY_MARK	(0x3 << 8)
-#define FTDI_SIO_SET_DATA_PARITY_SPACE	(0x4 << 8)
-#define FTDI_SIO_SET_DATA_STOP_BITS_1	(0x0 << 11)
-#define FTDI_SIO_SET_DATA_STOP_BITS_15	(0x1 << 11)
-#define FTDI_SIO_SET_DATA_STOP_BITS_2	(0x2 << 11)
-#define FTDI_SIO_SET_BREAK		(0x1 << 14)
+// FTDI_SIO_SET_FLOW_CTRL
+#define FTDI_SIO_SET_FLOW_CTRL_REQUEST_TYPE       0x40
+#define FTDI_SIO_SET_FLOW_CTRL_REQUEST            FTDI_SIO_SET_FLOW_CTRL
+#define FTDI_SIO_DISABLE_FLOW_CTRL                0x0
+#define FTDI_SIO_RTS_CTS_HS                       (0x1 << 8)
+#define FTDI_SIO_DTR_DSR_HS                       (0x2 << 8)
+#define FTDI_SIO_XON_XOFF_HS                      (0x4 << 8)
 
-/*
- * BmRequestType:  0100 0000B
- * bRequest:       FTDI_SIO_SET_DATA
- * wValue:         Data characteristics (see below)
- * wIndex:         Port
- * wLength:        0
- * Data:           No
- *
- * Data characteristics
- *
- *   B0..7   Number of data bits
- *   B8..10  Parity
- *           0 = None
- *           1 = Odd
- *           2 = Even
- *           3 = Mark
- *           4 = Space
- *   B11..13 Stop Bits
- *           0 = 1
- *           1 = 1.5
- *           2 = 2
- *   B14
- *           1 = TX ON (break)
- *           0 = TX OFF (normal state)
- *   B15 Reserved
- *
- */
+// FTDI_SIO_GET_LATENCY_TIMER
+#define  FTDI_SIO_GET_LATENCY_TIMER_REQUEST       FTDI_SIO_GET_LATENCY_TIMER
+#define  FTDI_SIO_GET_LATENCY_TIMER_REQUEST_TYPE  0xC0
 
-/*
-* DATA FORMAT
-*
-* IN Endpoint
-*
-* The device reserves the first two bytes of data on this endpoint to contain
-* the current values of the modem and line status registers. In the absence of
-* data, the device generates a message consisting of these two status bytes
-  * every 40 ms
-  *
-  * Byte 0: Modem Status
-*
-* Offset	Description
-* B0	Reserved - must be 1
-* B1	Reserved - must be 0
-* B2	Reserved - must be 0
-* B3	Reserved - must be 0
-* B4	Clear to Send (CTS)
-* B5	Data Set Ready (DSR)
-* B6	Ring Indicator (RI)
-* B7	Receive Line Signal Detect (RLSD)
-*
-* Byte 1: Line Status
-*
-* Offset	Description
-* B0	Data Ready (DR)
-* B1	Overrun Error (OE)
-* B2	Parity Error (PE)
-* B3	Framing Error (FE)
-* B4	Break Interrupt (BI)
-* B5	Transmitter Holding Register (THRE)
-* B6	Transmitter Empty (TEMT)
-* B7	Error in RCVR FIFO
-*
-*/
-#define FTDI_RS0_CTS	(1 << 4)
-#define FTDI_RS0_DSR	(1 << 5)
-#define FTDI_RS0_RI	(1 << 6)
-#define FTDI_RS0_RLSD	(1 << 7)
+// FTDI_SIO_SET_LATENCY_TIMER
+#define  FTDI_SIO_SET_LATENCY_TIMER_REQUEST       FTDI_SIO_SET_LATENCY_TIMER
+#define  FTDI_SIO_SET_LATENCY_TIMER_REQUEST_TYPE  0x40
+
+// FTDI_SIO_SET_EVENT_CHAR
+#define  FTDI_SIO_SET_EVENT_CHAR_REQUEST          FTDI_SIO_SET_EVENT_CHAR
+#define  FTDI_SIO_SET_EVENT_CHAR_REQUEST_TYPE     0x40
+
+// FTDI_SIO_GET_MODEM_STATUS
+#define FTDI_SIO_GET_MODEM_STATUS_REQUEST_TYPE    0xc0
+#define FTDI_SIO_GET_MODEM_STATUS_REQUEST         FTDI_SIO_GET_MODEM_STATUS
+#define FTDI_SIO_CTS_MASK                         0x10
+#define FTDI_SIO_DSR_MASK                         0x20
+#define FTDI_SIO_RI_MASK                          0x40
+#define FTDI_SIO_RLSD_MASK                        0x80
+
+// FTDI_SIO_SET_BITMODE
+#define FTDI_SIO_SET_BITMODE_REQUEST_TYPE         0x40
+#define FTDI_SIO_SET_BITMODE_REQUEST              FTDI_SIO_SET_BITMODE
+
+// Possible bitmodes for FTDI_SIO_SET_BITMODE_REQUEST
+#define FTDI_SIO_BITMODE_RESET                    0x00
+#define FTDI_SIO_BITMODE_CBUS                     0x20
+
+// FTDI_SIO_READ_PINS
+#define FTDI_SIO_READ_PINS_REQUEST_TYPE           0xc0
+#define FTDI_SIO_READ_PINS_REQUEST                FTDI_SIO_READ_PINS
+
+// FTDI_SIO_READ_EEPROM
+#define FTDI_SIO_READ_EEPROM_REQUEST_TYPE         0xc0
+#define FTDI_SIO_READ_EEPROM_REQUEST              FTDI_SIO_READ_EEPROM
+
+#define FTDI_FTX_CBUS_MUX_GPIO    0x8
+#define FTDI_FT232R_CBUS_MUX_GPIO 0xa
+
+#define FTDI_RS0_CTS  (1 << 4)
+#define FTDI_RS0_DSR  (1 << 5)
+#define FTDI_RS0_RI   (1 << 6)
+#define FTDI_RS0_RLSD (1 << 7)
+
+#define FTDI_RS_DR    1
+#define FTDI_RS_OE    (1 << 1)
+#define FTDI_RS_PE    (1 << 2)
+#define FTDI_RS_FE    (1 << 3)
+#define FTDI_RS_BI    (1 << 4)
+#define FTDI_RS_THRE  (1 << 5)
+#define FTDI_RS_TEMT  (1 << 6)
+#define FTDI_RS_FIFO  (1 << 7)
+
+// chip types and names
+typedef enum ftdi_chip_type {
+  FTDI_SIO = 0,
+//  FTDI_FT232A,
+  FTDI_FT232B,
+  FTDI_FT2232C,
+  FTDI_FT232R,
+  FTDI_FT232H,
+  FTDI_FT2232H,
+  FTDI_FT4232H,
+  FTDI_FT4232HA,
+  FTDI_FT232HP,
+  FTDI_FT233HP,
+  FTDI_FT2232HP,
+  FTDI_FT2233HP,
+  FTDI_FT4232HP,
+  FTDI_FT4233HP,
+  FTDI_FTX,
+  FTDI_UNKNOWN
+} ftdi_chip_type_t;
+
+#define FTDI_CHIP_NAMES \
+  [FTDI_SIO]       = "SIO", /* the serial part of FT8U100AX */ \
+/*  [FTDI_FT232A]    = "FT232A", */ \
+  [FTDI_FT232B]    = "FT232B", \
+  [FTDI_FT2232C]   = "FT2232C/D", \
+  [FTDI_FT232R]    = "FT232R", \
+  [FTDI_FT232H]    = "FT232H", \
+  [FTDI_FT2232H]   = "FTDI_FT2232H", \
+  [FTDI_FT4232H]   = "FT4232H", \
+  [FTDI_FT4232HA]  = "FT4232HA", \
+  [FTDI_FT232HP]   = "FT232HP", \
+  [FTDI_FT233HP]   = "FT233HP", \
+  [FTDI_FT2232HP]  = "FT2232HP", \
+  [FTDI_FT2233HP]  = "FT2233HP", \
+  [FTDI_FT4232HP]  = "FT4232HP", \
+  [FTDI_FT4233HP]  = "FT4233HP", \
+  [FTDI_FTX]       = "FT-X", \
+  [FTDI_UNKNOWN]   = "UNKNOWN"
+
+// private interface data
+typedef struct ftdi_private {
+  ftdi_chip_type_t chip_type;
+  uint8_t channel;                  // channel index, or 0 for legacy types
+} ftdi_private_t;
+
+#define FTDI_OK           true
+#define FTDI_FAIL         false
+#define FTDI_NOT_POSSIBLE -1
+#define FTDI_REQUESTED    -2
 
-#define FTDI_RS_DR	1
-#define FTDI_RS_OE	(1<<1)
-#define FTDI_RS_PE	(1<<2)
-#define FTDI_RS_FE	(1<<3)
-#define FTDI_RS_BI	(1<<4)
-#define FTDI_RS_THRE	(1<<5)
-#define FTDI_RS_TEMT	(1<<6)
-#define FTDI_RS_FIFO	(1<<7)
+// division and round function overtaken from math.h
+#define DIV_ROUND_CLOSEST(x, divisor)(      \
+{             \
+  typeof(x) __x = x;        \
+  typeof(divisor) __d = divisor;      \
+  (((typeof(x))-1) > 0 ||       \
+   ((typeof(divisor))-1) > 0 ||     \
+   (((__x) > 0) == ((__d) > 0))) ?    \
+    (((__x) + ((__d) / 2)) / (__d)) : \
+    (((__x) - ((__d) / 2)) / (__d));  \
+}             \
+)
 
 #endif //TUSB_FTDI_SIO_H
diff --git a/src/class/cdc/serial/pl2303.h b/src/class/cdc/serial/pl2303.h
new file mode 100644
index 000000000..63910c7bb
--- /dev/null
+++ b/src/class/cdc/serial/pl2303.h
@@ -0,0 +1,159 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Heiko Kuester
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_PL2303_H
+#define TUSB_PL2303_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+// There is no official documentation for the PL2303 chips.
+// Reference can be found
+// - https://github.com/torvalds/linux/blob/master/drivers/usb/serial/pl2303.h and
+//   https://github.com/torvalds/linux/blob/master/drivers/usb/serial/pl2303.c
+// - https://github.com/freebsd/freebsd-src/blob/main/sys/dev/usb/serial/uplcom.c
+
+// quirks
+#define PL2303_QUIRK_UART_STATE_IDX0      1
+#define PL2303_QUIRK_LEGACY               2
+#define PL2303_QUIRK_ENDPOINT_HACK        4
+
+// requests and bits
+#define PL2303_SET_LINE_REQUEST_TYPE      0x21    // class request host to device interface
+#define PL2303_SET_LINE_REQUEST           0x20    // dec 32
+
+#define PL2303_SET_CONTROL_REQUEST_TYPE   0x21    // class request host to device interface
+#define PL2303_SET_CONTROL_REQUEST        0x22    // dec 34
+#define PL2303_CONTROL_DTR                0x01    // dec 1
+#define PL2303_CONTROL_RTS                0x02    // dec 2
+
+#define PL2303_BREAK_REQUEST_TYPE         0x21    // class request host to device interface
+#define PL2303_BREAK_REQUEST              0x23    // dec 35
+#define PL2303_BREAK_ON                   0xffff
+#define PL2303_BREAK_OFF                  0x0000
+
+#define PL2303_GET_LINE_REQUEST_TYPE      0xa1    // class request device to host interface
+#define PL2303_GET_LINE_REQUEST           0x21    // dec 33
+
+#define PL2303_VENDOR_WRITE_REQUEST_TYPE  0x40    // vendor request host to device interface
+#define PL2303_VENDOR_WRITE_REQUEST       0x01    // dec 1
+#define PL2303_VENDOR_WRITE_NREQUEST      0x80    // dec 128
+
+#define PL2303_VENDOR_READ_REQUEST_TYPE   0xc0    // vendor request device to host interface
+#define PL2303_VENDOR_READ_REQUEST        0x01    // dec 1
+#define PL2303_VENDOR_READ_NREQUEST       0x81    // dec 129
+
+#define PL2303_UART_STATE_INDEX           8
+#define PL2303_UART_STATE_MSR_MASK        0x8b
+#define PL2303_UART_STATE_TRANSIENT_MASK  0x74
+#define PL2303_UART_DCD                   0x01
+#define PL2303_UART_DSR                   0x02
+#define PL2303_UART_BREAK_ERROR           0x04
+#define PL2303_UART_RING                  0x08
+#define PL2303_UART_FRAME_ERROR           0x10
+#define PL2303_UART_PARITY_ERROR          0x20
+#define PL2303_UART_OVERRUN_ERROR         0x40
+#define PL2303_UART_CTS                   0x80
+
+#define PL2303_FLOWCTRL_MASK              0xf0
+
+#define PL2303_CLEAR_HALT_REQUEST_TYPE    0x02    // standard request host to device endpoint
+
+// registers via vendor read/write requests
+#define PL2303_READ_TYPE_HX_STATUS        0x8080
+
+#define PL2303_HXN_RESET_REG              0x07
+#define PL2303_HXN_RESET_UPSTREAM_PIPE    0x02
+#define PL2303_HXN_RESET_DOWNSTREAM_PIPE  0x01
+
+#define PL2303_HXN_FLOWCTRL_REG           0x0a
+#define PL2303_HXN_FLOWCTRL_MASK          0x1c
+#define PL2303_HXN_FLOWCTRL_NONE          0x1c
+#define PL2303_HXN_FLOWCTRL_RTS_CTS       0x18
+#define PL2303_HXN_FLOWCTRL_XON_XOFF      0x0c
+
+// type data
+typedef enum pl2303_type {
+  PL2303_TYPE_H = 0, // 0
+  PL2303_TYPE_HX,    // 1
+  PL2303_TYPE_TA,    // 2
+  PL2303_TYPE_TB,    // 3
+  PL2303_TYPE_HXD,   // 4
+  PL2303_TYPE_HXN,   // 5
+  PL2303_TYPE_COUNT,
+  PL2303_TYPE_NEED_SUPPORTS_HX_STATUS,
+  PL2303_TYPE_UNKNOWN,
+} pl2303_type_t;
+
+typedef struct pl2303_type_data {
+  uint32_t max_baud_rate;
+  uint8_t  quirks;
+  uint8_t  no_autoxonxoff : 1;
+  uint8_t  no_divisors    : 1;
+  uint8_t  alt_divisors   : 1;
+} pl2303_type_data_t;
+
+#define PL2303_TYPE_DATA \
+  [PL2303_TYPE_H] = { \
+    .max_baud_rate = 1228800, .quirks = PL2303_QUIRK_LEGACY, \
+    .no_autoxonxoff = 1, .no_divisors = 0, .alt_divisors = 0 \
+  }, \
+  [PL2303_TYPE_HX] = { \
+    .max_baud_rate = 6000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 0 \
+  }, \
+  [PL2303_TYPE_TA] = { \
+    .max_baud_rate = 6000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 1 \
+  }, \
+  [PL2303_TYPE_TB] = { \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 1 \
+  }, \
+  [PL2303_TYPE_HXD] = { \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 0 \
+  }, \
+  [PL2303_TYPE_HXN] = { \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 1, .alt_divisors = 0 \
+  }
+
+typedef struct TU_ATTR_PACKED {
+  pl2303_type_t type;
+  uint8_t quirks;
+  bool supports_hx_status;
+} pl2303_private_t;
+
+// buffer sizes for line coding data
+#define PL2303_LINE_CODING_BUFSIZE          7
+#define PL2303_LINE_CODING_BAUDRATE_BUFSIZE 4
+
+// bulk endpoints
+#define PL2303_OUT_EP                       0x02
+#define PL2303_IN_EP                        0x83
+
+#endif // TUSB_PL2303_H
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index fd7f01b67..ec7aad796 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -278,6 +278,8 @@ typedef enum {
   XFER_RESULT_INVALID
 } xfer_result_t;
 
+#define tusb_xfer_result_t xfer_result_t
+
 // TODO remove
 enum {
   DESC_OFFSET_LEN  = 0,
@@ -345,7 +347,6 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  iManufacturer      ; ///< Index of string descriptor describing manufacturer.
   uint8_t  iProduct           ; ///< Index of string descriptor describing product.
   uint8_t  iSerialNumber      ; ///< Index of string descriptor describing the device's serial number.
-
   uint8_t  bNumConfigurations ; ///< Number of possible configurations.
 } tusb_desc_device_t;
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index a84fcda39..ce83977c5 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -94,26 +94,28 @@ TU_ATTR_WEAK bool hcd_dcache_clean_invalidate(const void* addr, uint32_t data_si
 typedef struct {
   tuh_bus_info_t bus_info;
 
-  // Device State
-  struct TU_ATTR_PACKED {
-    volatile uint8_t connected  : 1; // After 1st transfer
-    volatile uint8_t addressed  : 1; // After SET_ADDR
-    volatile uint8_t configured : 1; // After SET_CONFIG and all drivers are configured
-    volatile uint8_t suspended  : 1; // Bus suspended
-    // volatile uint8_t removing : 1; // Physically disconnected, waiting to be processed by usbh
-  };
-
   // Device Descriptor
-  uint8_t  ep0_size;
+  uint16_t bcdUSB;
+  uint8_t  bDeviceClass;
+  uint8_t  bDeviceSubClass;
+  uint8_t  bDeviceProtocol;
+  uint8_t  bMaxPacketSize0;
   uint16_t idVendor;
   uint16_t idProduct;
+  uint16_t bcdDevice;
   uint8_t  iManufacturer;
   uint8_t  iProduct;
   uint8_t  iSerialNumber;
   uint8_t  bNumConfigurations;
 
-  // Configuration Descriptor
-  // uint8_t interface_count; // bNumInterfaces alias
+  // Device State
+  struct TU_ATTR_PACKED {
+    volatile uint8_t connected  : 1; // After 1st transfer
+    volatile uint8_t addressed  : 1; // After SET_ADDR
+    volatile uint8_t configured : 1; // After SET_CONFIG and all drivers are configured
+    volatile uint8_t suspended  : 1; // Bus suspended
+    // volatile uint8_t removing : 1; // Physically disconnected, waiting to be processed by usbh
+  };
 
   // Endpoint & Interface
   uint8_t itf2drv[CFG_TUH_INTERFACE_MAX];  // map interface number to driver (0xff is invalid)
@@ -373,6 +375,28 @@ bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t *vid, uint16_t *pid) {
   return true;
 }
 
+bool tuh_descriptor_get_device_local(uint8_t daddr, tusb_desc_device_t* desc_device) {
+  usbh_device_t *dev = get_device(daddr);
+  TU_VERIFY(dev && desc_device);
+
+  desc_device->bLength = sizeof(tusb_desc_device_t);
+  desc_device->bDescriptorType = TUSB_DESC_DEVICE;
+  desc_device->bcdUSB = dev->bcdUSB;
+  desc_device->bDeviceClass = dev->bDeviceClass;
+  desc_device->bDeviceSubClass = dev->bDeviceSubClass;
+  desc_device->bDeviceProtocol = dev->bDeviceProtocol;
+  desc_device->bMaxPacketSize0 = dev->bMaxPacketSize0;
+  desc_device->idVendor = dev->idVendor;
+  desc_device->idProduct = dev->idProduct;
+  desc_device->bcdDevice = dev->bcdDevice;
+  desc_device->iManufacturer = dev->iManufacturer;
+  desc_device->iProduct = dev->iProduct;
+  desc_device->iSerialNumber = dev->iSerialNumber;
+  desc_device->bNumConfigurations = dev->bNumConfigurations;
+
+  return true;
+}
+
 tusb_speed_t tuh_speed_get(uint8_t daddr) {
   tuh_bus_info_t bus_info;
   tuh_bus_info_get(daddr, &bus_info);
@@ -1085,8 +1109,9 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
 
 // generic helper to get a descriptor
 // if blocking, user_data is pointed to xfer_result
-static bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
-                            tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline
+bool _get_descriptor(uint8_t daddr, uint8_t type, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
+                    tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
       .recipient = TUSB_REQ_RCPT_DEVICE,
@@ -1127,7 +1152,6 @@ bool tuh_descriptor_get_configuration(uint8_t daddr, uint8_t index, void* buffer
 }
 
 //------------- String Descriptor -------------//
-
 bool tuh_descriptor_get_string(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
                                tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return _get_descriptor(daddr, TUSB_DESC_STRING, index, language_id, buffer, len, complete_cb, user_data);
@@ -1266,47 +1290,6 @@ bool tuh_interface_set(uint8_t daddr, uint8_t itf_num, uint8_t itf_alt,
 }
 
 //--------------------------------------------------------------------+
-// Descriptor Sync
-//--------------------------------------------------------------------+
-
-#define _CONTROL_SYNC_API(_async_func, ...) \
-  xfer_result_t result = XFER_RESULT_INVALID;\
-  TU_VERIFY(_async_func(__VA_ARGS__, NULL, (uintptr_t) &result), XFER_RESULT_TIMEOUT); \
-  return (uint8_t) result
-
-uint8_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get, daddr, type, index, buffer, len);
-}
-
-uint8_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get_device, daddr, buffer, len);
-}
-
-uint8_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get_configuration, daddr, index, buffer, len);
-}
-
-uint8_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get_hid_report, daddr, itf_num, desc_type, index, buffer, len);
-}
-
-uint8_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get_string, daddr, index, language_id, buffer, len);
-}
-
-uint8_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get_manufacturer_string, daddr, language_id, buffer, len);
-}
-
-uint8_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get_product_string, daddr, language_id, buffer, len);
-}
-
-uint8_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
-  _CONTROL_SYNC_API(tuh_descriptor_get_serial_string, daddr, language_id, buffer, len);
-}
-
-//--------------------------------------------------------------------+
 // Detaching
 //--------------------------------------------------------------------+
 // a device unplugged from rhport:hub_addr:hub_port
@@ -1596,7 +1579,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
       usbh_device_t* new_dev = get_device(new_addr);
       new_dev->bus_info = *dev0_bus;
       new_dev->connected = 1;
-      new_dev->ep0_size = desc_device->bMaxPacketSize0;
+      new_dev->bMaxPacketSize0 = desc_device->bMaxPacketSize0;
 
       TU_ASSERT(tuh_address_set(0, new_addr, process_enumeration, ENUM_GET_DEVICE_DESC),);
       break;
@@ -1613,7 +1596,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
 
       usbh_device_close(dev0_bus->rhport, 0); // close dev0
 
-      TU_ASSERT(usbh_edpt_control_open(new_addr, new_dev->ep0_size),); // open new control endpoint
+      TU_ASSERT(usbh_edpt_control_open(new_addr, new_dev->bMaxPacketSize0),); // open new control endpoint
 
       TU_LOG_USBH("Get Device Descriptor\r\n");
       TU_ASSERT(tuh_descriptor_get_device(new_addr, _usbh_epbuf.ctrl, sizeof(tusb_desc_device_t),
@@ -1626,8 +1609,14 @@ static void process_enumeration(tuh_xfer_t* xfer) {
     case ENUM_GET_STRING_LANGUAGE_ID_LEN: {
       // save the received device descriptor
       tusb_desc_device_t const *desc_device = (tusb_desc_device_t const *) _usbh_epbuf.ctrl;
+      dev->bcdUSB = desc_device->bcdUSB;
+      dev->bDeviceClass = desc_device->bDeviceClass;
+      dev->bDeviceSubClass = desc_device->bDeviceSubClass;
+      dev->bDeviceProtocol = desc_device->bDeviceProtocol;
+      dev->bMaxPacketSize0 = desc_device->bMaxPacketSize0;
       dev->idVendor = desc_device->idVendor;
       dev->idProduct = desc_device->idProduct;
+      dev->bcdDevice = desc_device->bcdDevice;
       dev->iManufacturer = desc_device->iManufacturer;
       dev->iProduct = desc_device->iProduct;
       dev->iSerialNumber = desc_device->iSerialNumber;
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 13eede869..1e9bb26bc 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -204,6 +204,9 @@ bool tuh_rhport_reset_bus(uint8_t rhport, bool active);
 // Get VID/PID of device
 bool tuh_vid_pid_get(uint8_t daddr, uint16_t* vid, uint16_t* pid);
 
+// Get local (cached) device descriptor once device is enumerated
+bool tuh_descriptor_get_device_local(uint8_t daddr, tusb_desc_device_t* desc_device);
+
 // Get speed of device
 tusb_speed_t tuh_speed_get(uint8_t daddr);
 
@@ -231,8 +234,18 @@ bool tuh_bus_info_get(uint8_t daddr, tuh_bus_info_t* bus_info);
 
 //--------------------------------------------------------------------+
 // Transfer API
+// Each Function will make a USB transfer request to device. If
+// - complete_cb != NULL, the function will return immediately and invoke the callback when request is complete.
+// - complete_cb == NULL, the function will block until request is complete.
+// In this case, user_data should be tusb_xfer_result_t* to hold the transfer result.
 //--------------------------------------------------------------------+
 
+// Helper to make Sync API from async one
+#define TU_API_SYNC(_async_api, ...) \
+   xfer_result_t result = XFER_RESULT_INVALID;\
+   TU_VERIFY(_async_api(__VA_ARGS__, NULL, (uintptr_t) &result), XFER_RESULT_TIMEOUT); \
+   return result
+
 // Submit a control transfer
 //  - async: complete callback invoked when finished.
 //  - sync : blocking if complete callback is NULL.
@@ -324,45 +337,54 @@ bool tuh_descriptor_get_serial_string(uint8_t daddr, uint16_t language_id, void*
 
 //--------------------------------------------------------------------+
 // Descriptors Synchronous (blocking)
+// Sync API which is blocking until transfer is complete.
+// return transfer result
 //--------------------------------------------------------------------+
 
-// Sync (blocking) version of tuh_descriptor_get()
-// return transfer result
-uint8_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_sync(uint8_t daddr, uint8_t type, uint8_t index, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get, daddr, type, index, buffer, len);
+}
 
-// Sync (blocking) version of tuh_descriptor_get_device()
-// return transfer result
-uint8_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get_device()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_device_sync(uint8_t daddr, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_device, daddr, buffer, len);
+}
 
-// Sync (blocking) version of tuh_descriptor_get_configuration()
-// return transfer result
-uint8_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get_configuration()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_configuration_sync(uint8_t daddr, uint8_t index, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_configuration, daddr, index, buffer, len);
+}
 
-// Sync (blocking) version of tuh_descriptor_get_hid_report()
-// return transfer result
-uint8_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get_hid_report()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8_t desc_type, uint8_t index, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_hid_report, daddr, itf_num, desc_type, index, buffer, len);
+}
 
-// Sync (blocking) version of tuh_descriptor_get_string()
-// return transfer result
-uint8_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_string, daddr, index, language_id, buffer, len);
+}
 
-// Sync (blocking) version of tuh_descriptor_get_string_langid()
-TU_ATTR_ALWAYS_INLINE static inline
-uint8_t tuh_descriptor_get_string_langid_sync(uint8_t daddr, void* buffer, uint16_t len) {
+// Sync version of tuh_descriptor_get_string_langid()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_string_langid_sync(uint8_t daddr, void* buffer, uint16_t len) {
   return tuh_descriptor_get_string_sync(daddr, 0, 0, buffer, len);
 }
 
-// Sync (blocking) version of tuh_descriptor_get_manufacturer_string()
-// return transfer result
-uint8_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get_manufacturer_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_manufacturer_string, daddr, language_id, buffer, len);
+}
 
-// Sync (blocking) version of tuh_descriptor_get_product_string()
-// return transfer result
-uint8_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get_product_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_product_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_product_string, daddr, language_id, buffer, len);
+}
 
-// Sync (blocking) version of tuh_descriptor_get_serial_string()
-// return transfer result
-uint8_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
+// Sync version of tuh_descriptor_get_serial_string()
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_descriptor_get_serial_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len) {
+  TU_API_SYNC(tuh_descriptor_get_serial_string, daddr, language_id, buffer, len);
+}
 
 #ifdef __cplusplus
  }
diff --git a/src/tusb_option.h b/src/tusb_option.h
index cca6096c6..867babc33 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -602,9 +602,22 @@
 // List of product IDs that can use the FTDI CDC driver. 0x0403 is FTDI's VID
 #ifndef CFG_TUH_CDC_FTDI_VID_PID_LIST
   #define CFG_TUH_CDC_FTDI_VID_PID_LIST \
-    {0x0403, 0x6001}, {0x0403, 0x6006}, {0x0403, 0x6010}, {0x0403, 0x6011}, \
-    {0x0403, 0x6014}, {0x0403, 0x6015}, {0x0403, 0x8372}, {0x0403, 0xFBFA}, \
-    {0x0403, 0xCD18}
+    {0x0403, 0x6001}, /* Similar device to SIO above */ \
+    {0x0403, 0x6006}, /* FTDI's alternate PID for above */ \
+    {0x0403, 0x6010}, /* Dual channel device */ \
+    {0x0403, 0x6011}, /* Quad channel hi-speed device */ \
+    {0x0403, 0x6014}, /* Single channel hi-speed device */ \
+    {0x0403, 0x6015}, /* FT-X series (FT201X, FT230X, FT231X, etc) */ \
+    {0x0403, 0x6040}, /* Dual channel hi-speed device with PD */ \
+    {0x0403, 0x6041}, /* Quad channel hi-speed device with PD */ \
+    {0x0403, 0x6042}, /* Dual channel hi-speed device with PD */ \
+    {0x0403, 0x6043}, /* Quad channel hi-speed device with PD */ \
+    {0x0403, 0x6044}, /* Dual channel hi-speed device with PD */ \
+    {0x0403, 0x6045}, /* Dual channel hi-speed device with PD */ \
+    {0x0403, 0x6048}, /* Quad channel automotive grade hi-speed device */ \
+    {0x0403, 0x8372}, /* Product Id SIO application of 8U100AX */ \
+    {0x0403, 0xFBFA}, /* Product ID for FT232RL */ \
+    {0x0403, 0xCD18}, /* ??? */
 #endif
 
 // CP210X is not part of CDC class, only to re-use CDC driver API
@@ -615,7 +628,9 @@
 // List of product IDs that can use the CP210X CDC driver. 0x10C4 is Silicon Labs' VID
 #ifndef CFG_TUH_CDC_CP210X_VID_PID_LIST
   #define CFG_TUH_CDC_CP210X_VID_PID_LIST \
-    {0x10C4, 0xEA60}, {0x10C4, 0xEA70}
+  { 0x10C4, 0xEA60 }, /* Silicon Labs factory default */ \
+  { 0x10C4, 0xEA61 }, /* Silicon Labs factory default */ \
+  { 0x10C4, 0xEA70 }  /* Silicon Labs Dual Port factory default */
 #endif
 
 #ifndef CFG_TUH_CDC_CH34X
@@ -635,6 +650,24 @@
     { 0x9986, 0x7523 }  /* overtaken from Linux Kernel driver /drivers/usb/serial/ch341.c */
 #endif
 
+#ifndef CFG_TUH_CDC_PL2303
+  // PL2303 is not part of CDC class, only to re-use CDC driver API
+  #define CFG_TUH_CDC_PL2303 0
+#endif
+
+#ifndef CFG_TUH_CDC_PL2303_VID_PID_QUIRKS_LIST
+  // List of product IDs that can use the PL2303 CDC driver
+  #define CFG_TUH_CDC_PL2303_VID_PID_LIST \
+  { 0x067b, 0x2303 }, /* initial 2303 */ \
+  { 0x067b, 0x2304 }, /* TB */ \
+  { 0x067b, 0x23a3 }, /* GC */ \
+  { 0x067b, 0x23b3 }, /* GB */ \
+  { 0x067b, 0x23c3 }, /* GT */ \
+  { 0x067b, 0x23d3 }, /* GL */ \
+  { 0x067b, 0x23e3 }, /* GE */ \
+  { 0x067b, 0x23f3 }  /* GS */
+#endif
+
 #ifndef CFG_TUH_HID
   #define CFG_TUH_HID    0
 #endif