diff options
| author | Rocky04 <[email protected]> | 2024-01-15 16:45:58 +0100 |
|---|---|---|
| committer | GitHub <[email protected]> | 2024-01-15 16:45:58 +0100 |
| commit | 783a4f002b3c876aef6077ea57d0060b072e8ca9 (patch) | |
| tree | 8f130995c87fac0a3da770d7cabbb4d5cde1e155 | |
| parent | 78a1d4c482606cac398ee09b55a4dab04f400ae3 (diff) | |
Test mode support only for Hi-Speed devices
| -rw-r--r-- | src/common/tusb_mcu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h index d74d7a2c5..ef28ac8fb 100644 --- a/src/common/tusb_mcu.h +++ b/src/common/tusb_mcu.h @@ -195,7 +195,6 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32F7) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 - #define TUP_USBIP_DWC2_TEST_MODE_SUPPORT // FS has 6, HS has 9 #define TUP_DCD_ENDPOINT_MAX 9 @@ -203,6 +202,7 @@ // MCU with on-chip HS Phy #if defined(STM32F723xx) || defined(STM32F730xx) || defined(STM32F733xx) #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS + #define TUP_USBIP_DWC2_TEST_MODE_SUPPORT #endif #elif TU_CHECK_MCU(OPT_MCU_STM32H7) @@ -265,13 +265,13 @@ #elif TU_CHECK_MCU(OPT_MCU_STM32U5) #define TUP_USBIP_DWC2 #define TUP_USBIP_DWC2_STM32 - #define TUP_USBIP_DWC2_TEST_MODE_SUPPORT // U59x/5Ax/5Fx/5Gx are highspeed with built-in HS PHY #if defined(STM32U595xx) || defined(STM32U599xx) || defined(STM32U5A5xx) || defined(STM32U5A9xx) || \ defined(STM32U5F7xx) || defined(STM32U5F9xx) || defined(STM32U5G7xx) || defined(STM32U5G9xx) #define TUP_DCD_ENDPOINT_MAX 9 #define TUP_RHPORT_HIGHSPEED 1 + #define TUP_USBIP_DWC2_TEST_MODE_SUPPORT #else #define TUP_DCD_ENDPOINT_MAX 6 #endif |