diff options
| author | hathach <[email protected]> | 2019-03-27 08:52:25 -0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2019-03-27 08:52:25 -0700 |
| commit | 86c24b310509a368cc6a9dfbec43ce531e71d598 (patch) | |
| tree | 81fec0b3724083a3515ef09e0b7d601ce01ec621 | |
| parent | 547cc045fa1d8862e7e00c1d7b4a0026531d0098 (diff) | |
| parent | 38f7d281d44c69593f1de3885a292ee7c5c39355 (diff) | |
Merge pull request #49 from hathach/develop
clean up porting API
117 files changed, 7619 insertions, 2443 deletions
@@ -51,7 +51,7 @@ The stack supports the following MCUs - **MicroChip:** SAMD21, SAMD51 (device only) - **ST:** STM32F4 -[Here is the list of supported Boards](hw/bsp/readme.md) +[Here is the list of supported Boards](docs/boards.md) ## Compiler & IDE diff --git a/hw/bsp/readme.md b/docs/boards.md index 02edce91e..02edce91e 100644 --- a/hw/bsp/readme.md +++ b/docs/boards.md diff --git a/docs/porting.md b/docs/porting.md index f5af82800..5f1df0d7a 100644 --- a/docs/porting.md +++ b/docs/porting.md @@ -53,12 +53,6 @@ The OS Abstraction Layer is responsible for providing basic data structures for The code is almost entirely agnostic of MCU and lives in `src/osal`. -#### tusb_hal_millis - -The OPT_OS_NONE option is the only option which requires an MCU specific function. It needs `tusb_hal_millis` to measure the passage of time. On ARM this is commonly done with SysTick. The function returns the elapsed number of milliseconds since startup. - -`tusb_hal_millis` is also provided in `hw/bsp/<board name>/board_<board name>.c` because it may vary with MCU use. - ### Device API After the USB device is setup, the USB device code works by processing events on the main thread (by calling `tud_task`). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing. @@ -153,9 +147,9 @@ The arguments are: * the result of the transfer. Failure isn't handled yet. * `true` to note the call is from an interrupt handler. -##### dcd_edpt_stall / dcd_edpt_stalled / dcd_edpt_clear_stall +##### dcd_edpt_stall / dcd_edpt_clear_stall -Stalling is one way an endpoint can indicate failure such as when an unsupported command is transmitted. The trio of `dcd_edpt_stall`, `dcd_edpt_stalled`, `dcd_edpt_clear_stall` help manage the stall state of all endpoints. +Stalling is one way an endpoint can indicate failure such as when an unsupported command is transmitted. The pair of `dcd_edpt_stall`, `dcd_edpt_clear_stall` help manage the stall state of all endpoints. ## Woohoo! diff --git a/examples/device/cdc_msc_hid/Makefile b/examples/device/cdc_msc_hid/Makefile index fffabee9d..a2156e1b1 100644 --- a/examples/device/cdc_msc_hid/Makefile +++ b/examples/device/cdc_msc_hid/Makefile @@ -69,7 +69,7 @@ else CFLAGS += -flto -Os endif -CFLAGS += $(INC) -Wall -Werror -std=gnu11 -DBOARD_$(shell echo $(BOARD) | tr a-z\- A-Z_) +CFLAGS += $(INC) -Wall -Werror -std=gnu11 -DBOARD_$(shell echo $(BOARD) | tr '[:lower:]' '[:upper:]') LDFLAGS += $(CFLAGS) -fshort-enums -Wl,-T,$(TOP)/$(LD_FILE) -Wl,[email protected] -Wl,-cref -Wl,-gc-sections -specs=nosys.specs -specs=nano.specs ifeq ("$(V)","1") @@ -161,7 +161,7 @@ $(BUILD)/obj/%.o: %.S @echo AS $(notdir $@) $(QUIET)$(CC) -x assembler-with-cpp $(ASFLAGS) -c -o $@ $< -# Flash binary using Jlink +# Flash binary using Jlink, should be added into system path ifeq ($(OS),Windows_NT) JLINKEXE = JLink.exe else diff --git a/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject b/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject index 80acd6fae..3904cda3b 100644 --- a/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc11u6x/lpc11u6x.emProject @@ -19,7 +19,7 @@ arm_target_device_name="LPC11U68" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__LPC11U68__;__LPC1100_FAMILY;__LPC11U00_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;CORE_M0PLUS;BOARD_LPCXPRESSO11U68;CFG_TUSB_MCU=OPT_MCU_LPC11UXX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" + c_preprocessor_definitions="__LPC11U68__;__LPC1100_FAMILY;__LPC11U00_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;CORE_M0PLUS;CFG_TUSB_MCU=OPT_MCU_LPC11UXX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_11u6x/inc;$(rootDir)/src" debug_register_definition_file="$(ProjectDir)/LPC11U6x_Registers.xml" debug_target_connection="J-Link" @@ -47,6 +47,7 @@ </folder> <configuration Name="LPCXpresso 11U68" + c_preprocessor_definitions="BOARD_LPCXPRESSO11U68" link_use_linker_script_file="No" linker_section_placement_file="flash_placement.xml" /> <folder Name="hw"> diff --git a/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject b/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject index 2cd92ca4c..a3a59af71 100644 --- a/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc13xx/lpc13xx.emProject @@ -18,7 +18,7 @@ arm_target_device_name="LPC1347" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__LPC1347FBD64__;__LPC1300_FAMILY;__LPC134x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;BOARD_LPCXPRESSO1347;CFG_TUSB_MCU=OPT_MCU_LPC13XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" + c_preprocessor_definitions="__LPC1347FBD64__;__LPC1300_FAMILY;__LPC134x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;CFG_TUSB_MCU=OPT_MCU_LPC13XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss3")));CFG_TUSB_MEM_ALIGN=__attribute__ ((aligned(64)))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_13xx/inc;$(rootDir)/src" debug_register_definition_file="$(ProjectDir)/LPC13Uxx_Registers.xml" debug_target_connection="J-Link" @@ -54,7 +54,6 @@ <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="lpcxpresso1347"> <file file_name="../../../../../hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c" /> - <file file_name="../../../../../hw/bsp/lpcxpresso1347/board_lpcxpresso1347.h" /> </folder> </folder> <folder Name="mcu"> @@ -107,6 +106,9 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + <configuration + Name="LPCXpresso 1347" + c_preprocessor_definitions="BOARD_LPCXPRESSO1347" /> </project> <configuration Name="LPCXpresso 1347" diff --git a/examples/device/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject b/examples/device/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject index 2e17348b9..d0b065370 100644 --- a/examples/device/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject @@ -19,7 +19,7 @@ arm_target_device_name="LPC1769" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="LPC175x_6x;__LPC1700_FAMILY;__LPC176x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;BOARD_LPCXPRESSO1769;CFG_TUSB_MCU=OPT_MCU_LPC175X_6X" + c_preprocessor_definitions="LPC175x_6x;__LPC1700_FAMILY;__LPC176x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;CFG_TUSB_MCU=OPT_MCU_LPC175X_6X" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc;$(rootDir)/src" debug_register_definition_file="LPC176x5x_Registers.xml" debug_target_connection="J-Link" @@ -47,39 +47,40 @@ <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="lpcxpresso1769"> <file file_name="../../../../../hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c" /> - <file file_name="../../../../../hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h" /> </folder> </folder> <folder Name="mcu"> <folder Name="nxp"> - <folder Name="lpc_chip_175x_6x"> - <folder Name="inc"> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip_lpc175x_6x.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip_lpc177x_8x.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip_lpc407x_8x.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/clock_17xx_40xx.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/cmsis.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/cmsis_175x_6x.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/core_cm3.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/core_cmFunc.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/core_cmInstr.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/gpio_17xx_40xx.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/gpioint_17xx_40xx.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/iocon_17xx_40xx.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/lpc_types.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/sys_config.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/sysctl_17xx_40xx.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/uart_17xx_40xx.h" /> - </folder> - <folder Name="src"> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/chip_17xx_40xx.c" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/clock_17xx_40xx.c" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/gpio_17xx_40xx.c" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/iocon_17xx_40xx.c" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c" /> - <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/uart_17xx_40xx.c" /> + <folder Name="lpcopen"> + <folder Name="lpc_chip_175x_6x"> + <folder Name="inc"> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip_lpc175x_6x.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip_lpc177x_8x.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/chip_lpc407x_8x.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/clock_17xx_40xx.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/cmsis.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/cmsis_175x_6x.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/core_cm3.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/core_cmFunc.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/core_cmInstr.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/gpio_17xx_40xx.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/gpioint_17xx_40xx.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/iocon_17xx_40xx.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/lpc_types.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/sys_config.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/sysctl_17xx_40xx.h" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc/uart_17xx_40xx.h" /> + </folder> + <folder Name="src"> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/chip_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/clock_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/gpio_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/iocon_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/uart_17xx_40xx.c" /> + </folder> </folder> </folder> </folder> @@ -107,6 +108,9 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + <configuration + Name="LPCXpresso 1769" + c_preprocessor_definitions="BOARD_LPCXPRESSO1769" /> </project> <configuration Name="LPCXpresso 1769" /> </solution> diff --git a/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject b/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject index e3b2d4ce0..e7ce7a02a 100644 --- a/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc18xx/lpc18xx.emProject @@ -18,7 +18,7 @@ arm_target_device_name="LPC1857" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="LPC18xx;__LPC1800_FAMILY;__LPC185x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;BOARD_MCB1800;CFG_TUSB_MCU=OPT_MCU_LPC18XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" + c_preprocessor_definitions="LPC18xx;__LPC1800_FAMILY;__LPC185x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;CFG_TUSB_MCU=OPT_MCU_LPC18XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_18xx/inc;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_18xx/inc/config_18xx;$(rootDir)/src" debug_register_definition_file="$(ProjectDir)/LPC18xx_Registers.xml" debug_target_connection="J-Link" @@ -54,7 +54,6 @@ <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="mcb1800"> <file file_name="../../../../../hw/bsp/mcb1800/board_mcb1800.c" /> - <file file_name="../../../../../hw/bsp/mcb1800/board_mcb1800.h" /> </folder> </folder> <folder Name="mcu"> @@ -122,6 +121,9 @@ filter="*.c;*.h" path="../../../../../src" recurse="Yes" /> + <configuration + Name="MCB1800" + c_preprocessor_definitions="BOARD_MCB1800" /> </project> <configuration Name="MCB1800" diff --git a/examples/device/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject b/examples/device/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject index 47b7b6262..5a1cbe52b 100644 --- a/examples/device/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc40xx/lpc40xx.emProject @@ -19,7 +19,7 @@ arm_target_device_name="LPC4088" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="CORE_M4;__LPC4000_FAMILY;__LPC408x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4088QS;CFG_TUSB_MCU=OPT_MCU_LPC40XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" + c_preprocessor_definitions="CORE_M4;__LPC4000_FAMILY;__LPC408x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_LPC40XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_40xx/inc;$(rootDir)/src" debug_register_definition_file="$(ProjectDir)/LPC408x_7x_Registers.xml" debug_target_connection="J-Link" @@ -47,6 +47,7 @@ </folder> <configuration Name="EA4088 QuickStart" + c_preprocessor_definitions="BOARD_EA4088QS" link_use_linker_script_file="No" linker_section_placement_file="flash_placement.xml" /> <folder Name="hw"> @@ -55,7 +56,6 @@ <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="ea4088qs"> <file file_name="../../../../../hw/bsp/ea4088qs/board_ea4088qs.c" /> - <file file_name="../../../../../hw/bsp/ea4088qs/board_ea4088qs.h" /> </folder> </folder> <folder Name="mcu"> diff --git a/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject b/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject index e742159fa..26444c469 100644 --- a/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject +++ b/examples/device/cdc_msc_hid/ses/lpc43xx/lpc43xx.emProject @@ -19,7 +19,7 @@ arm_target_device_name="LPC4357_M4" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="CORE_M4;__LPC4300_FAMILY;__LPC435x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_EA4357;CFG_TUSB_MCU=OPT_MCU_LPC43XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" + c_preprocessor_definitions="CORE_M4;__LPC4300_FAMILY;__LPC435x_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_LPC43XX;CFG_TUSB_MEM_SECTION= __attribute__((section(".bss2")))" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_43xx/inc;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_43xx/inc/config_43xx;$(rootDir)/src;$(lpcDir)//inc" debug_register_definition_file="LPC43xx_Registers.xml" debug_target_connection="J-Link" @@ -47,7 +47,6 @@ <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="ea4357"> <file file_name="../../../../../hw/bsp/ea4357/board_ea4357.c" /> - <file file_name="../../../../../hw/bsp/ea4357/board_ea4357.h" /> <file file_name="../../../../../hw/bsp/ea4357/pca9532.c" /> <file file_name="../../../../../hw/bsp/ea4357/pca9532.h" /> </folder> @@ -129,5 +128,7 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + <configuration Name="EA4357" c_preprocessor_definitions="BOARD_EA4357" /> </project> + <configuration Name="EA4357" /> </solution> diff --git a/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject b/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject index b94dac089..6f5614f27 100644 --- a/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject +++ b/examples/device/cdc_msc_hid/ses/nrf5x/nrf5x.emProject @@ -19,7 +19,7 @@ arm_target_device_name="nRF52840_xxAA" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_PCA10056;CFG_TUSB_MCU=OPT_MCU_NRF5X" + c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_NRF5X" c_user_include_directories="../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(nrfxDir)/..;$(nrfxDir);$(nrfxDir)/mdk;$(nrfxDir)/hal;$(nrfxDir)/drivers/include" debug_register_definition_file="nrf52840_Registers.xml" debug_target_connection="J-Link" @@ -44,7 +44,6 @@ <folder Name="bsp"> <folder Name="pca10056"> <file file_name="../../../../../hw/bsp/pca10056/board_pca10056.c" /> - <file file_name="../../../../../hw/bsp/pca10056/board_pca10056.h" /> </folder> <file file_name="../../../../../hw/bsp/ansi_escape.h" /> <file file_name="../../../../../hw/bsp/board.h" /> @@ -112,11 +111,12 @@ <configuration Name="pca10056" build_treat_warnings_as_errors="No" + c_preprocessor_definitions="BOARD_PCA10056" linker_memory_map_file="nRF52840_xxAA_MemoryMap.xml" /> <configuration Name="pca10056 s140v6" build_treat_warnings_as_errors="No" - c_preprocessor_definitions="SOFTDEVICE_PRESENT;S140;NO_VTOR_CONFIG" + c_preprocessor_definitions="SOFTDEVICE_PRESENT;S140;NO_VTOR_CONFIG;BOARD_PCA10056" c_user_include_directories="$(nrfxDir)/../nrf5x/s140_nrf52_6.1.1_API/include;$(nrfxDir)/../nrf5x/s140_nrf52_6.1.1_API/include/nrf52" debug_start_from_entry_point_symbol="No" linker_memory_map_file="nRF52840_xxAA_s140v6_MemoryMap.xml" /> diff --git a/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject b/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject index 4452699ef..e65873008 100644 --- a/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject +++ b/examples/device/cdc_msc_hid/ses/samd21/samd21.emProject @@ -18,7 +18,7 @@ arm_target_device_name="ATSAMD21G18A" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__SAMD21G18A__;__SAMD21_FAMILY;__SAM_D21_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CONF_XOSC32K_CONFIG=1;CONF_OSC32K_ENABLE=1;CONF_OSC32K_EN32K=1;CONF_XOSC32K_STARTUP=CONF_XOSC32K_STARTUP_TIME_2000092MCS;CONF_DFLL_ONDEMAND=0;CONF_DFLL_OVERWRITE_CALIBRATION=0;BOARD_METRO_M0_EXPRESS;CFG_TUSB_MCU=OPT_MCU_SAMD21" + c_preprocessor_definitions="__SAMD21G18A__;__SAMD21_FAMILY;__SAM_D21_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CONF_XOSC32K_CONFIG=1;CONF_OSC32K_ENABLE=1;CONF_OSC32K_EN32K=1;CONF_XOSC32K_STARTUP=CONF_XOSC32K_STARTUP_TIME_2000092MCS;CONF_DFLL_ONDEMAND=0;CONF_DFLL_OVERWRITE_CALIBRATION=0;CFG_TUSB_MCU=OPT_MCU_SAMD21" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/CMSIS/Include;$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk;$(asf4Dir)/hpl/pm" debug_register_definition_file="ATSAMD21G18A_Registers.xml" debug_target_connection="J-Link" @@ -46,7 +46,6 @@ <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="metro_m0_express"> <file file_name="../../../../../hw/bsp/metro_m0_express/board_metro_m0_express.c" /> - <file file_name="../../../../../hw/bsp/metro_m0_express/board_metro_m0_express.h" /> </folder> </folder> <folder Name="mcu"> @@ -96,6 +95,9 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + <configuration + Name="Metro M0 Express" + c_preprocessor_definitions="BOARD_METRO_M0_EXPRESS" /> </project> <configuration Name="Metro M0 Express" /> </solution> diff --git a/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject b/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject index 6d5c14507..280afdcd1 100644 --- a/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject +++ b/examples/device/cdc_msc_hid/ses/samd51/samd51.emProject @@ -19,7 +19,7 @@ arm_target_device_name="ATSAMD51J19" arm_target_interface_type="SWD" build_treat_warnings_as_errors="Yes" - c_preprocessor_definitions="__SAMD51_FAMILY;__SAMD51J19A__;ARM_MATH_CM4;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;BOARD_METRO_M4_EXPRESS;CFG_TUSB_MCU=OPT_MCU_SAMD51" + c_preprocessor_definitions="__SAMD51_FAMILY;__SAMD51J19A__;ARM_MATH_CM4;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CFG_TUSB_MCU=OPT_MCU_SAMD51" c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/CMSIS/Include;$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk" debug_register_definition_file="ATSAMD51J19A_Registers.xml" debug_target_connection="J-Link" @@ -47,7 +47,6 @@ <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="metro_m4_express"> <file file_name="../../../../../hw/bsp/metro_m4_express/board_metro_m4_express.c" /> - <file file_name="../../../../../hw/bsp/metro_m4_express/board_metro_m4_express.h" /> </folder> </folder> <folder Name="mcu"> @@ -100,6 +99,9 @@ filter="*.c;*.h" path="../../../../../lib/segger_rtt" recurse="No" /> + <configuration + Name="Metro M4 Express" + c_preprocessor_definitions="BOARD_METRO_M4_EXPRESS" /> </project> <configuration Name="Metro M4 Express" /> </solution> diff --git a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject index 71119a878..83067fd09 100644 --- a/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject +++ b/examples/device/cdc_msc_hid/ses/stm32f4/stm32f4.emProject @@ -18,7 +18,7 @@ arm_target_debug_interface_type="ADIv5" arm_target_device_name="STM32F407VG" arm_target_interface_type="SWD" - c_preprocessor_definitions="STM32F407xx;__STM32F4xx_FAMILY;__STM32F407_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_STM32F4;HSE_VALUE=8000000;BOARD_STM32F407G_DISC1" + c_preprocessor_definitions="STM32F407xx;__STM32F4xx_FAMILY;__STM32F407_SUBFAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_STM32F4;HSE_VALUE=8000000" c_user_include_directories="../../src;$(rootDir)/src;$(rootDir)/hw;$(rootDir)/hw/mcu/st/cmsis;$(rootDir)/hw/mcu/st/stm32lib/CMSIS/STM32F4xx/Include" debug_register_definition_file="$(ProjectDir)/STM32F40x_Registers.xml" debug_target_connection="J-Link" @@ -63,7 +63,6 @@ <folder Name="bsp"> <folder Name="stm32f407g_disc1"> <file file_name="../../../../../hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c" /> - <file file_name="../../../../../hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h" /> </folder> <file file_name="../../../../../hw/bsp/board.h" /> </folder> @@ -76,6 +75,9 @@ </folder> </folder> </folder> + <configuration + Name="stm32f407g_disc1" + c_preprocessor_definitions="BOARD_STM32F407G_DISC1" /> </project> <configuration Name="stm32f407g_disc1" diff --git a/examples/device/cdc_msc_hid/src/main.c b/examples/device/cdc_msc_hid/src/main.c index b2a902835..75d9a31dc 100644 --- a/examples/device/cdc_msc_hid/src/main.c +++ b/examples/device/cdc_msc_hid/src/main.c @@ -121,10 +121,11 @@ void tud_cdc_rx_cb(uint8_t itf) void usb_hid_task(void) { // Poll every 10ms - static tu_timeout_t tm = { .start = 0, .interval = 10 }; + const uint32_t interval_ms = 10; + static uint32_t start_ms = 0; - if ( !tu_timeout_expired(&tm) ) return; // not enough time - tu_timeout_reset(&tm); + if ( board_millis() < start_ms + interval_ms) return; // not enough time + start_ms += interval_ms; uint32_t const btn = board_buttons(); @@ -193,11 +194,14 @@ void tud_umount_cb(void) //--------------------------------------------------------------------+ void led_blinking_task(void) { - static tu_timeout_t tm = { .start = 0, .interval = 1000 }; // Blink every 1000 ms + const uint32_t interval_ms = 1000; + static uint32_t start_ms = 0; + static bool led_state = false; - if ( !tu_timeout_expired(&tm) ) return; // not enough time - tu_timeout_reset(&tm); + // Blink every 1000 ms + if ( board_millis() < start_ms + interval_ms) return; // not enough time + start_ms += interval_ms; board_led_control(led_state); led_state = 1 - led_state; // toggle diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/FreeRTOSConfig.h b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/FreeRTOSConfig.h index 0fad1dc89..5d3ba479e 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/FreeRTOSConfig.h +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/FreeRTOSConfig.h @@ -4,7 +4,7 @@ //--------------------------------------------------------------------+ // See http://www.freertos.org/a00110.html. //--------------------------------------------------------------------+ -#include "LPC17xx.h" +#include "chip.h" #define configCPU_CLOCK_HZ SystemCoreClock diff --git a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/lpc175x_6x.emProject b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/lpc175x_6x.emProject index 893d6b507..5493af626 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/lpc175x_6x.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/lpc175x_6x/lpc175x_6x.emProject @@ -19,8 +19,8 @@ arm_target_device_name="LPC1769" arm_target_interface_type="SWD" build_treat_warnings_as_errors="No" - c_preprocessor_definitions="LPC175x_6x;__LPC1700_FAMILY;__LPC176x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;BOARD_LPCXPRESSO1769;CFG_TUSB_MCU=OPT_MCU_LPC175X_6X" - c_user_include_directories=".;../../src;$(rootDir)/hw;$(rootDir)/src;$(lpcDir)/CMSIS_CORE_LPC17xx/inc;$(lpcDir)/LPC17xx_DriverLib/include;$(freertosDir)/Source/include;$(freertosDir)/Source/portable/GCC/ARM_CM3" + c_preprocessor_definitions="LPC175x_6x;__LPC1700_FAMILY;__LPC176x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;CFG_TUSB_MCU=OPT_MCU_LPC175X_6X" + c_user_include_directories=".;../../src;$(rootDir)/hw;$(rootDir)/src;$(rootDir)/hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/inc;$(rootDir)/lib/FreeRTOS/Source/include;$(rootDir)/lib/FreeRTOS/Source/portable/GCC/ARM_CM3" debug_register_definition_file="LPC176x5x_Registers.xml" debug_target_connection="J-Link" gcc_enable_all_warnings="Yes" @@ -29,7 +29,7 @@ linker_memory_map_file="LPC1769_MemoryMap.xml" linker_section_placement_file="flash_placement.xml" linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x10000000 0x00008000" - macros="DeviceFamily=LPC1700;DeviceSubFamily=LPC176x;Target=LPC1769;Placement=Flash;rootDir=../../../../..;lpcDir=../../../../../hw/mcu/nxp/lpc175x_6x;freertosDir=../../../../../lib/FreeRTOS" + macros="DeviceFamily=LPC1700;DeviceSubFamily=LPC176x;Target=LPC1769;Placement=Flash;rootDir=../../../../.." project_directory="" project_type="Executable" target_reset_script="Reset();" @@ -43,30 +43,23 @@ recurse="Yes" /> <folder Name="hw"> <folder Name="bsp"> - <file file_name="../../../../../hw/bsp/ansi_escape.h" /> <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="lpcxpresso1769"> <file file_name="../../../../../hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c" /> - <file file_name="../../../../../hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h" /> </folder> </folder> <folder Name="mcu"> <folder Name="nxp"> - <folder Name="lpc175x_6x"> - <folder Name="CMSIS_CORE_LPC17xx"> - <folder Name="inc"> - <file file_name="../../../../../hw/mcu/nxp/lpc175x_6x/CMSIS_CORE_LPC17xx/inc/LPC17xx.h" /> - <file file_name="../../../../../hw/mcu/nxp/lpc175x_6x/CMSIS_CORE_LPC17xx/inc/system_LPC17xx.h" /> - </folder> + <folder Name="lpcopen"> + <folder Name="lpc_chip_175x_6x"> <folder Name="src"> - <file file_name="../../../../../hw/mcu/nxp/lpc175x_6x/CMSIS_CORE_LPC17xx/src/system_LPC17xx.c" /> - </folder> - </folder> - <folder Name="LPC17xx_DriverLib"> - <folder Name="include" /> - <folder Name="source"> - <file file_name="../../../../../hw/mcu/nxp/lpc175x_6x/LPC17xx_DriverLib/source/lpc17xx_gpio.c" /> - <file file_name="../../../../../hw/mcu/nxp/lpc175x_6x/LPC17xx_DriverLib/source/lpc17xx_pinsel.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/chip_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/clock_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/gpio_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/iocon_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c" /> + <file file_name="../../../../../hw/mcu/nxp/lpcopen/lpc_chip_175x_6x/src/uart_17xx_40xx.c" /> </folder> </folder> </folder> @@ -136,6 +129,9 @@ <file file_name="../../../../../lib/FreeRTOS/freertos_hook.c" /> </folder> </folder> + <configuration + Name="LPCXpresso 1769" + c_preprocessor_definitions="BOARD_LPCXPRESSO1769" /> </project> <configuration Name="LPCXpresso 1769" /> </solution> diff --git a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h index 26df38d3d..754158622 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h +++ b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/FreeRTOSConfig.h @@ -83,7 +83,7 @@ /* Software timer related definitions. */ #define configUSE_TIMERS 1 -#define configTIMER_TASK_PRIORITY 2 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) #define configTIMER_QUEUE_LENGTH 32 #define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE diff --git a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject index ea4950682..ad236ae66 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/nrf5x/nrf5x.emProject @@ -19,7 +19,7 @@ arm_target_device_name="nRF52840_xxAA" arm_target_interface_type="SWD" build_treat_warnings_as_errors="No" - c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_PCA10056;CFG_TUSB_MCU=OPT_MCU_NRF5X" + c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;CFG_TUSB_MCU=OPT_MCU_NRF5X" c_user_include_directories="./;../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(nrfxDir)/..;$(nrfxDir);$(nrfxDir)/mdk;$(nrfxDir)/hal;$(nrfxDir)/drivers/include;$(freertosDir)/Source/include;$(freertosDir)/Source/portable/GCC/ARM_CM4F" debug_register_definition_file="nrf52840_Registers.xml" debug_target_connection="J-Link" @@ -44,9 +44,7 @@ <folder Name="bsp"> <folder Name="pca10056"> <file file_name="../../../../../hw/bsp/pca10056/board_pca10056.c" /> - <file file_name="../../../../../hw/bsp/pca10056/board_pca10056.h" /> </folder> - <file file_name="../../../../../hw/bsp/ansi_escape.h" /> <file file_name="../../../../../hw/bsp/board.h" /> </folder> <folder Name="mcu"> @@ -143,10 +141,12 @@ <file file_name="../../../../../lib/FreeRTOS/Source/tasks.c" /> <file file_name="../../../../../lib/FreeRTOS/Source/timers.c" /> </folder> - <file file_name="../../../../../lib/FreeRTOS/FreeRTOSConfig.h" /> <file file_name="../../../../../lib/FreeRTOS/freertos_hook.c" /> </folder> </folder> + <configuration + Name="pca10056" + c_preprocessor_definitions="BOARD_PCA10056" /> </project> <configuration Name="pca10056" /> </solution> diff --git a/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject b/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject index 07e902645..18291fbfd 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/samd21/samd21.emProject @@ -41,11 +41,9 @@ recurse="Yes" /> <folder Name="hw"> <folder Name="bsp"> - <file file_name="../../../../../hw/bsp/ansi_escape.h" /> <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="metro_m0_express"> <file file_name="../../../../../hw/bsp/metro_m0_express/board_metro_m0_express.c" /> - <file file_name="../../../../../hw/bsp/metro_m0_express/board_metro_m0_express.h" /> </folder> </folder> <folder Name="mcu"> diff --git a/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject b/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject index 81758d177..c18aad2eb 100644 --- a/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject +++ b/examples/device/cdc_msc_hid_freertos/ses/samd51/samd51.emProject @@ -42,11 +42,9 @@ recurse="Yes" /> <folder Name="hw"> <folder Name="bsp"> - <file file_name="../../../../../hw/bsp/ansi_escape.h" /> <file file_name="../../../../../hw/bsp/board.h" /> <folder Name="metro_m4_express"> <file file_name="../../../../../hw/bsp/metro_m4_express/board_metro_m4_express.c" /> - <file file_name="../../../../../hw/bsp/metro_m4_express/board_metro_m4_express.h" /> </folder> </folder> <folder Name="mcu"> diff --git a/examples/device/cdc_msc_hid_freertos/src/main.c b/examples/device/cdc_msc_hid_freertos/src/main.c index 5705c1657..388bd9ad1 100644 --- a/examples/device/cdc_msc_hid_freertos/src/main.c +++ b/examples/device/cdc_msc_hid_freertos/src/main.c @@ -125,6 +125,8 @@ void cdc_task(void* params) tud_cdc_write_flush(); } } + + taskYIELD(); } } @@ -150,10 +152,11 @@ void usb_hid_task(void* params) (void) params; // Poll every 10ms - static tu_timeout_t tm = { .start = 0, .interval = 10 }; + const uint32_t interval_ms = 10; + static uint32_t start_ms = 0; - if ( !tu_timeout_expired(&tm) ) return; // not enough time - tu_timeout_reset(&tm); + if ( board_millis() < start_ms + interval_ms) return; // not enough time + start_ms += interval_ms; uint32_t const btn = board_buttons(); diff --git a/examples/device/cdc_msc_hid_mynewt/readme.md b/examples/device/cdc_msc_hid_mynewt/readme.md index 2d2f579fa..0dac39a88 100644 --- a/examples/device/cdc_msc_hid_mynewt/readme.md +++ b/examples/device/cdc_msc_hid_mynewt/readme.md @@ -1 +1 @@ -Please check out this repo https://github.com/hathach/mynewt-tinyusb-exmaple For mynewt example
\ No newline at end of file +Please check out this repo https://github.com/hathach/mynewt-tinyusb-example For mynewt example
\ No newline at end of file diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c index b38e44017..86ddb55e1 100644 --- a/examples/host/cdc_msc_hid/src/main.c +++ b/examples/host/cdc_msc_hid/src/main.c @@ -164,11 +164,14 @@ void tuh_hid_mouse_isr(uint8_t dev_addr, xfer_result_t event) //--------------------------------------------------------------------+ void led_blinking_task(void) { - static tu_timeout_t tm = { .start = 0, .interval = 1000 }; // Blink every 1000 ms + const uint32_t interval_ms = 1000; + static uint32_t start_ms = 0; + static bool led_state = false; - if ( !tu_timeout_expired(&tm) ) return; // not enough time - tu_timeout_reset(&tm); + // Blink every 1000 ms + if ( board_millis() < start_ms + interval_ms) return; // not enough time + start_ms += interval_ms; board_led_control(led_state); led_state = 1 - led_state; // toggle diff --git a/examples/obsolete/host/host_freertos/.cproject b/examples/obsolete/host/host_freertos/.cproject deleted file mode 100644 index ece06d421..000000000 --- a/examples/obsolete/host/host_freertos/.cproject +++ /dev/null @@ -1,1144 +0,0 @@ -<?xml version="1.0" encoding="UTF-8" standalone="no"?> -<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - <storageModule moduleId="org.eclipse.cdt.core.settings"> - <cconfiguration id="com.crt.advproject.config.exe.debug.1239969983"> - <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.debug.1239969983" moduleId="org.eclipse.cdt.core.settings" name="Board_NGX4330"> - <macros> - <stringMacro name="CFLAGS_ON" type="VALUE_TEXT" value="-Wextra -Wswitch-default -Wunsafe-loop-optimizations -Wcast-align -Wlogical-op -Wpacked-bitfield-compat -Wnested-externs -Wredundant-decls -Winline"/> - <stringMacro name="CFLAGS" type="VALUE_TEXT" value="${CFLAGS_OFF}"/> - <stringMacro name="CFLAGS_OFF" type="VALUE_TEXT" value=""/> - </macros> - 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</filteredResources> -</projectDescription> diff --git a/hw/bsp/board.h b/hw/bsp/board.h index 6b432d2e5..df9d5d11d 100644 --- a/hw/bsp/board.h +++ b/hw/bsp/board.h @@ -40,82 +40,67 @@ #include "ansi_escape.h" -// NXP LPC -#if defined BOARD_LPCXPRESSO11U14 - #include "lpcxpresso11u14/board_lpcxpresso11u14.h" -#elif defined BOARD_LPCXPRESSO1347 - #include "lpcxpresso1347/board_lpcxpresso1347.h" -#elif defined BOARD_LPCXPRESSO11U68 - #include "lpcxpresso11u68/board_lpcxpresso11u68.h" -#elif defined BOARD_LPCXPRESSO1769 - #include "lpcxpresso1769/board_lpcxpresso1769.h" -#elif defined BOARD_MCB1800 - #include "mcb1800/board_mcb1800.h" -#elif defined BOARD_EA4088QS - #include "ea4088qs/board_ea4088qs.h" -#elif defined BOARD_EA4357 - #include "ea4357/board_ea4357.h" - -// Nordic nRF -#elif defined BOARD_PCA10056 - #include "pca10056/board_pca10056.h" - -// Atmel SAM -#elif defined BOARD_METRO_M4_EXPRESS - #include "metro_m4_express/board_metro_m4_express.h" -#elif defined BOARD_METRO_M0_EXPRESS - #include "metro_m0_express/board_metro_m0_express.h" - -// ST STM32 -#elif defined BOARD_STM32F407G_DISC1 - #include "stm32f407g_disc1/board_stm32f407g_disc1.h" -#else - #error BOARD is not defined or supported yet -#endif +#include "tusb.h" #define CFG_UART_BAUDRATE 115200 -#define BOARD_TICKS_HZ 1000 -#define board_tick2ms(tck) ( ( ((uint64_t)(tck)) * 1000) / BOARD_TICKS_HZ ) +//--------------------------------------------------------------------+ +// Board Porting API +//--------------------------------------------------------------------+ -// Initialize on-board peripherals +// Initialize on-board peripherals : led, button, uart and USB void board_init(void); -//--------------------------------------------------------------------+ -// LED -// Board layer use only 1 LED for indicator -//--------------------------------------------------------------------+ +// Turn LED on or off void board_led_control(bool state); -static inline void board_led_on(void) +// Get the current state of buttons on the board +// \return Bitmask where a '1' means active (pressed), a '0' means inactive. +uint32_t board_buttons(void); + +// Get characters from UART +int board_uart_read(uint8_t* buf, int len); + +// Send characters to UART +int board_uart_write(void const * buf, int len); + +#if CFG_TUSB_OS == OPT_OS_NONE + +// Get current milliseconds, must be implemented in board.c when no OS is used +uint32_t board_millis(void); + +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + +static inline uint32_t board_millis(void) { - board_led_control(true); + return ( ( ((uint64_t) xTaskGetTickCount()) * 1000) / configTICK_RATE_HZ ); } -static inline void board_led_off(void) +#elif CFG_TUSB_OS == OPT_OS_MYNEWT + +static inline uint32_t board_millis(void) { - board_led_control(false); + return os_time_ticks_to_ms32( os_time_get() ); } -//--------------------------------------------------------------------+ -// Buttons -// TODO refractor later -//--------------------------------------------------------------------+ -/** Get the current state of the buttons on the board - * \return Bitmask where a '1' means active (pressed), a '0' means inactive. - */ -uint32_t board_buttons(void); +#elif -//--------------------------------------------------------------------+ -// UART -//--------------------------------------------------------------------+ +#error "Need to implement board_millis() for this OS" -// Get characters from UART -int board_uart_read(uint8_t* buf, int len); +#endif -// Send characters to UART -int board_uart_write(void const * buf, int len); +//--------------------------------------------------------------------+ +// Helper functions +//--------------------------------------------------------------------+ +static inline void board_led_on(void) +{ + board_led_control(true); +} +static inline void board_led_off(void) +{ + board_led_control(false); +} static inline int8_t board_uart_getchar(void) { diff --git a/hw/bsp/ea4088qs/board_ea4088qs.c b/hw/bsp/ea4088qs/board_ea4088qs.c index b0ce7281b..4f4e19ee0 100644 --- a/hw/bsp/ea4088qs/board_ea4088qs.c +++ b/hw/bsp/ea4088qs/board_ea4088qs.c @@ -24,10 +24,8 @@ * This file is part of the TinyUSB stack. */ -#ifdef BOARD_EA4088QS - +#include "chip.h" #include "../board.h" -#include "tusb.h" #define LED_PORT 2 #define LED_PIN 19 @@ -79,7 +77,8 @@ void board_init(void) SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config(SystemCoreClock / BOARD_TICKS_HZ); + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); @@ -167,11 +166,9 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif - -#endif diff --git a/hw/bsp/ea4088qs/board_ea4088qs.h b/hw/bsp/ea4088qs/board_ea4088qs.h deleted file mode 100644 index 45a957065..000000000 --- a/hw/bsp/ea4088qs/board_ea4088qs.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef BOARD_EA4088QS_H_ -#define BOARD_EA4088QS_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "chip.h" - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_EA4088QS_H_ */ diff --git a/hw/bsp/ea4357/board_ea4357.c b/hw/bsp/ea4357/board_ea4357.c index d44082551..6d7d936db 100644 --- a/hw/bsp/ea4357/board_ea4357.c +++ b/hw/bsp/ea4357/board_ea4357.c @@ -24,11 +24,9 @@ * This file is part of the TinyUSB stack. */ -#ifdef BOARD_EA4357 - +#include "chip.h" #include "../board.h" #include "pca9532.h" -#include "tusb.h" #define BOARD_UART_PORT LPC_USART0 #define BOARD_UART_PIN_PORT 0x0f @@ -67,9 +65,9 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif @@ -124,7 +122,8 @@ void board_init(void) SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config( SystemCoreClock / BOARD_TICKS_HZ ); + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); #endif Chip_GPIO_Init(LPC_GPIO_PORT); @@ -297,5 +296,3 @@ int board_uart_write(void const * buf, int len) (void) len; return 0; } - -#endif diff --git a/hw/bsp/ea4357/board_ea4357.h b/hw/bsp/ea4357/board_ea4357.h deleted file mode 100644 index b0e138f4f..000000000 --- a/hw/bsp/ea4357/board_ea4357.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef _TUSB_BOARD_EA4357_H_ -#define _TUSB_BOARD_EA4357_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "chip.h" - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_BOARD_EA4357_H_ */ diff --git a/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c b/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c index ab05c045a..fa0966831 100644 --- a/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c +++ b/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.c @@ -24,8 +24,7 @@ * This file is part of the TinyUSB stack. */ -#ifdef BOARD_LPCXPRESSO11U68 - +#include "chip.h" #include "../board.h" #define LED_PORT 2 @@ -70,7 +69,11 @@ void board_init(void) SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config(SystemCoreClock / BOARD_TICKS_HZ); // 1 msec tick timer + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif Chip_GPIO_Init(LPC_GPIO); @@ -100,9 +103,9 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif @@ -143,5 +146,3 @@ int board_uart_write(void const * buf, int len) (void) len; return 0; } - -#endif diff --git a/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.h b/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.h deleted file mode 100644 index 3e8b2aded..000000000 --- a/hw/bsp/lpcxpresso11u68/board_lpcxpresso11u68.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef _TUSB_BOARD_LPCXPRESSO11U68_H_ -#define _TUSB_BOARD_LPCXPRESSO11U68_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "chip.h" - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_BOARD_LPCXPRESSO11U68_H_ */ diff --git a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c b/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c index 325577cd7..4f7909b12 100644 --- a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c +++ b/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.c @@ -24,8 +24,7 @@ * This file is part of the TinyUSB stack. */ -#ifdef BOARD_LPCXPRESSO1347 - +#include "chip.h" #include "../board.h" #define LED_PORT 0 @@ -83,7 +82,11 @@ void board_init(void) SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config(SystemCoreClock / BOARD_TICKS_HZ); // 1 msec tick timer + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); +#elif CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); #endif Chip_GPIO_Init(LPC_GPIO_PORT); @@ -113,9 +116,9 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif @@ -167,5 +170,3 @@ int board_uart_write(void const * buf, int len) (void) len; return 0; } - -#endif diff --git a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.h b/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.h deleted file mode 100644 index d20bc8c16..000000000 --- a/hw/bsp/lpcxpresso1347/board_lpcxpresso1347.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef _TUSB_BOARD_LPCXPRESSO1347_H_ -#define _TUSB_BOARD_LPCXPRESSO1347_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "chip.h" - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_BOARD_LPCXPRESSO1347_H_ */ diff --git a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c index 5ee799da5..420c90e60 100644 --- a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c +++ b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c @@ -24,10 +24,8 @@ * This file is part of the TinyUSB stack. */ -#ifdef BOARD_LPCXPRESSO1769 - +#include "chip.h" #include "../board.h" -#include "tusb.h" #define LED_PORT 0 #define LED_PIN 22 @@ -83,7 +81,8 @@ void board_init(void) SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config(SystemCoreClock / BOARD_TICKS_HZ); + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); #elif CFG_TUSB_OS == OPT_OS_FREERTOS // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); @@ -155,9 +154,9 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif @@ -209,5 +208,3 @@ int board_uart_write(void const * buf, int len) (void) len; return 0; } - -#endif diff --git a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h b/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h deleted file mode 100644 index c6191c0d9..000000000 --- a/hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef _TUSB_BOARD_LPCXPRESSO1769_H_ -#define _TUSB_BOARD_LPCXPRESSO1769_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "chip.h" - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_BOARD_LPCXPRESSO1769_H_ */ diff --git a/hw/bsp/mcb1800/board_mcb1800.c b/hw/bsp/mcb1800/board_mcb1800.c index 9989b334f..b81ecaad2 100644 --- a/hw/bsp/mcb1800/board_mcb1800.c +++ b/hw/bsp/mcb1800/board_mcb1800.c @@ -24,10 +24,8 @@ * This file is part of the TinyUSB stack. */ -#ifdef BOARD_MCB1800 - +#include "chip.h" #include "../board.h" -#include "tusb.h" #define LED_PORT 6 #define LED_PIN 24 @@ -93,7 +91,8 @@ void board_init(void) SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config( SystemCoreClock / BOARD_TICKS_HZ ); + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); #endif Chip_GPIO_Init(LPC_GPIO_PORT); @@ -233,12 +232,9 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif - -#endif - diff --git a/hw/bsp/mcb1800/board_mcb1800.h b/hw/bsp/mcb1800/board_mcb1800.h deleted file mode 100644 index 1b1694837..000000000 --- a/hw/bsp/mcb1800/board_mcb1800.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef BOARD_MCB1800_H_ -#define BOARD_MCB1800_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "chip.h" - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_MCB1800_H_ */ diff --git a/hw/bsp/metro_m0_express/board.mk b/hw/bsp/metro_m0_express/board.mk index 1844eeec8..0776ea567 100644 --- a/hw/bsp/metro_m0_express/board.mk +++ b/hw/bsp/metro_m0_express/board.mk @@ -7,7 +7,7 @@ CFLAGS += \ -mcpu=cortex-m0plus \ -msoft-float \ -mfloat-abi=soft \ - -nostdlib + -nostdlib -nostartfiles # All source paths should be relative to the top level. LD_FILE = hw/bsp/metro_m0_express/samd21g18a_flash.ld diff --git a/hw/bsp/metro_m0_express/board_metro_m0_express.c b/hw/bsp/metro_m0_express/board_metro_m0_express.c index 8bca69a30..11bb16c3c 100644 --- a/hw/bsp/metro_m0_express/board_metro_m0_express.c +++ b/hw/bsp/metro_m0_express/board_metro_m0_express.c @@ -35,8 +35,6 @@ #include "hpl_pm_config.h" #include "hpl/pm/hpl_pm_base.h" -#include "tusb_option.h" - //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ @@ -66,8 +64,8 @@ void board_init(void) gpio_set_pin_level(LED_PIN, 0); #if CFG_TUSB_OS == OPT_OS_NONE - // Tick init, samd SystemCoreClock may not correct - SysTick_Config(CONF_CPU_FREQUENCY/1000); + // 1ms tick timer (samd SystemCoreClock may not correct) + SysTick_Config(CONF_CPU_FREQUENCY / 1000); #endif /* USB Clock init @@ -115,8 +113,10 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } + + #endif diff --git a/hw/bsp/metro_m0_express/board_metro_m0_express.h b/hw/bsp/metro_m0_express/board_metro_m0_express.h deleted file mode 100644 index a681c54b4..000000000 --- a/hw/bsp/metro_m0_express/board_metro_m0_express.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef BOARD_METRO_M0_EXPRESS_H_ -#define BOARD_METRO_M0_EXPRESS_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "sam.h" - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_METRO_M0_EXPRESS_H_ */ diff --git a/hw/bsp/metro_m4_express/board.mk b/hw/bsp/metro_m4_express/board.mk index a560c5149..827613723 100644 --- a/hw/bsp/metro_m4_express/board.mk +++ b/hw/bsp/metro_m4_express/board.mk @@ -6,7 +6,7 @@ CFLAGS += \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ - -nostdlib + -nostdlib -nostartfiles CFLAGS += -Wno-error=undef diff --git a/hw/bsp/metro_m4_express/board_metro_m4_express.c b/hw/bsp/metro_m4_express/board_metro_m4_express.c index b14ce31d6..6a134f807 100644 --- a/hw/bsp/metro_m4_express/board_metro_m4_express.c +++ b/hw/bsp/metro_m4_express/board_metro_m4_express.c @@ -32,8 +32,6 @@ #include "hpl/gclk/hpl_gclk_base.h" #include "hpl_mclk_config.h" -#include "tusb_option.h" - //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ @@ -63,10 +61,9 @@ void board_init(void) gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT); gpio_set_pin_level(LED_PIN, 0); - // Systick init #if CFG_TUSB_OS == OPT_OS_NONE - // Tick init, samd SystemCoreClock may not correct - SysTick_Config(SystemCoreClock / 1000); + // 1ms tick timer (samd SystemCoreClock may not correct) + SysTick_Config(CONF_CPU_FREQUENCY / 1000); #endif /* USB Clock init @@ -105,8 +102,8 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif diff --git a/hw/bsp/metro_m4_express/board_metro_m4_express.h b/hw/bsp/metro_m4_express/board_metro_m4_express.h deleted file mode 100644 index fb6f436fe..000000000 --- a/hw/bsp/metro_m4_express/board_metro_m4_express.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef BOARD_METRO_M4_EXPRESS_H_ -#define BOARD_METRO_M4_EXPRESS_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "sam.h" - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_METRO_M4_EXPRESS_H_ */ diff --git a/hw/bsp/pca10056/board_pca10056.c b/hw/bsp/pca10056/board_pca10056.c index c48c00374..90f466356 100644 --- a/hw/bsp/pca10056/board_pca10056.c +++ b/hw/bsp/pca10056/board_pca10056.c @@ -23,9 +23,10 @@ * * This file is part of the TinyUSB stack. */ -#ifdef BOARD_PCA10056 #include "bsp/board.h" + +#include "nrfx.h" #include "nrfx/hal/nrf_gpio.h" #include "nrfx/drivers/include/nrfx_power.h" #include "nrfx/drivers/include/nrfx_qspi.h" @@ -35,8 +36,6 @@ #include "nrf_soc.h" #endif -#include "tusb.h" - /*------------------------------------------------------------------*/ /* MACRO TYPEDEF CONSTANT ENUM *------------------------------------------------------------------*/ @@ -51,7 +50,7 @@ uint8_t _button_pins[] = { 11, 12, 24, 25 }; /*------------------------------------------------------------------*/ /* TUSB HAL MILLISECOND *------------------------------------------------------------------*/ -#if CFG_TUSB_OS == OPT_OS_NONE +#if CFG_TUSB_OS == OPT_OS_NONE volatile uint32_t system_ticks = 0; void SysTick_Handler (void) @@ -59,25 +58,19 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } + #endif /*------------------------------------------------------------------*/ /* BOARD API *------------------------------------------------------------------*/ -enum { - QSPI_CMD_RSTEN = 0x66, - QSPI_CMD_RST = 0x99, - QSPI_CMD_WRSR = 0x01, - QSPI_CMD_READID = 0x90 -}; -/* tinyusb function that handles power event (detected, ready, removed) - * We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled. - */ +// tinyusb function that handles power event (detected, ready, removed) +// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled. extern void tusb_hal_nrf_power_event(uint32_t event); void board_init(void) @@ -93,84 +86,13 @@ void board_init(void) // Button for(uint8_t i=0; i<BOARD_BUTTON_COUNT; i++) nrf_gpio_cfg_input(_button_pins[i], NRF_GPIO_PIN_PULLUP); -#if CFG_TUSB_OS == OPT_OS_NONE - // Tick init +#if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer SysTick_Config(SystemCoreClock/1000); #endif -// 64 Mbit qspi flash -#if 0 // def BOARD_MSC_FLASH_QSPI - nrfx_qspi_config_t qspi_cfg = { - .xip_offset = 0, - .pins = { - .sck_pin = 19, - .csn_pin = 17, - .io0_pin = 20, - .io1_pin = 21, - .io2_pin = 22, - .io3_pin = 23, - }, - .prot_if = { - .readoc = NRF_QSPI_READOC_READ4IO, - .writeoc = NRF_QSPI_WRITEOC_PP4IO, - .addrmode = NRF_QSPI_ADDRMODE_24BIT, - .dpmconfig = false, // deep power down - }, - .phy_if = { - .sck_freq = NRF_QSPI_FREQ_32MDIV1, - .sck_delay = 1, - .spi_mode = NRF_QSPI_MODE_0, - .dpmen = false - }, - .irq_priority = 7, - }; - - // NULL callback for blocking API - nrfx_qspi_init(&qspi_cfg, NULL, NULL); - - nrf_qspi_cinstr_conf_t cinstr_cfg = { - .opcode = 0, - .length = 0, - .io2_level = true, - .io3_level = true, - .wipwait = false, - .wren = false - }; - - // Send reset enable - cinstr_cfg.opcode = QSPI_CMD_RSTEN; - cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_1B; - nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL); - - // Send reset command - cinstr_cfg.opcode = QSPI_CMD_RST; - cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_1B; - nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL); - - NRFX_DELAY_US(100); // wait for flash reset - - // Send (Read ID + 3 dummy bytes) + Receive 2 bytes of Manufacture + Device ID - uint8_t dummy[6] = { 0 }; - uint8_t id_resp[6] = { 0 }; - cinstr_cfg.opcode = QSPI_CMD_READID; - cinstr_cfg.length = 6; - - // Bug with -nrf_qspi_cinstrdata_get() didn't combine data. - // https://devzone.nordicsemi.com/f/nordic-q-a/38540/bug-nrf_qspi_cinstrdata_get-didn-t-collect-data-from-both-cinstrdat1-and-cinstrdat0 - nrfx_qspi_cinstr_xfer(&cinstr_cfg, dummy, id_resp); - - // Due to the bug, we collect data manually - uint8_t dev_id = (uint8_t) NRF_QSPI->CINSTRDAT1; - uint8_t mfgr_id = (uint8_t) ( NRF_QSPI->CINSTRDAT0 >> 24 ); - - // Switch to quad mode - uint16_t sr_quad_en = 0x40; - cinstr_cfg.opcode = QSPI_CMD_WRSR; - cinstr_cfg.length = 3; - cinstr_cfg.wipwait = cinstr_cfg.wren = true; - nrfx_qspi_cinstr_xfer(&cinstr_cfg, &sr_quad_en, NULL); -#endif - + // Priorities 0, 1, 4 (nRF52) are reserved for SoftDevice + // 2 is highest for application NVIC_SetPriority(USBD_IRQn, 2); // USB power may already be ready at this time -> no event generated @@ -178,23 +100,6 @@ void board_init(void) uint32_t usb_reg; #ifdef SOFTDEVICE_PRESENT - -// Enable to test enable SD before USB scenario -#if 1 - extern void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info); - nrf_clock_lf_cfg_t clock_cfg = - { - // LFXO - .source = NRF_CLOCK_LF_SRC_XTAL, - .rc_ctiv = 0, - .rc_temp_ctiv = 0, - .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM - }; - - sd_softdevice_enable(&clock_cfg, nrf_error_cb); - NVIC_EnableIRQ(SD_EVT_IRQn); -#endif - uint8_t sd_en = false; sd_softdevice_is_enabled(&sd_en); @@ -220,13 +125,8 @@ void board_init(void) usb_reg = NRF_POWER->USBREGSTATUS; } - if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) { - tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED); - } - - if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) { - tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY); - } + if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED); + if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY); } void board_led_control(bool state) @@ -262,7 +162,6 @@ int board_uart_write(void const * buf, int len) } #ifdef SOFTDEVICE_PRESENT - // process SOC event from SD uint32_t proc_soc(void) { @@ -304,5 +203,3 @@ void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info) (void) info; } #endif - -#endif diff --git a/hw/bsp/pca10056/board_pca10056.h b/hw/bsp/pca10056/board_pca10056.h deleted file mode 100644 index 802da74d9..000000000 --- a/hw/bsp/pca10056/board_pca10056.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef BOARD_PCA10056_H_ -#define BOARD_PCA10056_H_ - -#include "nrfx.h" -#include "nrfx_qspi.h" - -#ifdef __cplusplus - extern "C" { -#endif - -// Flash type used for MSC example -#define BOARD_MSC_FLASH_QSPI -#define BOARD_MSC_FLASH_SIZE (8*1024*1024) - -//#define BOARD_MSC_FLASH_RAM -// #define BOARD_MSC_FLASH_SIZE (8*1024) // 8KB is the smallest size that windows allow to mount - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_PCA10056_H_ */ diff --git a/hw/bsp/stm32f303disc/STM32F303VCTx_FLASH.ld b/hw/bsp/stm32f303disc/STM32F303VCTx_FLASH.ld new file mode 100644 index 000000000..ca9046d29 --- /dev/null +++ b/hw/bsp/stm32f303disc/STM32F303VCTx_FLASH.ld @@ -0,0 +1,189 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F303VCTx Device with +** 256KByte FLASH, 40KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +** (c)Copyright Ac6. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Ac6 permit registered System Workbench for MCU users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the System Workbench for MCU toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000a000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x800;; /* required amount of heap */ +_Min_Stack_Size = 0x800;; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K +CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 8K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/hw/bsp/stm32f303disc/board.mk b/hw/bsp/stm32f303disc/board.mk new file mode 100644 index 000000000..c81717c49 --- /dev/null +++ b/hw/bsp/stm32f303disc/board.mk @@ -0,0 +1,43 @@ +CFLAGS += \ + -DHSE_VALUE=8000000 \ + -DCFG_TUSB_MCU=OPT_MCU_STM32F3 \ + -DSTM32F303xC \ + -mthumb \ + -mabi=aapcs-linux \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -nostdlib -nostartfiles + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/stm32f303disc/STM32F303VCTx_FLASH.ld + +LDFLAGS += -mthumb -mcpu=cortex-m4 + +SRC_C += \ + hw/mcu/st/system-init/system_stm32f3xx.c \ + hw/mcu/st/stm32lib/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal.c \ + hw/mcu/st/stm32lib/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cortex.c \ + hw/mcu/st/stm32lib/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_rcc.c \ + hw/mcu/st/stm32lib/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_gpio.c + +SRC_S += \ + hw/mcu/st/startup/stm32f3/startup_stm32f303xc.s + +INC += \ + -I$(TOP)/hw/bsp/stm32f303disc \ + -I$(TOP)/hw/mcu/st/cmsis \ + -I$(TOP)/hw/mcu/st/stm32lib/CMSIS/STM32F3xx/Include \ + -I$(TOP)/hw/mcu/st/stm32lib/STM32F3xx_HAL_Driver/Inc + +VENDOR = st +CHIP_FAMILY = stm32f3 + +JLINK_DEVICE = stm32f303vc + +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI + +# flash target using on-board stlink +flash: $(BUILD)/$(BOARD)-firmware.elf + $(STM32Prog) --connect port=swd --write $< --go diff --git a/hw/bsp/stm32f303disc/board_stm32f303disc.c b/hw/bsp/stm32f303disc/board_stm32f303disc.c new file mode 100644 index 000000000..d2f6244f7 --- /dev/null +++ b/hw/bsp/stm32f303disc/board_stm32f303disc.c @@ -0,0 +1,127 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2018, hathach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "../board.h" + +#include "stm32f3xx.h" +#include "stm32f3xx_hal_conf.h" + +void board_init(void) +{ + RCC_ClkInitTypeDef RCC_ClkInitStruct; + RCC_OscInitTypeDef RCC_OscInitStruct; + + /* Enable HSE Oscillator and activate PLL with HSE as source */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; + HAL_RCC_OscConfig(&RCC_OscInitStruct); + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 + clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + (void) HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2); + + // Notify runtime of frequency change. + SystemCoreClockUpdate(); + + #if CFG_TUSB_OS == OPT_OS_NONE + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); + #endif + + /* -1- Enable GPIOE Clock (to be able to program the configuration registers) */ + __HAL_RCC_GPIOE_CLK_ENABLE(); + + /* -2- Configure PE.8 to PE.15 IOs in output push-pull mode to drive external LEDs */ + static GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + +#if 0 + RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN; + + // USB Pin Init + // PA9- VUSB, PA10- ID, PA11- DM, PA12- DP + // PC0- Power on + RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN; + GPIOA->MODER |= GPIO_MODER_MODE9_1 | GPIO_MODER_MODE10_1 | \ + GPIO_MODER_MODE11_1 | GPIO_MODER_MODE12_1; + GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL9_Pos) | \ + (10 << GPIO_AFRH_AFSEL10_Pos) | (10 << GPIO_AFRH_AFSEL11_Pos) | \ + (10 << GPIO_AFRH_AFSEL12_Pos); + + // Pullup required on ID, despite the manual claiming there's an + // internal pullup already (page 1245, Rev 17) + GPIOA->PUPDR |= GPIO_PUPDR_PUPD10_0; +#endif +} + + +void board_led_control(bool state) +{ + HAL_GPIO_WritePin(GPIOE, GPIO_PIN_9, state); +} + +/*------------------------------------------------------------------*/ +/* TUSB HAL MILLISECOND + *------------------------------------------------------------------*/ +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; + +void SysTick_Handler (void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +void HardFault_Handler (void) +{ + asm("bkpt"); +} + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} diff --git a/hw/bsp/stm32f303disc/stm32f3xx_hal_conf.h b/hw/bsp/stm32f303disc/stm32f3xx_hal_conf.h new file mode 100644 index 000000000..38e7a4327 --- /dev/null +++ b/hw/bsp/stm32f303disc/stm32f3xx_hal_conf.h @@ -0,0 +1,312 @@ +/** + ****************************************************************************** + * @file GPIO/GPIO_IOToggle/Inc/stm32f3xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F3xx_HAL_CONF_H +#define __STM32F3xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED +//#define HAL_ADC_MODULE_ENABLED +//#define HAL_CAN_MODULE_ENABLED +//#define HAL_CAN_LEGACY_MODULE_ENABLED +//#define HAL_CEC_MODULE_ENABLED +//#define HAL_COMP_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_CRC_MODULE_ENABLED +//#define HAL_DAC_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +//#define HAL_HRTIM_MODULE_ENABLED +//#define HAL_I2C_MODULE_ENABLED +//#define HAL_I2S_MODULE_ENABLED +//#define HAL_IRDA_MODULE_ENABLED +//#define HAL_IWDG_MODULE_ENABLED +//#define HAL_OPAMP_MODULE_ENABLED +//#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +//#define HAL_RTC_MODULE_ENABLED +//#define HAL_SDADC_MODULE_ENABLED +//#define HAL_SMARTCARD_MODULE_ENABLED +//#define HAL_SPI_MODULE_ENABLED +//#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +#define HAL_USART_MODULE_ENABLED +//#define HAL_WWDG_MODULE_ENABLED +//#define HAL_PPP_MODULE_ENABLED + +/* ########################## HSE/HSI Values adaptation ##################### */ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +/** + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + * Timeout value + */ +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT (100U) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE (8000000U) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup + * Timeout value + */ +#if !defined (HSI_STARTUP_TIMEOUT) + #define HSI_STARTUP_TIMEOUT (5000U) /*!< Time out for HSI start up */ +#endif /* HSI_STARTUP_TIMEOUT */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE (40000U) +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ +/** + * @brief External Low Speed oscillator (LSE) value. + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768U) /*!< Value of the External Low Speed oscillator in Hz */ +#endif /* LSE_VALUE */ + +/** + * @brief Time out for LSE start up value in ms. + */ +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT (5000U) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + * - External clock generated through external PLL component on EVAL 303 (based on MCO or crystal) + * - External clock not generated on EVAL 373 + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE (8000000U) /*!< Value of the External oscillator in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE (3300U) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)(1U<<__NVIC_PRIO_BITS) - 1U) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0U +#define PREFETCH_ENABLE 1U +#define INSTRUCTION_CACHE_ENABLE 0U +#define DATA_CACHE_ENABLE 0U +#define USE_SPI_CRC 1U + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/*#define USE_FULL_ASSERT 1*/ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f3xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f3xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f3xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f3xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f3xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f3xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CAN_LEGACY_MODULE_ENABLED + #include "stm32f3xx_hal_can_legacy.h" +#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f3xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32f3xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f3xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f3xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f3xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_HRTIM_MODULE_ENABLED + #include "stm32f3xx_hal_hrtim.h" +#endif /* HAL_HRTIM_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f3xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f3xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f3xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f3xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED + #include "stm32f3xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f3xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f3xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SDADC_MODULE_ENABLED + #include "stm32f3xx_hal_sdadc.h" +#endif /* HAL_SDADC_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f3xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f3xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f3xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_TSC_MODULE_ENABLED + #include "stm32f3xx_hal_tsc.h" +#endif /* HAL_TSC_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f3xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f3xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f3xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(char* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F3xx_HAL_CONF_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk index 73d64a6bd..e966f998c 100644 --- a/hw/bsp/stm32f407g_disc1/board.mk +++ b/hw/bsp/stm32f407g_disc1/board.mk @@ -7,7 +7,7 @@ CFLAGS += \ -mcpu=cortex-m4 \ -mfloat-abi=hard \ -mfpu=fpv4-sp-d16 \ - -nostdlib + -nostdlib -nostartfiles # All source paths should be relative to the top level. LD_FILE = hw/bsp/stm32f407g_disc1/STM32F407VGTx_FLASH.ld @@ -29,20 +29,8 @@ CHIP_FAMILY = stm32f4 JLINK_DEVICE = stm32f407vg -# Path to STM32 Cube Programmer CLI -ifeq ($(OS),Windows_NT) - STM32Prog = C:/Program Files/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI -else - UNAME_S := $(shell uname -s) - - ifeq ($(UNAME_S),Linux) - STM32Prog = $(HOME)/STMicroelectronics/STM32Cube/STM32CubeProgrammer/bin/STM32_Programmer_CLI - endif - - ifeq ($(UNAME_S),Darwin) - STM32Prog = STM32_Programmer_CLI - endif -endif +# Path to STM32 Cube Programmer CLI, should be added into system path +STM32Prog = STM32_Programmer_CLI # flash target using on-board stlink flash: $(BUILD)/$(BOARD)-firmware.elf diff --git a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c index 386356080..d7b4a4bd3 100644 --- a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c +++ b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c @@ -24,15 +24,10 @@ * This file is part of the TinyUSB stack. */ -#include "bsp/board.h" +#include "../board.h" #include "stm32f4xx.h" -#include "tusb_option.h" - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ void board_init(void) { // Init the LED on PD14 @@ -63,9 +58,10 @@ void board_init(void) // Notify runtime of frequency change. SystemCoreClockUpdate(); - // Systick init + #if CFG_TUSB_OS == OPT_OS_NONE - SysTick_Config(SystemCoreClock / 1000); + // 1ms tick timer + SysTick_Config(SystemCoreClock / 1000); #endif RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN; @@ -107,9 +103,9 @@ void SysTick_Handler (void) system_ticks++; } -uint32_t tusb_hal_millis(void) +uint32_t board_millis(void) { - return board_tick2ms(system_ticks); + return system_ticks; } #endif diff --git a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h deleted file mode 100644 index 833e26489..000000000 --- a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2018, hathach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef BOARD_STM32F407G_DISC1_H_ -#define BOARD_STM32F407G_DISC1_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#define BOARD_LED_NUM 1 -#define BOARD_LED0 62 - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_STM32F407G_DISC1_H_ */ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f301x8.s b/hw/mcu/st/startup/stm32f3/startup_stm32f301x8.s new file mode 100644 index 000000000..a8d036390 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f301x8.s @@ -0,0 +1,403 @@ +/** + ****************************************************************************** + * @file startup_stm32f301x8.s + * @author MCD Application Team + * @brief STM32F301x6/STM32F301x8 devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word 0 + .word 0 + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word 0 + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SPI3_IRQHandler + .word 0 + .word 0 + .word TIM6_DAC_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word COMP2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak COMP2_IRQHandler + .thumb_set COMP2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f302x8.s b/hw/mcu/st/startup/stm32f3/startup_stm32f302x8.s new file mode 100644 index 000000000..590f380a1 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f302x8.s @@ -0,0 +1,427 @@ +/** + ****************************************************************************** + * @file startup_stm32f302x8.s + * @author MCD Application Team + * @brief STM32F302x6/STM32F302x8 devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_IRQHandler + .word USB_HP_CAN_TX_IRQHandler + .word USB_LP_CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word 0 + .word 0 + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word 0 + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word USBWakeUp_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SPI3_IRQHandler + .word 0 + .word 0 + .word TIM6_DAC_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word COMP2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word USB_HP_IRQHandler + .word USB_LP_IRQHandler + .word USBWakeUp_RMP_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak USB_HP_CAN_TX_IRQHandler + .thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler + + .weak USB_LP_CAN_RX0_IRQHandler + .thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak COMP2_IRQHandler + .thumb_set COMP2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak USB_HP_IRQHandler + .thumb_set USB_HP_IRQHandler,Default_Handler + + .weak USB_LP_IRQHandler + .thumb_set USB_LP_IRQHandler,Default_Handler + + .weak USBWakeUp_RMP_IRQHandler + .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f302xc.s b/hw/mcu/st/startup/stm32f3/startup_stm32f302xc.s new file mode 100644 index 000000000..4c32f1f8c --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f302xc.s @@ -0,0 +1,451 @@ +/** + ****************************************************************************** + * @file startup_stm32f302xc.s + * @author MCD Application Team + * @brief STM32F302xB/STM32F302xC devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word USB_HP_CAN_TX_IRQHandler + .word USB_LP_CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word USBWakeUp_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word 0 + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word 0 + .word 0 + .word 0 + .word COMP1_2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word USB_HP_IRQHandler + .word USB_LP_IRQHandler + .word USBWakeUp_RMP_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USB_HP_CAN_TX_IRQHandler + .thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler + + .weak USB_LP_CAN_RX0_IRQHandler + .thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak COMP1_2_IRQHandler + .thumb_set COMP1_2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak USB_HP_IRQHandler + .thumb_set USB_HP_IRQHandler,Default_Handler + + .weak USB_LP_IRQHandler + .thumb_set USB_LP_IRQHandler,Default_Handler + + .weak USBWakeUp_RMP_IRQHandler + .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f302xe.s b/hw/mcu/st/startup/stm32f3/startup_stm32f302xe.s new file mode 100644 index 000000000..4723b72a0 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f302xe.s @@ -0,0 +1,478 @@ +/** + ****************************************************************************** + * @file startup_stm32f302xe.s + * @author MCD Application Team + * @brief STM32F302xE devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word USB_HP_CAN_TX_IRQHandler + .word USB_LP_CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word USBWakeUp_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word FMC_IRQHandler + .word 0 + .word 0 + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word 0 + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word 0 + .word 0 + .word 0 + .word COMP1_2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word USB_HP_IRQHandler + .word USB_LP_IRQHandler + .word USBWakeUp_RMP_IRQHandler + .word TIM20_BRK_IRQHandler + .word TIM20_UP_IRQHandler + .word TIM20_TRG_COM_IRQHandler + .word TIM20_CC_IRQHandler + .word FPU_IRQHandler + .word 0 + .word 0 + .word SPI4_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USB_HP_CAN_TX_IRQHandler + .thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler + + .weak USB_LP_CAN_RX0_IRQHandler + .thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak COMP1_2_IRQHandler + .thumb_set COMP1_2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak USB_HP_IRQHandler + .thumb_set USB_HP_IRQHandler,Default_Handler + + .weak USB_LP_IRQHandler + .thumb_set USB_LP_IRQHandler,Default_Handler + + .weak USBWakeUp_RMP_IRQHandler + .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler + + .weak TIM20_BRK_IRQHandler + .thumb_set TIM20_BRK_IRQHandler,Default_Handler + + .weak TIM20_UP_IRQHandler + .thumb_set TIM20_UP_IRQHandler,Default_Handler + + .weak TIM20_TRG_COM_IRQHandler + .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler + + .weak TIM20_CC_IRQHandler + .thumb_set TIM20_CC_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f303x8.s b/hw/mcu/st/startup/stm32f3/startup_stm32f303x8.s new file mode 100644 index 000000000..097ce56a1 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f303x8.s @@ -0,0 +1,406 @@ +/** + ****************************************************************************** + * @file startup_stm32f303x8.s + * @author MCD Application Team + * @brief STM32F303x6/STM32F303x8 devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word CAN_TX_IRQHandler + .word CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word 0 + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word 0 + .word 0 + .word SPI1_IRQHandler + .word 0 + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word TIM6_DAC1_IRQHandler + .word TIM7_DAC2_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word COMP2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak CAN_TX_IRQHandler + .thumb_set CAN_TX_IRQHandler,Default_Handler + + .weak CAN_RX0_IRQHandler + .thumb_set CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM6_DAC1_IRQHandler + .thumb_set TIM6_DAC1_IRQHandler,Default_Handler + + .weak TIM7_DAC2_IRQHandler + .thumb_set TIM7_DAC2_IRQHandler,Default_Handler + + .weak COMP2_IRQHandler + .thumb_set COMP2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f303xc.s b/hw/mcu/st/startup/stm32f3/startup_stm32f303xc.s new file mode 100644 index 000000000..9e6c3b705 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f303xc.s @@ -0,0 +1,475 @@ +/** + ****************************************************************************** + * @file startup_stm32f303xc.s + * @author MCD Application Team + * @brief STM32F303xB/STM32F303xC devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word USB_HP_CAN_TX_IRQHandler + .word USB_LP_CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word USBWakeUp_IRQHandler + .word TIM8_BRK_IRQHandler + .word TIM8_UP_IRQHandler + .word TIM8_TRG_COM_IRQHandler + .word TIM8_CC_IRQHandler + .word ADC3_IRQHandler + .word 0 + .word 0 + .word 0 + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word ADC4_IRQHandler + .word 0 + .word 0 + .word COMP1_2_3_IRQHandler + .word COMP4_5_6_IRQHandler + .word COMP7_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word USB_HP_IRQHandler + .word USB_LP_IRQHandler + .word USBWakeUp_RMP_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USB_HP_CAN_TX_IRQHandler + .thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler + + .weak USB_LP_CAN_RX0_IRQHandler + .thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak ADC4_IRQHandler + .thumb_set ADC4_IRQHandler,Default_Handler + + .weak COMP1_2_3_IRQHandler + .thumb_set COMP1_2_3_IRQHandler,Default_Handler + + .weak COMP4_5_6_IRQHandler + .thumb_set COMP4_5_6_IRQHandler,Default_Handler + + .weak COMP7_IRQHandler + .thumb_set COMP7_IRQHandler,Default_Handler + + .weak USB_HP_IRQHandler + .thumb_set USB_HP_IRQHandler,Default_Handler + + .weak USB_LP_IRQHandler + .thumb_set USB_LP_IRQHandler,Default_Handler + + .weak USBWakeUp_RMP_IRQHandler + .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f303xe.s b/hw/mcu/st/startup/stm32f3/startup_stm32f303xe.s new file mode 100644 index 000000000..b151e2f76 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f303xe.s @@ -0,0 +1,502 @@ +/** + ****************************************************************************** + * @file startup_stm32f303xe.s + * @author MCD Application Team + * @brief STM32F303xE devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word USB_HP_CAN_TX_IRQHandler + .word USB_LP_CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word USBWakeUp_IRQHandler + .word TIM8_BRK_IRQHandler + .word TIM8_UP_IRQHandler + .word TIM8_TRG_COM_IRQHandler + .word TIM8_CC_IRQHandler + .word ADC3_IRQHandler + .word FMC_IRQHandler + .word 0 + .word 0 + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word ADC4_IRQHandler + .word 0 + .word 0 + .word COMP1_2_3_IRQHandler + .word COMP4_5_6_IRQHandler + .word COMP7_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word USB_HP_IRQHandler + .word USB_LP_IRQHandler + .word USBWakeUp_RMP_IRQHandler + .word TIM20_BRK_IRQHandler + .word TIM20_UP_IRQHandler + .word TIM20_TRG_COM_IRQHandler + .word TIM20_CC_IRQHandler + .word FPU_IRQHandler + .word 0 + .word 0 + .word SPI4_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USB_HP_CAN_TX_IRQHandler + .thumb_set USB_HP_CAN_TX_IRQHandler,Default_Handler + + .weak USB_LP_CAN_RX0_IRQHandler + .thumb_set USB_LP_CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak ADC4_IRQHandler + .thumb_set ADC4_IRQHandler,Default_Handler + + .weak COMP1_2_3_IRQHandler + .thumb_set COMP1_2_3_IRQHandler,Default_Handler + + .weak COMP4_5_6_IRQHandler + .thumb_set COMP4_5_6_IRQHandler,Default_Handler + + .weak COMP7_IRQHandler + .thumb_set COMP7_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak USB_HP_IRQHandler + .thumb_set USB_HP_IRQHandler,Default_Handler + + .weak USB_LP_IRQHandler + .thumb_set USB_LP_IRQHandler,Default_Handler + + .weak USBWakeUp_RMP_IRQHandler + .thumb_set USBWakeUp_RMP_IRQHandler,Default_Handler + + .weak TIM20_BRK_IRQHandler + .thumb_set TIM20_BRK_IRQHandler,Default_Handler + + .weak TIM20_UP_IRQHandler + .thumb_set TIM20_UP_IRQHandler,Default_Handler + + .weak TIM20_TRG_COM_IRQHandler + .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler + + .weak TIM20_CC_IRQHandler + .thumb_set TIM20_CC_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f318xx.s b/hw/mcu/st/startup/stm32f3/startup_stm32f318xx.s new file mode 100644 index 000000000..c78c31280 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f318xx.s @@ -0,0 +1,400 @@ +/** + ****************************************************************************** + * @file startup_stm32f318xx.s + * @author MCD Application Team + * @brief STM32F318xx device vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word 0 + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word 0 + .word 0 + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word 0 + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SPI3_IRQHandler + .word 0 + .word 0 + .word TIM6_DAC_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word COMP2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak COMP2_IRQHandler + .thumb_set COMP2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f328xx.s b/hw/mcu/st/startup/stm32f3/startup_stm32f328xx.s new file mode 100644 index 000000000..7ffda9cad --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f328xx.s @@ -0,0 +1,403 @@ +/** + ****************************************************************************** + * @file startup_stm32f328xx.s + * @author MCD Application Team + * @brief STM32F328xx device vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word 0 + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word CAN_TX_IRQHandler + .word CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word 0 + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word 0 + .word 0 + .word SPI1_IRQHandler + .word 0 + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word TIM6_DAC1_IRQHandler + .word TIM7_DAC2_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word COMP2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak CAN_TX_IRQHandler + .thumb_set CAN_TX_IRQHandler,Default_Handler + + .weak CAN_RX0_IRQHandler + .thumb_set CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM6_DAC1_IRQHandler + .thumb_set TIM6_DAC1_IRQHandler,Default_Handler + + .weak TIM7_DAC2_IRQHandler + .thumb_set TIM7_DAC2_IRQHandler,Default_Handler + + .weak COMP2_IRQHandler + .thumb_set COMP2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f334x8.s b/hw/mcu/st/startup/stm32f3/startup_stm32f334x8.s new file mode 100644 index 000000000..1203f43d6 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f334x8.s @@ -0,0 +1,427 @@ +/** + ****************************************************************************** + * @file startup_stm32f334x8.s + * @author MCD Application Team + * @brief STM32F334x4/STM32F334x6/STM32F334x8 devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word CAN_TX_IRQHandler + .word CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word 0 + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word 0 + .word 0 + .word SPI1_IRQHandler + .word 0 + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word TIM6_DAC1_IRQHandler + .word TIM7_DAC2_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word COMP2_IRQHandler + .word COMP4_6_IRQHandler + .word 0 + .word HRTIM1_Master_IRQHandler + .word HRTIM1_TIMA_IRQHandler + .word HRTIM1_TIMB_IRQHandler + .word HRTIM1_TIMC_IRQHandler + .word HRTIM1_TIMD_IRQHandler + .word HRTIM1_TIME_IRQHandler + .word HRTIM1_FLT_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak CAN_TX_IRQHandler + .thumb_set CAN_TX_IRQHandler,Default_Handler + + .weak CAN_RX0_IRQHandler + .thumb_set CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM6_DAC1_IRQHandler + .thumb_set TIM6_DAC1_IRQHandler,Default_Handler + + .weak TIM7_DAC2_IRQHandler + .thumb_set TIM7_DAC2_IRQHandler,Default_Handler + + .weak COMP2_IRQHandler + .thumb_set COMP2_IRQHandler,Default_Handler + + .weak COMP4_6_IRQHandler + .thumb_set COMP4_6_IRQHandler,Default_Handler + + .weak HRTIM1_Master_IRQHandler + .thumb_set HRTIM1_Master_IRQHandler,Default_Handler + + .weak HRTIM1_TIMA_IRQHandler + .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler + + .weak HRTIM1_TIMB_IRQHandler + .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler + + .weak HRTIM1_TIMC_IRQHandler + .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler + + .weak HRTIM1_TIMD_IRQHandler + .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler + + .weak HRTIM1_TIME_IRQHandler + .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler + + .weak HRTIM1_FLT_IRQHandler + .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f358xx.s b/hw/mcu/st/startup/stm32f3/startup_stm32f358xx.s new file mode 100644 index 000000000..ea5d9b8cb --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f358xx.s @@ -0,0 +1,460 @@ +/** + ****************************************************************************** + * @file startup_stm32f358xx.s + * @author MCD Application Team + * @brief STM32F358xx device vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word 0 + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word CAN_TX_IRQHandler + .word CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word 0 + .word TIM8_BRK_IRQHandler + .word TIM8_UP_IRQHandler + .word TIM8_TRG_COM_IRQHandler + .word TIM8_CC_IRQHandler + .word ADC3_IRQHandler + .word 0 + .word 0 + .word 0 + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word ADC4_IRQHandler + .word 0 + .word 0 + .word COMP1_2_3_IRQHandler + .word COMP4_5_6_IRQHandler + .word COMP7_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak CAN_TX_IRQHandler + .thumb_set CAN_TX_IRQHandler,Default_Handler + + .weak CAN_RX0_IRQHandler + .thumb_set CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak ADC4_IRQHandler + .thumb_set ADC4_IRQHandler,Default_Handler + + .weak COMP1_2_3_IRQHandler + .thumb_set COMP1_2_3_IRQHandler,Default_Handler + + .weak COMP4_5_6_IRQHandler + .thumb_set COMP4_5_6_IRQHandler,Default_Handler + + .weak COMP7_IRQHandler + .thumb_set COMP7_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f373xc.s b/hw/mcu/st/startup/stm32f3/startup_stm32f373xc.s new file mode 100644 index 000000000..4994c56ae --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f373xc.s @@ -0,0 +1,469 @@ +/** + ****************************************************************************** + * @file startup_stm32f373xc.s + * @author MCD Application Team + * @brief STM32F373xB/STM32F373xC devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_IRQHandler + .word CAN_TX_IRQHandler + .word CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM15_IRQHandler + .word TIM16_IRQHandler + .word TIM17_IRQHandler + .word TIM18_DAC2_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word CEC_IRQHandler + .word TIM12_IRQHandler + .word TIM13_IRQHandler + .word TIM14_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word TIM5_IRQHandler + .word SPI3_IRQHandler + .word 0 + .word 0 + .word TIM6_DAC1_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word SDADC1_IRQHandler + .word SDADC2_IRQHandler + .word SDADC3_IRQHandler + .word COMP1_2_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word USB_HP_IRQHandler + .word USB_LP_IRQHandler + .word USBWakeUp_IRQHandler + .word 0 + .word TIM19_IRQHandler + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak CAN_TX_IRQHandler + .thumb_set CAN_TX_IRQHandler,Default_Handler + + .weak CAN_RX0_IRQHandler + .thumb_set CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak TIM18_DAC2_IRQHandler + .thumb_set TIM18_DAC2_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + + .weak TIM12_IRQHandler + .thumb_set TIM12_IRQHandler,Default_Handler + + .weak TIM13_IRQHandler + .thumb_set TIM13_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak TIM6_DAC1_IRQHandler + .thumb_set TIM6_DAC1_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak SDADC1_IRQHandler + .thumb_set SDADC1_IRQHandler,Default_Handler + + .weak SDADC2_IRQHandler + .thumb_set SDADC2_IRQHandler,Default_Handler + + .weak SDADC3_IRQHandler + .thumb_set SDADC3_IRQHandler,Default_Handler + + .weak COMP1_2_IRQHandler + .thumb_set COMP1_2_IRQHandler,Default_Handler + + .weak USB_HP_IRQHandler + .thumb_set USB_HP_IRQHandler,Default_Handler + + .weak USB_LP_IRQHandler + .thumb_set USB_LP_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + + .weak TIM19_IRQHandler + .thumb_set TIM19_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f378xx.s b/hw/mcu/st/startup/stm32f3/startup_stm32f378xx.s new file mode 100644 index 000000000..7f683a369 --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f378xx.s @@ -0,0 +1,457 @@ +/** + ****************************************************************************** + * @file startup_stm32f378xx.s + * @author MCD Application Team + * @brief STM32F378xx device vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word 0 + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_IRQHandler + .word CAN_TX_IRQHandler + .word CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM15_IRQHandler + .word TIM16_IRQHandler + .word TIM17_IRQHandler + .word TIM18_DAC2_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word CEC_IRQHandler + .word TIM12_IRQHandler + .word TIM13_IRQHandler + .word TIM14_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word TIM5_IRQHandler + .word SPI3_IRQHandler + .word 0 + .word 0 + .word TIM6_DAC1_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word SDADC1_IRQHandler + .word SDADC2_IRQHandler + .word SDADC3_IRQHandler + .word COMP1_2_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word TIM19_IRQHandler + .word 0 + .word 0 + .word FPU_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler + + .weak CAN_TX_IRQHandler + .thumb_set CAN_TX_IRQHandler,Default_Handler + + .weak CAN_RX0_IRQHandler + .thumb_set CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak TIM18_DAC2_IRQHandler + .thumb_set TIM18_DAC2_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + + .weak TIM12_IRQHandler + .thumb_set TIM12_IRQHandler,Default_Handler + + .weak TIM13_IRQHandler + .thumb_set TIM13_IRQHandler,Default_Handler + + .weak TIM14_IRQHandler + .thumb_set TIM14_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak TIM6_DAC1_IRQHandler + .thumb_set TIM6_DAC1_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak SDADC1_IRQHandler + .thumb_set SDADC1_IRQHandler,Default_Handler + + .weak SDADC2_IRQHandler + .thumb_set SDADC2_IRQHandler,Default_Handler + + .weak SDADC3_IRQHandler + .thumb_set SDADC3_IRQHandler,Default_Handler + + .weak COMP1_2_IRQHandler + .thumb_set COMP1_2_IRQHandler,Default_Handler + + .weak TIM19_IRQHandler + .thumb_set TIM19_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/startup/stm32f3/startup_stm32f398xx.s b/hw/mcu/st/startup/stm32f3/startup_stm32f398xx.s new file mode 100644 index 000000000..2d076acdb --- /dev/null +++ b/hw/mcu/st/startup/stm32f3/startup_stm32f398xx.s @@ -0,0 +1,487 @@ +/** + ****************************************************************************** + * @file startup_stm32f398xx.s + * @author MCD Application Team + * @brief STM32F398xx devices vector table for GCC toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address, + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF1E0F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + +LoopForever: + b LoopForever + +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex-M4. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word 0 + .word TAMP_STAMP_IRQHandler + .word RTC_WKUP_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_TSC_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word CAN_TX_IRQHandler + .word CAN_RX0_IRQHandler + .word CAN_RX1_IRQHandler + .word CAN_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_TIM15_IRQHandler + .word TIM1_UP_TIM16_IRQHandler + .word TIM1_TRG_COM_TIM17_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word 0 + .word TIM8_BRK_IRQHandler + .word TIM8_UP_IRQHandler + .word TIM8_TRG_COM_IRQHandler + .word TIM8_CC_IRQHandler + .word ADC3_IRQHandler + .word FMC_IRQHandler + .word 0 + .word 0 + .word SPI3_IRQHandler + .word UART4_IRQHandler + .word UART5_IRQHandler + .word TIM6_DAC_IRQHandler + .word TIM7_IRQHandler + .word DMA2_Channel1_IRQHandler + .word DMA2_Channel2_IRQHandler + .word DMA2_Channel3_IRQHandler + .word DMA2_Channel4_IRQHandler + .word DMA2_Channel5_IRQHandler + .word ADC4_IRQHandler + .word 0 + .word 0 + .word COMP1_2_3_IRQHandler + .word COMP4_5_6_IRQHandler + .word COMP7_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word I2C3_EV_IRQHandler + .word I2C3_ER_IRQHandler + .word 0 + .word 0 + .word 0 + .word TIM20_BRK_IRQHandler + .word TIM20_UP_IRQHandler + .word TIM20_TRG_COM_IRQHandler + .word TIM20_CC_IRQHandler + .word FPU_IRQHandler + .word 0 + .word 0 + .word SPI4_IRQHandler + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_TSC_IRQHandler + .thumb_set EXTI2_TSC_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak CAN_TX_IRQHandler + .thumb_set CAN_TX_IRQHandler,Default_Handler + + .weak CAN_RX0_IRQHandler + .thumb_set CAN_RX0_IRQHandler,Default_Handler + + .weak CAN_RX1_IRQHandler + .thumb_set CAN_RX1_IRQHandler,Default_Handler + + .weak CAN_SCE_IRQHandler + .thumb_set CAN_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM15_IRQHandler + .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM16_IRQHandler + .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM17_IRQHandler + .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM8_BRK_IRQHandler + .thumb_set TIM8_BRK_IRQHandler,Default_Handler + + .weak TIM8_UP_IRQHandler + .thumb_set TIM8_UP_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_IRQHandler + .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Channel1_IRQHandler + .thumb_set DMA2_Channel1_IRQHandler,Default_Handler + + .weak DMA2_Channel2_IRQHandler + .thumb_set DMA2_Channel2_IRQHandler,Default_Handler + + .weak DMA2_Channel3_IRQHandler + .thumb_set DMA2_Channel3_IRQHandler,Default_Handler + + .weak DMA2_Channel4_IRQHandler + .thumb_set DMA2_Channel4_IRQHandler,Default_Handler + + .weak DMA2_Channel5_IRQHandler + .thumb_set DMA2_Channel5_IRQHandler,Default_Handler + + .weak ADC4_IRQHandler + .thumb_set ADC4_IRQHandler,Default_Handler + + .weak COMP1_2_3_IRQHandler + .thumb_set COMP1_2_3_IRQHandler,Default_Handler + + .weak COMP4_5_6_IRQHandler + .thumb_set COMP4_5_6_IRQHandler,Default_Handler + + .weak COMP7_IRQHandler + .thumb_set COMP7_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak TIM20_BRK_IRQHandler + .thumb_set TIM20_BRK_IRQHandler,Default_Handler + + .weak TIM20_UP_IRQHandler + .thumb_set TIM20_UP_IRQHandler,Default_Handler + + .weak TIM20_TRG_COM_IRQHandler + .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler + + .weak TIM20_CC_IRQHandler + .thumb_set TIM20_CC_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/hw/mcu/st/system-init/system_stm32f3xx.c b/hw/mcu/st/system-init/system_stm32f3xx.c new file mode 100644 index 000000000..c6596e1f7 --- /dev/null +++ b/hw/mcu/st/system-init/system_stm32f3xx.c @@ -0,0 +1,314 @@ +/** + ****************************************************************************** + * @file system_stm32f3xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f3xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f3xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. This file configures the system clock as follows: + *============================================================================= + * Supported STM32F3xx device + *----------------------------------------------------------------------------- + * System Clock source | HSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 8000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 8000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * USB Clock | DISABLE + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f3xx_system + * @{ + */ + +/** @addtogroup STM32F3xx_System_Private_Includes + * @{ + */ + +#include "stm32f3xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F3xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F3xx_System_Private_Defines + * @{ + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSI_VALUE */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32F3xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F3xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock there is no need to + call the 2 first functions listed above, since SystemCoreClock variable is + updated automatically. + */ +uint32_t SystemCoreClock = 8000000; + +const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; + +/** + * @} + */ + +/** @addtogroup STM32F3xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F3xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the FPU setting, vector table location and the PLL configuration is reset. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= 0x00000001U; + + /* Reset CFGR register */ + RCC->CFGR &= 0xF87FC00CU; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= 0xFEF6FFFFU; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */ + RCC->CFGR &= 0xFF80FFFFU; + + /* Reset PREDIV1[3:0] bits */ + RCC->CFGR2 &= 0xFFFFFFF0U; + + /* Reset USARTSW[1:0], I2CSW and TIMs bits */ + RCC->CFGR3 &= 0xFF00FCCCU; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000U; + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f3xx_hal.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f3xx_hal.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + +#if defined (STM32F302xE) || defined (STM32F303xE) || defined (STM32F398xx) + predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull; + } + else + { + /* HSI oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSI_VALUE / predivfactor) * pllmull; + } +#else + if (pllsource == RCC_CFGR_PLLSRC_HSI_DIV2) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / predivfactor) * pllmull; + } +#endif /* STM32F302xE || STM32F303xE || STM32F398xx */ + break; + default: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index 48e94a6e1..2ac8d471c 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -28,8 +28,6 @@ #if (TUSB_OPT_DEVICE_ENABLED && CFG_TUD_CDC)
-#define _TINY_USB_SOURCE_FILE_
-
#include "cdc_device.h"
#include "device/usbd_pvt.h"
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h index 3375fc98d..468edef45 100644 --- a/src/class/cdc/cdc_device.h +++ b/src/class/cdc/cdc_device.h @@ -96,10 +96,9 @@ ATTR_WEAK void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts); ATTR_WEAK void tud_cdc_line_coding_cb(uint8_t itf, cdc_line_coding_t const* p_line_coding);
//--------------------------------------------------------------------+
-// USBD-CLASS DRIVER API
-//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
+// INTERNAL USBD-CLASS DRIVER API
+//--------------------------------------------------------------------+
void cdcd_init (void);
bool cdcd_open (uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length);
bool cdcd_control_request (uint8_t rhport, tusb_control_request_t const * p_request);
@@ -107,8 +106,6 @@ bool cdcd_control_request_complete (uint8_t rhport, tusb_control_request_t const bool cdcd_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
void cdcd_reset (uint8_t rhport);
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c index 4932a61ac..75c805152 100644 --- a/src/class/cdc/cdc_host.c +++ b/src/class/cdc/cdc_host.c @@ -28,8 +28,6 @@ #if (TUSB_OPT_HOST_ENABLED && CFG_TUH_CDC)
-#define _TINY_USB_SOURCE_FILE_
-
#include "common/tusb_common.h"
#include "cdc_host.h"
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h index 716203b96..7a302eb0f 100644 --- a/src/class/cdc/cdc_host.h +++ b/src/class/cdc/cdc_host.h @@ -109,17 +109,13 @@ void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_i /// @}
//--------------------------------------------------------------------+
-// USBH-CLASS API
+// Internal Class Driver API
//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
-
void cdch_init(void);
bool cdch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length);
void cdch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
void cdch_close(uint8_t dev_addr);
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/src/class/cdc/cdc_rndis_host.c b/src/class/cdc/cdc_rndis_host.c index d377ddca3..587e9ddc8 100644 --- a/src/class/cdc/cdc_rndis_host.c +++ b/src/class/cdc/cdc_rndis_host.c @@ -28,8 +28,6 @@ #if (TUSB_OPT_HOST_ENABLED && CFG_TUH_CDC && CFG_TUH_CDC_RNDIS) -#define _TINY_USB_SOURCE_FILE_ - //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ diff --git a/src/class/cdc/cdc_rndis_host.h b/src/class/cdc/cdc_rndis_host.h index 377ae64ba..24becee07 100644 --- a/src/class/cdc/cdc_rndis_host.h +++ b/src/class/cdc/cdc_rndis_host.h @@ -40,10 +40,8 @@ #endif //--------------------------------------------------------------------+ -// RNDIS-CDC Driver API +// INTERNAL RNDIS-CDC Driver API //--------------------------------------------------------------------+ -#ifdef _TINY_USB_SOURCE_FILE_ - typedef struct { OSAL_SEM_DEF(semaphore_notification); osal_semaphore_handle_t sem_notification_hdl; // used to wait on notification pipe @@ -56,8 +54,6 @@ tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc); void rndish_xfer_isr(cdch_data_t *p_cdc, pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes); void rndish_close(uint8_t dev_addr); -#endif - #ifdef __cplusplus } #endif diff --git a/src/class/custom/custom_device.c b/src/class/custom/custom_device.c index bc2f98c1b..04921259f 100644 --- a/src/class/custom/custom_device.c +++ b/src/class/custom/custom_device.c @@ -28,8 +28,6 @@ #if (TUSB_OPT_DEVICE_ENABLED && CFG_TUD_CUSTOM_CLASS) -#define _TINY_USB_SOURCE_FILE_ - #include "common/tusb_common.h" #include "custom_device.h" #include "device/usbd_pvt.h" diff --git a/src/class/custom/custom_device.h b/src/class/custom/custom_device.h index a1dc09430..704ecb23a 100644 --- a/src/class/custom/custom_device.h +++ b/src/class/custom/custom_device.h @@ -46,17 +46,13 @@ //--------------------------------------------------------------------+ //--------------------------------------------------------------------+ -// USBD-CLASS DRIVER API +// Internal Class Driver API //--------------------------------------------------------------------+ -#ifdef _TINY_USB_SOURCE_FILE_ - void cusd_init(void); bool cusd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t *p_length); bool cusd_control_request_st(uint8_t rhport, tusb_control_request_t const * p_request); bool cusd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request); bool cusd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes); void cusd_reset(uint8_t rhport); -#endif - #endif /* _TUSB_CUSTOM_DEVICE_H_ */ diff --git a/src/class/custom/custom_host.c b/src/class/custom/custom_host.c index 3ac12a688..488e26b20 100644 --- a/src/class/custom/custom_host.c +++ b/src/class/custom/custom_host.c @@ -28,8 +28,6 @@ #if (TUSB_OPT_HOST_ENABLED && CFG_TUSB_HOST_CUSTOM_CLASS) -#define _TINY_USB_SOURCE_FILE_ - //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ diff --git a/src/class/custom/custom_host.h b/src/class/custom/custom_host.h index 2ba288e1f..cf612a40b 100644 --- a/src/class/custom/custom_host.h +++ b/src/class/custom/custom_host.h @@ -57,15 +57,14 @@ static inline bool tusbh_custom_is_mounted(uint8_t dev_addr, uint16_t vendor_id, tusb_error_t tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length); tusb_error_t tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length); -#ifdef _TINY_USB_SOURCE_FILE_ - +//--------------------------------------------------------------------+ +// Internal Class Driver API +//--------------------------------------------------------------------+ void cush_init(void); tusb_error_t cush_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interface_desc, uint16_t *p_length); void cush_isr(pipe_handle_t pipe_hdl, xfer_result_t event); void cush_close(uint8_t dev_addr); -#endif - #ifdef __cplusplus } #endif diff --git a/src/class/hid/hid_device.c b/src/class/hid/hid_device.c index 73af0c9a2..3a20a9cc8 100644 --- a/src/class/hid/hid_device.c +++ b/src/class/hid/hid_device.c @@ -28,7 +28,6 @@ #if (TUSB_OPT_DEVICE_ENABLED && CFG_TUD_HID)
-#define _TINY_USB_SOURCE_FILE_
//--------------------------------------------------------------------+
// INCLUDE
//--------------------------------------------------------------------+
@@ -43,7 +42,6 @@ // Max report len is keyboard's one with 8 byte + 1 byte report id
#define REPORT_BUFSIZE 12
-
#define ITF_IDX_BOOT_KBD 0
#define ITF_IDX_BOOT_MSE ( ITF_IDX_BOOT_KBD + (CFG_TUD_HID_KEYBOARD && CFG_TUD_HID_KEYBOARD_BOOT) )
#define ITF_IDX_GENERIC ( ITF_IDX_BOOT_MSE + (CFG_TUD_HID_MOUSE && CFG_TUD_HID_MOUSE_BOOT) )
@@ -70,8 +68,10 @@ typedef struct typedef struct
{
- uint8_t usage; // HID_USAGE_*
- uint8_t idle_rate; // in unit of 4 ms
+ uint8_t usage; // HID_USAGE_*
+ uint8_t idle_rate; // Idle Rate = 0 : only send report if there is changes, i.e skip duplication
+ // Idle Rate > 0 : skip duplication, but send at least 1 report every idle rate (in unit of 4 ms).
+ // If idle time is less than interrupt polling then use the polling.
uint8_t report_id;
uint8_t report_len;
@@ -91,7 +91,6 @@ static hidd_report_t _mse_rpt; #endif
/*------------- Helpers -------------*/
-
static inline hidd_interface_t* get_interface_by_itfnum(uint8_t itf_num)
{
for (uint8_t i=0; i < ITF_COUNT; i++ )
@@ -151,19 +150,14 @@ static bool hidd_kbd_report(hid_keyboard_report_t const *p_report) hidd_interface_t * p_hid = _kbd_rpt.itf;
- // Idle Rate = 0 : only send report if there is changes, i.e skip duplication
- // Idle Rate > 0 : skip duplication, but send at least 1 report every idle rate (in unit of 4 ms).
- // If idle time is less than interrupt polling then use the polling.
- static tu_timeout_t idle_tm = { 0, 0 };
-
- if ( (_kbd_rpt.idle_rate == 0) || !tu_timeout_expired(&idle_tm) )
- {
- if ( 0 == memcmp(p_hid->report_buf, p_report, sizeof(hid_keyboard_report_t)) ) return true;
- }
-
- tu_timeout_set(&idle_tm, _kbd_rpt.idle_rate * 4);
+ // only send report if there is changes, i.e skip duplication
+// if ( _kbd_rpt.idle_rate == 0 )
+// {
+// if ( 0 == memcmp(p_hid->report_buf, p_report, sizeof(hid_keyboard_report_t)) ) return true;
+// }
memcpy(p_hid->report_buf, p_report, sizeof(hid_keyboard_report_t));
+
return dcd_edpt_xfer(TUD_OPT_RHPORT, p_hid->ep_in, p_hid->report_buf, sizeof(hid_keyboard_report_t));
}
@@ -195,33 +189,6 @@ bool tud_hid_keyboard_key_press(char ch) return tud_hid_keyboard_keycode(modifier, keycode);
}
-#if 0 // should be at application
-bool tud_hid_keyboard_key_sequence(const char* str, uint32_t interval_ms)
-{
- // Send each key in string
- char ch;
- while( (ch = *str++) != 0 )
- {
- char lookahead = *str;
-
- tud_hid_keyboard_key_press(ch);
-
- // Blocking delay
- tu_timeout_wait(interval_ms);
-
- /* Only need to empty report if the next character is NULL or the same with
- * the current one, else no need to send */
- if ( lookahead == ch || lookahead == 0 )
- {
- tud_hid_keyboard_key_release();
- tu_timeout_wait(interval_ms);
- }
- }
-
- return true;
-}
-#endif
-
#endif // CFG_TUD_HID_ASCII_TO_KEYCODE_LOOKUP
#endif // CFG_TUD_HID_KEYBOARD
@@ -246,6 +213,7 @@ static bool hidd_mouse_report(hid_mouse_report_t const *p_report) TU_VERIFY( tud_hid_mouse_ready() );
hidd_interface_t * p_hid = _mse_rpt.itf;
+// only send report if there is changes, i.e skip duplication
memcpy(p_hid->report_buf, p_report, sizeof(hid_mouse_report_t));
return dcd_edpt_xfer(TUD_OPT_RHPORT, p_hid->ep_in, p_hid->report_buf, sizeof(hid_mouse_report_t));
diff --git a/src/class/hid/hid_device.h b/src/class/hid/hid_device.h index e0d8907de..096daad18 100644 --- a/src/class/hid/hid_device.h +++ b/src/class/hid/hid_device.h @@ -361,8 +361,6 @@ ATTR_WEAK void tud_hid_mouse_set_report_cb(uint8_t report_id, hid_report_type_t //--------------------------------------------------------------------+
// INTERNAL API
//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
-
void hidd_init(void);
bool hidd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t *p_length);
bool hidd_control_request(uint8_t rhport, tusb_control_request_t const * p_request);
@@ -370,8 +368,6 @@ bool hidd_control_request_complete (uint8_t rhport, tusb_control_request_t const bool hidd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
void hidd_reset(uint8_t rhport);
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c index a52cf64b3..5aabbc01f 100644 --- a/src/class/hid/hid_host.c +++ b/src/class/hid/hid_host.c @@ -28,10 +28,6 @@ #if (TUSB_OPT_HOST_ENABLED && HOST_CLASS_HID)
-#define _TINY_USB_SOURCE_FILE_
-//--------------------------------------------------------------------+
-// INCLUDE
-//--------------------------------------------------------------------+
#include "common/tusb_common.h"
#include "hid_host.h"
diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h index 0e5e48c64..8fa974c92 100644 --- a/src/class/hid/hid_host.h +++ b/src/class/hid/hid_host.h @@ -193,10 +193,8 @@ void tuh_hid_generic_isr(uint8_t dev_addr, xfer_result_t event); /** @} */ // ClassDriver_HID_Generic
//--------------------------------------------------------------------+
-// USBH-CLASS DRIVER API
+// Internal Class Driver API
//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
-
typedef struct {
pipe_handle_t pipe_hdl;
uint16_t report_size;
@@ -208,8 +206,6 @@ bool hidh_open_subtask(uint8_t dev_addr, tusb_desc_interface_t const *p_interfac void hidh_isr(pipe_handle_t pipe_hdl, xfer_result_t event, uint32_t xferred_bytes);
void hidh_close(uint8_t dev_addr);
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index 53c7575f4..5ba111a22 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -28,7 +28,6 @@ #if (TUSB_OPT_DEVICE_ENABLED && CFG_TUD_MIDI)
-#define _TINY_USB_SOURCE_FILE_
//--------------------------------------------------------------------+
// INCLUDE
//--------------------------------------------------------------------+
diff --git a/src/class/midi/midi_device.h b/src/class/midi/midi_device.h index 7cbad6e22..a43514044 100644 --- a/src/class/midi/midi_device.h +++ b/src/class/midi/midi_device.h @@ -85,18 +85,14 @@ static inline bool tud_midi_write_flush (void) ATTR_WEAK void tud_midi_rx_cb(uint8_t itf);
//--------------------------------------------------------------------+
-// USBD-CLASS DRIVER API
+// Internal Class Driver API
//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
-
-void midid_init (void);
+void midid_init (void);
bool midid_open (uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length);
bool midid_control_request (uint8_t rhport, tusb_control_request_t const * p_request);
bool midid_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request);
bool midid_xfer_cb (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
-void midid_reset (uint8_t rhport);
-
-#endif
+void midid_reset (uint8_t rhport);
#ifdef __cplusplus
}
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c index 728f4d363..04a3178a3 100644 --- a/src/class/msc/msc_device.c +++ b/src/class/msc/msc_device.c @@ -28,11 +28,6 @@ #if (TUSB_OPT_DEVICE_ENABLED && CFG_TUD_MSC)
-//--------------------------------------------------------------------+
-// INCLUDE
-//--------------------------------------------------------------------+
-#define _TINY_USB_SOURCE_FILE_
-
#include "common/tusb_common.h"
#include "msc_device.h"
#include "device/usbd_pvt.h"
@@ -412,7 +407,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t p_msc->stage = MSC_STAGE_STATUS;
tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00); // Sense = Invalid Command Operation
- dcd_edpt_stall(rhport, p_msc->ep_in);
+ usbd_edpt_stall(rhport, p_msc->ep_in);
}
}
}
@@ -512,7 +507,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t if ( p_msc->stage == MSC_STAGE_STATUS )
{
// Either endpoints is stalled, need to wait until it is cleared by host
- if ( dcd_edpt_stalled(rhport, p_msc->ep_in) || dcd_edpt_stalled(rhport, p_msc->ep_out) )
+ if ( usbd_edpt_stalled(rhport, p_msc->ep_in) || usbd_edpt_stalled(rhport, p_msc->ep_out) )
{
// simulate an transfer complete with adjusted parameters --> this driver callback will fired again
dcd_event_xfer_complete(rhport, p_msc->ep_out, 0, XFER_RESULT_SUCCESS, false);
@@ -573,7 +568,7 @@ static void proc_read10_cmd(uint8_t rhport, mscd_interface_t* p_msc) p_csw->status = MSC_CSW_STATUS_FAILED;
tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00); // Sense = Invalid Command Operation
- dcd_edpt_stall(rhport, p_msc->ep_in);
+ usbd_edpt_stall(rhport, p_msc->ep_in);
}
else if ( nbytes == 0 )
{
@@ -599,7 +594,7 @@ static void proc_write10_cmd(uint8_t rhport, mscd_interface_t* p_msc) p_csw->status = MSC_CSW_STATUS_FAILED;
tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00); // Sense = Write protected
- dcd_edpt_stall(rhport, p_msc->ep_out);
+ usbd_edpt_stall(rhport, p_msc->ep_out);
return;
}
diff --git a/src/class/msc/msc_device.h b/src/class/msc/msc_device.h index c97f6d111..e030951be 100644 --- a/src/class/msc/msc_device.h +++ b/src/class/msc/msc_device.h @@ -154,10 +154,8 @@ ATTR_WEAK bool tud_msc_is_writable_cb(uint8_t lun); /** @} */
//--------------------------------------------------------------------+
-// USBD-CLASS DRIVER API
+// Internal Class Driver API
//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
-
void mscd_init(void);
bool mscd_open(uint8_t rhport, tusb_desc_interface_t const * itf_desc, uint16_t *p_length);
bool mscd_control_request(uint8_t rhport, tusb_control_request_t const * p_request);
@@ -165,8 +163,6 @@ bool mscd_control_request_complete (uint8_t rhport, tusb_control_request_t const bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
void mscd_reset(uint8_t rhport);
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 4e438a787..bb12c52d7 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -28,8 +28,6 @@ #if TUSB_OPT_HOST_ENABLED & CFG_TUH_MSC
-#define _TINY_USB_SOURCE_FILE_
-
//--------------------------------------------------------------------+
// INCLUDE
//--------------------------------------------------------------------+
diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index dea090a94..1edce82c5 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -171,10 +171,8 @@ void tuh_msc_isr(uint8_t dev_addr, xfer_result_t event, uint32_t xferred_bytes); //--------------------------------------------------------------------+
-// USBH-CLASS DRIVER API
+// Internal Class Driver API
//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
-
typedef struct
{
uint8_t itf_numr;
@@ -198,8 +196,6 @@ bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *it void msch_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
void msch_close(uint8_t dev_addr);
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/src/common/tusb_timeout.h b/src/common/tusb_timeout.h index 556b8d4a3..83a4dac63 100644 --- a/src/common/tusb_timeout.h +++ b/src/common/tusb_timeout.h @@ -28,11 +28,11 @@ * \defgroup Group_TimeoutTimer timeout timer
* @{ */
-
#ifndef _TUSB_TIMEOUT_H_
#define _TUSB_TIMEOUT_H_
-#include "tusb_compiler.h"
+#include <stdbool.h>
+#include <stdint.h>
#ifdef __cplusplus
extern "C" {
@@ -43,6 +43,8 @@ typedef struct { uint32_t interval;
}tu_timeout_t;
+#if 0
+
extern uint32_t tusb_hal_millis(void);
static inline void tu_timeout_set(tu_timeout_t* tt, uint32_t msec)
@@ -67,6 +69,8 @@ static inline void tu_timeout_restart(tu_timeout_t* tt) tt->start = tusb_hal_millis();
}
+#endif
+
#ifdef __cplusplus
}
#endif
diff --git a/src/device/dcd.h b/src/device/dcd.h index 95a187298..186c4af0c 100644 --- a/src/device/dcd.h +++ b/src/device/dcd.h @@ -94,24 +94,6 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr); // Receive Set Config request
void dcd_set_config (uint8_t rhport, uint8_t config_num);
-// Get current frame number
-uint32_t dcd_get_frame_number(uint8_t rhport);
-
-/*------------------------------------------------------------------*/
-/* Event Function
- * Called by DCD to notify USBD
- *------------------------------------------------------------------*/
-void dcd_event_handler(dcd_event_t const * event, bool in_isr);
-
-// helper to send bus signal event
-void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr);
-
-// helper to send setup received
-void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr);
-
-// helper to send transfer complete event
-void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr);
-
/*------------------------------------------------------------------*/
/* Endpoint API
* - open : Configure endpoint's registers
@@ -120,7 +102,6 @@ void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_ * - busy : Check if endpoint transferring is complete (TODO remove)
* - stall : stall endpoint
* - clear_stall : clear stall
- * - stalled : check if stalled ( TODO remove )
*------------------------------------------------------------------*/
bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc);
bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes);
@@ -128,7 +109,21 @@ bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr); void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr);
void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr);
-bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr);
+
+/*------------------------------------------------------------------*/
+/* Event Function
+ * Called by DCD to notify USBD
+ *------------------------------------------------------------------*/
+void dcd_event_handler(dcd_event_t const * event, bool in_isr);
+
+// helper to send bus signal event
+void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr);
+
+// helper to send setup received
+void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr);
+
+// helper to send transfer complete event
+void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr);
#ifdef __cplusplus
}
diff --git a/src/device/usbd.c b/src/device/usbd.c index 877837fae..604f35bc5 100644 --- a/src/device/usbd.c +++ b/src/device/usbd.c @@ -28,8 +28,6 @@ #if TUSB_OPT_DEVICE_ENABLED
-#define _TINY_USB_SOURCE_FILE_
-
#include "tusb.h"
#include "usbd.h"
#include "device/usbd_pvt.h"
@@ -44,9 +42,11 @@ typedef struct {
uint8_t config_num;
- uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid)
- uint8_t ep2drv[8][2]; // map endpoint to driver ( 0xff is invalid )
+ uint8_t itf2drv[16]; // map interface number to driver (0xff is invalid)
+ uint8_t ep2drv[8][2]; // map endpoint to driver ( 0xff is invalid )
+ uint8_t ep_busy_mask[2]; // bit mask for busy endpoint
+ uint8_t ep_stall_mask[2]; // bit mask for stalled endpoint
}usbd_device_t;
static usbd_device_t _usbd_dev = { 0 };
@@ -102,7 +102,6 @@ static usbd_class_driver_t const usbd_class_drivers[] = },
#endif
-
#if CFG_TUD_HID
{
.class_code = TUSB_CLASS_HID,
@@ -241,10 +240,12 @@ void tud_task (void) switch ( event.event_id )
{
case DCD_EVENT_SETUP_RECEIVED:
- // Process control request, if failed control endpoint is stalled
+ // Process control request
if ( !process_control_request(event.rhport, &event.setup_received) )
{
- usbd_control_stall(event.rhport);
+ // Failed -> stall both control endpoint IN and OUT
+ dcd_edpt_stall(event.rhport, 0);
+ dcd_edpt_stall(event.rhport, 0 | TUSB_DIR_IN_MASK);
}
break;
@@ -379,7 +380,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const {
case TUSB_REQ_GET_STATUS:
{
- uint16_t status = dcd_edpt_stalled(rhport, tu_u16_low(p_request->wIndex)) ? 0x0001 : 0x0000;
+ uint16_t status = usbd_edpt_stalled(rhport, tu_u16_low(p_request->wIndex)) ? 0x0001 : 0x0000;
usbd_control_xfer(rhport, p_request, &status, 2);
}
break;
@@ -392,7 +393,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const case TUSB_REQ_SET_FEATURE:
// only endpoint feature is halted/stalled
- dcd_edpt_stall(rhport, tu_u16_low(p_request->wIndex));
+ usbd_edpt_stall(rhport, tu_u16_low(p_request->wIndex));
usbd_control_status(rhport, p_request);
break;
@@ -650,4 +651,35 @@ void usbd_defer_func(osal_task_func_t func, void* param, bool in_isr) dcd_event_handler(&event, in_isr);
}
+//--------------------------------------------------------------------+
+// USBD Endpoint API
+//--------------------------------------------------------------------+
+void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr)
+{
+ uint8_t const epnum = tu_edpt_number(ep_addr);
+ uint8_t const dir = tu_edpt_dir(ep_addr);
+
+ dcd_edpt_stall(rhport, ep_addr);
+ _usbd_dev.ep_stall_mask[dir] = tu_bit_set(_usbd_dev.ep_stall_mask[dir], epnum);
+}
+
+void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
+{
+ uint8_t const epnum = tu_edpt_number(ep_addr);
+ uint8_t const dir = tu_edpt_dir(ep_addr);
+
+ dcd_edpt_clear_stall(rhport, ep_addr);
+ _usbd_dev.ep_stall_mask[dir] = tu_bit_clear(_usbd_dev.ep_stall_mask[dir], epnum);
+}
+
+bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr)
+{
+ (void) rhport;
+
+ uint8_t const epnum = tu_edpt_number(ep_addr);
+ uint8_t const dir = tu_edpt_dir(ep_addr);
+
+ return tu_bit_test(_usbd_dev.ep_stall_mask[dir], epnum);
+}
+
#endif
diff --git a/src/device/usbd.h b/src/device/usbd.h index 11ef63887..614b4f311 100644 --- a/src/device/usbd.h +++ b/src/device/usbd.h @@ -38,7 +38,6 @@ // INCLUDE
//--------------------------------------------------------------------+
#include <common/tusb_common.h>
-#include "osal/osal.h"
#include "device/dcd.h"
//--------------------------------------------------------------------+
@@ -75,10 +74,10 @@ void tud_task (void); // APPLICATION CALLBACK (WEAK is optional)
//--------------------------------------------------------------------+
-/** Callback invoked when device is mounted (configured) */
+// Callback invoked when device is mounted (configured)
ATTR_WEAK void tud_mount_cb(void);
-/** Callback invoked when device is unmounted (bus reset/unplugged) */
+// Callback invoked when device is unmounted (bus reset/unplugged)
ATTR_WEAK void tud_umount_cb(void);
//void tud_device_suspended_cb(void);
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c index 094d2fb44..24234f4d2 100644 --- a/src/device/usbd_control.c +++ b/src/device/usbd_control.c @@ -28,8 +28,6 @@ #if TUSB_OPT_DEVICE_ENABLED
-#define _TINY_USB_SOURCE_FILE_
-
#include "tusb.h"
#include "device/usbd_pvt.h"
@@ -60,13 +58,6 @@ void usbd_control_reset (uint8_t rhport) tu_varclr(&_control_state);
}
-void usbd_control_stall(uint8_t rhport)
-{
- // when stalling control endpoint both IN and OUt will be stalled
- dcd_edpt_stall(rhport, EDPT_CTRL_OUT);
- dcd_edpt_stall(rhport, EDPT_CTRL_IN);
-}
-
bool usbd_control_status(uint8_t rhport, tusb_control_request_t const * request)
{
// status direction is reversed to one in the setup packet
@@ -147,8 +138,9 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result TU_ASSERT( usbd_control_status(rhport, &_control_state.request) );
}else
{
- // stall due to callback
- usbd_control_stall(rhport);
+ // Stall both IN and OUT control endpoint
+ dcd_edpt_stall(rhport, EDPT_CTRL_OUT);
+ dcd_edpt_stall(rhport, EDPT_CTRL_IN);
}
}
else
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h index d2562d298..dab67581f 100644 --- a/src/device/usbd_pvt.h +++ b/src/device/usbd_pvt.h @@ -49,8 +49,9 @@ bool usbd_control_xfer(uint8_t rhport, tusb_control_request_t const * request, v // Send STATUS (zero length) packet bool usbd_control_status(uint8_t rhport, tusb_control_request_t const * request); -// Stall control endpoint (both IN and OUT) until new setup packet arrived -void usbd_control_stall(uint8_t rhport); +void usbd_edpt_stall(uint8_t rhport, uint8_t ep_addr); +void usbd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr); +bool usbd_edpt_stalled(uint8_t rhport, uint8_t ep_addr); /*------------------------------------------------------------------*/ /* Helper diff --git a/src/host/hub.c b/src/host/hub.c index d54032299..157a77937 100644 --- a/src/host/hub.c +++ b/src/host/hub.c @@ -28,8 +28,6 @@ #if (TUSB_OPT_HOST_ENABLED && CFG_TUH_HUB)
-#define _TINY_USB_SOURCE_FILE_
-
//--------------------------------------------------------------------+
// INCLUDE
//--------------------------------------------------------------------+
diff --git a/src/host/hub.h b/src/host/hub.h index c3a02af5e..5a4a5eb7f 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -178,17 +178,13 @@ tusb_speed_t hub_port_get_speed(void); bool hub_status_pipe_queue(uint8_t dev_addr);
//--------------------------------------------------------------------+
-// USBH-CLASS DRIVER API
+// Internal Class Driver API
//--------------------------------------------------------------------+
-#ifdef _TINY_USB_SOURCE_FILE_
-
void hub_init(void);
bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length);
void hub_isr(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
void hub_close(uint8_t dev_addr);
-#endif
-
#ifdef __cplusplus
}
#endif
diff --git a/src/host/usbh.c b/src/host/usbh.c index 640bbfc8d..60d7afa76 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -28,8 +28,6 @@ #if TUSB_OPT_HOST_ENABLED
-#define _TINY_USB_SOURCE_FILE_
-
#ifndef CFG_TUH_TASK_QUEUE_SZ
#define CFG_TUH_TASK_QUEUE_SZ 16
#endif
diff --git a/src/host/usbh.h b/src/host/usbh.h index a7e053626..b8d15305f 100644 --- a/src/host/usbh.h +++ b/src/host/usbh.h @@ -88,14 +88,9 @@ ATTR_WEAK void tuh_umount_cb(uint8_t dev_addr); //--------------------------------------------------------------------+ // CLASS-USBH & INTERNAL API //--------------------------------------------------------------------+ -#ifdef _TINY_USB_SOURCE_FILE_ - bool usbh_init(void); - bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data); -#endif - #ifdef __cplusplus } #endif diff --git a/src/osal/osal.h b/src/osal/osal.h index 413189b4e..7ceb22125 100644 --- a/src/osal/osal.h +++ b/src/osal/osal.h @@ -53,8 +53,6 @@ typedef void (*osal_task_func_t)( void * ); #else
/* RTOS Porting API
*
- * uint32_t tusb_hal_millis(void)
- *
* Task
* void osal_task_delay(uint32_t msec)
*
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 17a802ed8..6144f3e5c 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -27,8 +27,6 @@ #ifndef _TUSB_OSAL_NONE_H_
#define _TUSB_OSAL_NONE_H_
-#include "tusb_hal.h"
-
#ifdef __cplusplus
extern "C" {
#endif
@@ -38,8 +36,11 @@ //--------------------------------------------------------------------+
static inline void osal_task_delay(uint32_t msec)
{
- uint32_t start = tusb_hal_millis();
- while ( ( tusb_hal_millis() - start ) < msec ) {}
+ (void) msec;
+ // TODO only used by Host stack, will implement using SOF
+
+// uint32_t start = tusb_hal_millis();
+// while ( ( tusb_hal_millis() - start ) < msec ) {}
}
//--------------------------------------------------------------------+
diff --git a/src/portable/microchip/samd21/dcd_samd21.c b/src/portable/microchip/samd21/dcd_samd21.c index 706a62ed9..723bd6c3a 100644 --- a/src/portable/microchip/samd21/dcd_samd21.c +++ b/src/portable/microchip/samd21/dcd_samd21.c @@ -114,12 +114,6 @@ void dcd_set_config (uint8_t rhport, uint8_t config_num) // Nothing to do } -uint32_t dcd_get_frame_number(uint8_t rhport) -{ - (void) rhport; - return USB->DEVICE.FNUM.bit.FNUM; -} - /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ @@ -195,20 +189,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t return true; } -bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - // control is never got halted - if ( ep_addr == 0 ) { - return false; - } - - uint8_t const epnum = tu_edpt_number(ep_addr); - UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0; -} - void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; diff --git a/src/portable/microchip/samd51/dcd_samd51.c b/src/portable/microchip/samd51/dcd_samd51.c index 9773ad71e..9869956c7 100644 --- a/src/portable/microchip/samd51/dcd_samd51.c +++ b/src/portable/microchip/samd51/dcd_samd51.c @@ -119,12 +119,6 @@ void dcd_set_config (uint8_t rhport, uint8_t config_num) // Nothing to do } -uint32_t dcd_get_frame_number(uint8_t rhport) -{ - (void) rhport; - return USB->DEVICE.FNUM.bit.FNUM; -} - /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ @@ -199,20 +193,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t return true; } -bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - // control is never got halted - if ( ep_addr == 0 ) { - return false; - } - - uint8_t const epnum = tu_edpt_number(ep_addr); - UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum]; - return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? ep->EPINTFLAG.bit.STALL1 : ep->EPINTFLAG.bit.STALL0; -} - void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c index a65087173..3c2b6d45b 100644 --- a/src/portable/nordic/nrf5x/dcd_nrf5x.c +++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c @@ -209,12 +209,6 @@ void dcd_set_config (uint8_t rhport, uint8_t config_num) // Nothing to do } -uint32_t dcd_get_frame_number(uint8_t rhport) -{ - (void) rhport; - return NRF_USBD->FRAMECNTR; -} - //--------------------------------------------------------------------+ // Endpoint API //--------------------------------------------------------------------+ @@ -285,17 +279,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t return true; } -bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - // control is never got halted - if ( ep_addr == 0 ) return false; - - uint8_t const epnum = tu_edpt_number(ep_addr); - return (tu_edpt_dir(ep_addr) == TUSB_DIR_IN ) ? NRF_USBD->HALTED.EPIN[epnum] : NRF_USBD->HALTED.EPOUT[epnum]; -} - void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) { (void) rhport; diff --git a/src/portable/nordic/nrf5x/hal_nrf5x.c b/src/portable/nordic/nrf5x/hal_nrf5x.c index 1d149eb8c..8477a56cd 100644 --- a/src/portable/nordic/nrf5x/hal_nrf5x.c +++ b/src/portable/nordic/nrf5x/hal_nrf5x.c @@ -40,8 +40,6 @@ #endif #include "nrfx_power.h" - -#include "tusb_hal.h" #include "device/dcd.h" /*------------------------------------------------------------------*/ diff --git a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c index c1a6f4a8b..65b345957 100644 --- a/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c +++ b/src/portable/nxp/lpc11_13_15/dcd_lpc11_13_15.c @@ -153,13 +153,6 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) LPC_USB->DEVCMDSTAT |= dev_addr; } -uint32_t dcd_get_frame_number(uint8_t rhport) -{ - (void) rhport; - - return LPC_USB->INFO & (TU_BIT(11) - 1); -} - bool dcd_init(uint8_t rhport) { (void) rhport; @@ -189,14 +182,6 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) _dcd.ep[ep_id][0].stall = 1; } -bool dcd_edpt_stalled(uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - uint8_t const ep_id = ep_addr2id(ep_addr); - return _dcd.ep[ep_id][0].stall; -} - void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { (void) rhport; diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c index ba6a66d84..f18a91b1c 100644 --- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c +++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c @@ -217,12 +217,6 @@ void dcd_set_config(uint8_t rhport, uint8_t config_num) sie_write(SIE_CMDCODE_CONFIGURE_DEVICE, 1, 1); } -uint32_t dcd_get_frame_number(uint8_t rhport) -{ - (void) rhport; - return (uint32_t) sie_read(SIE_CMDCODE_READ_FRAME_NUMBER); -} - //--------------------------------------------------------------------+ // CONTROL HELPER //--------------------------------------------------------------------+ @@ -350,14 +344,6 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) sie_write(SIE_CMDCODE_ENDPOINT_SET_STATUS+ep_id, 1, 0); } -bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - - uint8_t const ep_state = sie_read(SIE_CMDCODE_ENDPOINT_SELECT + ep_addr2idx(ep_addr)); - return (ep_state & SIE_SELECT_ENDPOINT_STALL_MASK) ? true : false; -} - static bool control_xact(uint8_t rhport, uint8_t dir, uint8_t * buffer, uint8_t len) { (void) rhport; diff --git a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c index ec3ac188b..a92a1c7b1 100644 --- a/src/portable/nxp/lpc18_43/dcd_lpc18_43.c +++ b/src/portable/nxp/lpc18_43/dcd_lpc18_43.c @@ -32,8 +32,6 @@ // INCLUDE //--------------------------------------------------------------------+ #include "common/tusb_common.h" -#include "tusb_hal.h" - #include "device/dcd.h" #include "dcd_lpc18_43.h" @@ -165,11 +163,6 @@ void dcd_set_config(uint8_t rhport, uint8_t config_num) // nothing to do } -uint32_t dcd_get_frame_number(uint8_t rhport) -{ - return LPC_USB[rhport]->FRINDEX_D >> 3; -} - //--------------------------------------------------------------------+ // HELPER //--------------------------------------------------------------------+ @@ -208,14 +201,6 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) LPC_USB[rhport]->ENDPTCTRL[epnum] |= ENDPTCTRL_MASK_STALL << (dir ? 16 : 0); } -bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) -{ - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - return LPC_USB[rhport]->ENDPTCTRL[epnum] & (ENDPTCTRL_MASK_STALL << (dir ? 16 : 0)); -} - void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) { uint8_t const epnum = tu_edpt_number(ep_addr); diff --git a/src/portable/readme.md b/src/portable/readme.md deleted file mode 100644 index a3e8557dc..000000000 --- a/src/portable/readme.md +++ /dev/null @@ -1,4 +0,0 @@ -To port tinyusb to support new MCU you need to implement all API in the -- tusb_hal.h (mandatory for both device and host stack) -- device/dcd.h for device stack -- host/hcd.h for host stack diff --git a/src/osal/osal.c b/src/portable/st/stm32f3/dcd_stm32f3.c index b1ffa3942..138c454a7 100644 --- a/src/osal/osal.c +++ b/src/portable/st/stm32f3/dcd_stm32f3.c @@ -25,24 +25,51 @@ */ #include "tusb_option.h" -#include "osal.h" + +#if TUSB_OPT_DEVICE_ENABLED && CFG_TUSB_MCU == OPT_MCU_STM32F3 + +#include "device/dcd.h" +#include "stm32f3xx.h" //--------------------------------------------------------------------+ -// TICK API +// MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ -#if CFG_TUSB_OS == OPT_OS_FREERTOS -uint32_t tusb_hal_millis(void) + +bool dcd_init (uint8_t rhport) { - return ( ( ((uint64_t) xTaskGetTickCount()) * 1000) / configTICK_RATE_HZ ); + return true; } -#elif CFG_TUSB_OS == OPT_OS_MYNEWT +// Enable device interrupt +void dcd_int_enable (uint8_t rhport) +{} + +// Disable device interrupt +void dcd_int_disable(uint8_t rhport) +{} -uint32_t tusb_hal_millis(void) +// Receive Set Address request, mcu port must also include status IN response +void dcd_set_address(uint8_t rhport, uint8_t dev_addr) +{} + +// Receive Set Config request +void dcd_set_config (uint8_t rhport, uint8_t config_num) +{} + +bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc) { - return os_time_ticks_to_ms32( os_time_get() ); + return false; } +bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes) +{ return false;} +bool dcd_edpt_busy (uint8_t rhport, uint8_t ep_addr) +{ return false;} + +void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) +{} +void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr) +{} #endif diff --git a/src/portable/st/stm32f4/dcd_stm32f4.c b/src/portable/st/stm32f4/dcd_stm32f4.c index 472a63f32..db72f92d3 100644 --- a/src/portable/st/stm32f4/dcd_stm32f4.c +++ b/src/portable/st/stm32f4/dcd_stm32f4.c @@ -196,15 +196,6 @@ void dcd_set_config (uint8_t rhport, uint8_t config_num) // Nothing to do } -uint32_t dcd_get_frame_number(uint8_t rhport) -{ - (void) rhport; - - USB_OTG_DeviceTypeDef * dev = DEVICE_BASE; - - return (dev->DSTS & USB_OTG_DSTS_FNSOF_Msk) >> USB_OTG_DSTS_FNSOF_Pos; -} - /*------------------------------------------------------------------*/ /* DCD Endpoint port *------------------------------------------------------------------*/ @@ -308,30 +299,6 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t return true; } -bool dcd_edpt_stalled (uint8_t rhport, uint8_t ep_addr) -{ - (void) rhport; - USB_OTG_OUTEndpointTypeDef * out_ep = OUT_EP_BASE; - USB_OTG_INEndpointTypeDef * in_ep = IN_EP_BASE; - - // control is never got halted - if(ep_addr == 0) { - return false; - } - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - bool stalled = false; - - if(dir == TUSB_DIR_IN) { - stalled = (in_ep[epnum].DIEPCTL & USB_OTG_DIEPCTL_STALL_Msk); - } else { - stalled = (out_ep[epnum].DOEPCTL & USB_OTG_DOEPCTL_STALL_Msk); - } - - return stalled; -} - // TODO: The logic for STALLing and disabling an endpoint is very similar // (send STALL versus NAK handshakes back). Refactor into resuable function. void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr) diff --git a/src/tusb.c b/src/tusb.c index ec8f328b0..825aa988c 100644 --- a/src/tusb.c +++ b/src/tusb.c @@ -27,7 +27,6 @@ #include "tusb_option.h"
#if TUSB_OPT_HOST_ENABLED || TUSB_OPT_DEVICE_ENABLED
-#define _TINY_USB_SOURCE_FILE_
#include "tusb.h"
diff --git a/src/tusb.h b/src/tusb.h index c6d572436..122851b45 100644 --- a/src/tusb.h +++ b/src/tusb.h @@ -35,7 +35,6 @@ // INCLUDE
//--------------------------------------------------------------------+
#include "common/tusb_common.h"
-#include "tusb_hal.h"
#include "osal/osal.h"
#include "common/tusb_fifo.h"
diff --git a/src/tusb_hal.h b/src/tusb_hal.h deleted file mode 100644 index 2dcafa77f..000000000 --- a/src/tusb_hal.h +++ /dev/null @@ -1,52 +0,0 @@ -/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2018, hathach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef _TUSB_HAL_H_
-#define _TUSB_HAL_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-//--------------------------------------------------------------------+
-// INCLUDES
-//--------------------------------------------------------------------+
-#include "common/tusb_common.h"
-
-//--------------------------------------------------------------------+
-// HAL API
-//--------------------------------------------------------------------+
-
-// Only required to implement if using No RTOS (osal_none)
-// TODO could be remove
-uint32_t tusb_hal_millis(void);
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* _TUSB_HAL_H_ */
-
diff --git a/src/tusb_option.h b/src/tusb_option.h index 40705bc00..46d2186a0 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -36,21 +36,21 @@ /** \defgroup group_mcu Supported MCU
* \ref CFG_TUSB_MCU must be defined to one of these
* @{ */
-#define OPT_MCU_LPC11UXX 1 ///< NXP LPC11Uxx
+#define OPT_MCU_LPC11UXX 1 ///< NXP LPC11Uxx
+#define OPT_MCU_LPC13XX 3 ///< NXP LPC13xx
+#define OPT_MCU_LPC175X_6X 4 ///< NXP LPC175x, LPC176x
+#define OPT_MCU_LPC177X_8X 5 ///< NXP LPC177x, LPC178x
+#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx
+#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
+#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
-#define OPT_MCU_LPC13XX 3 ///< NXP LPC13xx
-#define OPT_MCU_LPC175X_6X 4 ///< NXP LPC175x, LPC176x
-#define OPT_MCU_LPC177X_8X 5 ///< NXP LPC177x, LPC178x
-#define OPT_MCU_LPC18XX 6 ///< NXP LPC18xx
-#define OPT_MCU_LPC40XX 7 ///< NXP LPC40xx
-#define OPT_MCU_LPC43XX 8 ///< NXP LPC43xx
-
-#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series
+#define OPT_MCU_NRF5X 100 ///< Nordic nRF5x series
#define OPT_MCU_SAMD21 200 ///< MicroChip SAMD21
#define OPT_MCU_SAMD51 201 ///< MicroChip SAMD51
#define OPT_MCU_STM32F4 300 ///< ST STM32F4
+#define OPT_MCU_STM32F3 301 ///< ST STM32F3
/** @} */
diff --git a/tools/build_all.py b/tools/build_all.py new file mode 100644 index 000000000..4b6fa5775 --- /dev/null +++ b/tools/build_all.py @@ -0,0 +1,11 @@ +import os +import shutil +import sys +import subprocess +import time + +all_boards = ["metro_m0_express", "metro_m4_express", "pca10056", "stm32f407g_disc1"] + +for board in all_boards: + subprocess.run("make -j2 -C examples/device/cdc_msc_hid BOARD={} clean".format(board), shell=True) + subprocess.run("make -j2 -C examples/device/cdc_msc_hid BOARD={} all".format(board), shell=True) diff --git a/tools/top.mk b/tools/top.mk index 991f9b16a..be51b3f4f 100644 --- a/tools/top.mk +++ b/tools/top.mk @@ -11,7 +11,7 @@ TOP := $(patsubst %/tools/top.mk,%,$(THIS_MAKEFILE)) TOP := $(shell realpath $(TOP)) -$(info Top directory is $(TOP)) +#$(info Top directory is $(TOP)) CURRENT_PATH := $(shell realpath --relative-to=$(TOP) `pwd`) -$(info Path from top is $(CURRENT_PATH)) +#$(info Path from top is $(CURRENT_PATH)) |