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authorWilliam D. Jones <[email protected]>2019-08-30 22:07:35 -0400
committerWilliam D. Jones <[email protected]>2019-08-30 22:07:35 -0400
commit8b165e102427bb6e13dd7a8b014dbb829b452f1f (patch)
tree7df1bd3fb5342a572c4af463bf374865fb13f2af
parent7153561984e0038c17fa980a0653b1964ed5039f (diff)
stm32h7: Ensure FS (and the only) PHY is selected for OTG_HS2.
-rw-r--r--src/portable/st/stm32h7/dcd_stm32h7.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/portable/st/stm32h7/dcd_stm32h7.c b/src/portable/st/stm32h7/dcd_stm32h7.c
index 30e2a07c7..3ac9ce79b 100644
--- a/src/portable/st/stm32h7/dcd_stm32h7.c
+++ b/src/portable/st/stm32h7/dcd_stm32h7.c
@@ -48,7 +48,7 @@ void dcd_init (uint8_t rhport)
// No HNP/SRP (no OTG support), program timeout later, turnaround
// programmed for 32+ MHz.
- USB2_OTG_FS->GUSBCFG |= (0x06 << USB_OTG_GUSBCFG_TRDT_Pos);
+ USB2_OTG_FS->GUSBCFG |= (0x06 << USB_OTG_GUSBCFG_TRDT_Pos) | USB_OTG_GUSBCFG_PHYSEL;
// Clear all used interrupts
USB2_OTG_FS->GINTSTS |= USB_OTG_GINTSTS_OTGINT | USB_OTG_GINTSTS_MMIS | \