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authorhathach <[email protected]>2026-03-16 22:30:03 +0700
committerhathach <[email protected]>2026-03-16 22:30:03 +0700
commit8e8bb9a66fb4c822489f76bac434cdf10a45db93 (patch)
tree080fd6aea0f37f3c91632a8dfc7967f76b7bd384
parent9b2f6f4f0cb0d7c1227c87093382a7fb9eea35c9 (diff)
add missing stm32u083nucleo board files
The board.cmake, board.mk, and board.h were created but not included in the previous commit, causing CI cmake failure. Co-Authored-By: Claude Opus 4.6 <[email protected]>
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake9
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083nucleo/board.h99
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk9
3 files changed, 117 insertions, 0 deletions
diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake
new file mode 100644
index 000000000..8d1dafc15
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake
@@ -0,0 +1,9 @@
+set(MCU_VARIANT stm32u083xx)
+set(JLINK_DEVICE stm32u083rc)
+
+function(update_board TARGET)
+ target_compile_definitions(${TARGET} PUBLIC
+ STM32U083xx
+ CFG_EXAMPLE_VIDEO_READONLY
+ )
+endfunction()
diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
new file mode 100644
index 000000000..23fddbef9
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
@@ -0,0 +1,99 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+ name: NUCLEO-U083RC
+ url: https://www.st.com/en/evaluation-tools/nucleo-u083rc.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED: PA5 (LD4, Green)
+#define LED_PORT GPIOA
+#define LED_PIN GPIO_PIN_5
+#define LED_STATE_ON 1
+
+// Button: PC13 (B1, Blue)
+#define BUTTON_PORT GPIOC
+#define BUTTON_PIN GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE 0
+
+// UART: USART2 on PA2/PA3 (VCP via ST-Link)
+#define UART_DEV USART2
+#define UART_CLK_EN __HAL_RCC_USART2_CLK_ENABLE
+#define UART_GPIO_PORT GPIOA
+#define UART_GPIO_AF GPIO_AF7_USART2
+#define UART_TX_PIN GPIO_PIN_2
+#define UART_RX_PIN GPIO_PIN_3
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void SystemClock_Config(void) {
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+ RCC_OscInitStruct.PLL.PLLN = 7;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+ | RCC_CLOCKTYPE_PCLK1;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
+}
+
+static inline void board_vbus_sense_init(void) {
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk
new file mode 100644
index 000000000..f5f3d41b3
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk
@@ -0,0 +1,9 @@
+MCU_VARIANT = stm32u083xx
+CFLAGS += \
+ -DSTM32U083xx
+
+# For flash-jlink target
+JLINK_DEVICE = STM32U083RC
+
+# flash target using on-board stlink
+flash: flash-stlink