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authorHa Thach <[email protected]>2023-03-09 17:21:58 +0700
committerGitHub <[email protected]>2023-03-09 17:21:58 +0700
commit990fb6ae5c4d9d4b77c5a9ecb3a2abe899dd2712 (patch)
tree3f9c49ae32e8b20960048f320f7155eb06144fab
parentbe66f5f57f435ef2d00b3e23f6bd850468d14942 (diff)
parent8c8f26f14e6cb4561ed0a937739b926da27393ff (diff)
Merge pull request #1931 from branalba/master
For STM32H7 BSP boards, initialize RCC_...TypeDef structs as empty
-rw-r--r--hw/bsp/stm32h7/boards/daisyseed/board.h6
-rw-r--r--hw/bsp/stm32h7/boards/stm32h723nucleo/board.h6
-rw-r--r--hw/bsp/stm32h7/boards/stm32h743eval/board.h6
-rw-r--r--hw/bsp/stm32h7/boards/stm32h743nucleo/board.h6
-rw-r--r--hw/bsp/stm32h7/boards/stm32h745disco/board.h6
5 files changed, 15 insertions, 15 deletions
diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.h b/hw/bsp/stm32h7/boards/daisyseed/board.h
index 579c09727..0ad809720 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/board.h
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.h
@@ -57,9 +57,9 @@
//--------------------------------------------------------------------+
static inline void board_stm32h7_clock_init(void)
{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+ RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
/*!< Supply configuration update enable */
/* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
index 56a48ec24..0eb5e76ad 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
@@ -64,8 +64,8 @@
//--------------------------------------------------------------------+
static inline void board_stm32h7_clock_init(void)
{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+ RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
/* The PWR block is always enabled on the H7 series- there is no clock
enable. For now, use the default VOS3 scale mode (lowest) and limit clock
@@ -111,7 +111,7 @@ static inline void board_stm32h7_clock_init(void)
separate. However, the main system PLL (PLL1) doesn't have a direct
connection to the USB peripheral clock to generate 48 MHz, so we do this
dance. This will connect PLL1's Q output to the USB peripheral clock. */
- RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct;
+ RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index af2063ce0..666bec9a1 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -63,9 +63,9 @@
//--------------------------------------------------------------------+
static inline void board_stm32h7_clock_init(void)
{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+ RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
/*!< Supply configuration update enable */
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
index 06148c875..8c6a7ce5a 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
@@ -55,8 +55,8 @@
//--------------------------------------------------------------------+
static inline void board_stm32h7_clock_init(void)
{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+ RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
/* The PWR block is always enabled on the H7 series- there is no clock
enable. For now, use the default VOS3 scale mode (lowest) and limit clock
@@ -102,7 +102,7 @@ static inline void board_stm32h7_clock_init(void)
separate. However, the main system PLL (PLL1) doesn't have a direct
connection to the USB peripheral clock to generate 48 MHz, so we do this
dance. This will connect PLL1's Q output to the USB peripheral clock. */
- RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct;
+ RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = { 0 };
RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
RCC_PeriphCLKInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL;
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.h b/hw/bsp/stm32h7/boards/stm32h745disco/board.h
index d33e0c8eb..d7d3e8723 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.h
@@ -57,9 +57,9 @@
//--------------------------------------------------------------------+
static inline void board_stm32h7_clock_init(void)
{
- RCC_ClkInitTypeDef RCC_ClkInitStruct;
- RCC_OscInitTypeDef RCC_OscInitStruct;
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+ RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
/*!< Supply configuration update enable */
/* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */