Merge pull request #140 from hathach/develop

ported stm32f3, close #67

4 files changed, 57 insertions, 35 deletions

diff --git a/README.md b/README.md
index 732fcb26d..d6aed0b57 100644
--- a/README.md
+++ b/README.md
@@ -55,7 +55,7 @@ The stack supports the following MCUs
 - **Nordic:** nRF52840
 - **NXP:** LPC11Uxx, LPC13xx, LPC175x_6x, LPC177x_8x, LPC18xx, LPC40xx, LPC43xx, LPC51Uxx
 - **MicroChip:** SAMD21, SAMD51 (device only)
-- **ST:** STM32F0, STM32F4, STM32H7 (device only)
+- **ST:** STM32F0, STM32F3, STM32F4, STM32H7 (device only)
 
 [Here is the list of supported Boards](docs/boards.md)
 
diff --git a/docs/boards.md b/docs/boards.md
index 410104e54..8cb22788a 100644
--- a/docs/boards.md
+++ b/docs/boards.md
@@ -40,11 +40,13 @@ This code base already had supported for a handful of following boards
 - [Adafruit Metro M4 Express](https://www.adafruit.com/product/3382)
 
 ### ST STM32
-- [STM32F070RB Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f070rb.html)
-- [STM32F072b Discovery](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html)
-- [STM32F407g Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html)
-- [STM32F411e Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html)
-- [STM32F412g Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html)
+
+- [STM32F070rb Nucleo](https://www.st.com/en/evaluation-tools/nucleo-f070rb.html)
+- [STM32F072rb Discovery](https://www.st.com/en/evaluation-tools/32f072bdiscovery.html)
+- [STM32F303vc Discovery](https://www.st.com/en/evaluation-tools/stm32f3discovery.html)
+- [STM32F407vg Discovery](https://www.st.com/en/evaluation-tools/stm32f4discovery.html)
+- [STM32F411ve Discovery](https://www.st.com/en/evaluation-tools/32f411ediscovery.html)
+- [STM32F412zg Discovery](https://www.st.com/en/evaluation-tools/32f412gdiscovery.html)
 - [Nucleo H743zi](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html)
 
 ## Add your own board
diff --git a/hw/bsp/stm32f303disco/board.mk b/hw/bsp/stm32f303disco/board.mk
index f8f689a92..a214b1f14 100644
--- a/hw/bsp/stm32f303disco/board.mk
+++ b/hw/bsp/stm32f303disco/board.mk
@@ -2,7 +2,7 @@ CFLAGS += \
 	-DHSE_VALUE=8000000 \
 	-DSTM32F303xC \
 	-mthumb \
-	-mabi=aapcs-linux \
+	-mabi=aapcs \
 	-mcpu=cortex-m4 \
 	-mfloat-abi=hard \
 	-mfpu=fpv4-sp-d16 \
@@ -20,6 +20,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32f3xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32f3xx_hal_cortex.c \
 	$(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc.c \
+	$(ST_HAL_DRIVER)/Src/stm32f3xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32f3xx_hal_gpio.c
 
 SRC_S += \
diff --git a/hw/bsp/stm32f303disco/stm32f303disco.c b/hw/bsp/stm32f303disco/stm32f303disco.c
index 509110d7d..f5b3da899 100644
--- a/hw/bsp/stm32f303disco/stm32f303disco.c
+++ b/hw/bsp/stm32f303disco/stm32f303disco.c
@@ -37,16 +37,28 @@
 #define BUTTON_PIN            GPIO_PIN_0
 #define BUTTON_STATE_ACTIVE   1
 
-void board_init(void)
-{
-  #if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(SystemCoreClock / 1000);
-  #endif
 
-  /* Configure the system clock to 72 MHz */
+/**
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follow :
+  *            System Clock source            = PLL (HSE)
+  *            SYSCLK(Hz)                     = 72000000
+  *            HCLK(Hz)                       = 72000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 2
+  *            APB2 Prescaler                 = 1
+  *            HSE Frequency(Hz)              = 8000000
+  *            HSE PREDIV                     = 1
+  *            PLLMUL                         = RCC_PLL_MUL9 (9)
+  *            Flash Latency(WS)              = 2
+  * @param  None
+  * @retval None
+  */
+static void SystemClock_Config(void)
+{
   RCC_ClkInitTypeDef RCC_ClkInitStruct;
   RCC_OscInitTypeDef RCC_OscInitStruct;
+  RCC_PeriphCLKInitTypeDef  RCC_PeriphClkInit;
 
   /* Enable HSE Oscillator and activate PLL with HSE as source */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -57,14 +69,32 @@ void board_init(void)
   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
+  /* Configures the USB clock */
+  HAL_RCCEx_GetPeriphCLKConfig(&RCC_PeriphClkInit);
+  RCC_PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
+  HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit);
+
   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
-     clocks dividers */
+  clocks dividers */
   RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-  (void) HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+
+    /* Enable Power Clock */
+  __HAL_RCC_PWR_CLK_ENABLE();
+}
+
+void board_init(void)
+{
+  #if CFG_TUSB_OS  == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+  #endif
+
+  SystemClock_Config();
 
   // Notify runtime of frequency change.
   SystemCoreClockUpdate();
@@ -86,27 +116,16 @@ void board_init(void)
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
+  /* Configure USB DM and DP pins */
+  GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
+  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Alternate = GPIO_AF14_USB;
+  HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
-  // Start USB clock
+  // Enable USB clock
   __HAL_RCC_USB_CLK_ENABLE();
-
-#if 0
-  RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
-
-  // USB Pin Init
-  // PA9- VUSB, PA10- ID, PA11- DM, PA12- DP
-  // PC0- Power on
-  RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
-  GPIOA->MODER |= GPIO_MODER_MODE9_1 | GPIO_MODER_MODE10_1 | \
-    GPIO_MODER_MODE11_1 | GPIO_MODER_MODE12_1;
-  GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL9_Pos) | \
-    (10 << GPIO_AFRH_AFSEL10_Pos) | (10 << GPIO_AFRH_AFSEL11_Pos) | \
-    (10 << GPIO_AFRH_AFSEL12_Pos);
-
-  // Pullup required on ID, despite the manual claiming there's an
-  // internal pullup already (page 1245, Rev 17)
-  GPIOA->PUPDR |= GPIO_PUPDR_PUPD10_0;
-#endif
 }
 
 //--------------------------------------------------------------------+