summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorHiFiPhile <[email protected]>2025-11-24 00:17:58 +0100
committerHiFiPhile <[email protected]>2025-11-25 22:45:40 +0100
commita4d0df7fcf4ab39034b73c8641e669dcd277cb50 (patch)
treeb8933cbbc81e2dcdc70aa7b17ae9b1e24232d6cc
parentc785469881199b92b5ee8739d56ffe5aebcb6804 (diff)
bsp/stm32c0: use external clock, increase stack size
Signed-off-by: HiFiPhile <[email protected]>
-rw-r--r--hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld2
-rw-r--r--hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake1
-rw-r--r--hw/bsp/stm32c0/boards/stm32c071nucleo/board.h32
-rw-r--r--hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk2
-rw-r--r--hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf33
-rw-r--r--hw/bsp/stm32c0/family.cmake1
-rw-r--r--hw/bsp/stm32c0/stm32c0xx_hal_conf.h2
7 files changed, 50 insertions, 23 deletions
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld b/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld
index 8acd49f9d..6c7e203f1 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld
@@ -36,7 +36,7 @@
ENTRY(Reset_Handler)
_Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0xc00; /* required amount of stack */
/* Memories definition */
MEMORY
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake
index 2a319a73c..ed70cffbf 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake
@@ -2,6 +2,7 @@ set(MCU_VARIANT stm32c071xx)
set(JLINK_DEVICE stm32c071rb)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32C071RBTx_FLASH.ld)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32c071xx_flash.icf)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
index 751df2251..460b42a21 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
@@ -64,36 +64,30 @@
static inline void board_clock_init(void) {
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
- /* -1- Enable HSIUSB48 Oscillator */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
- RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
- /* -2- Initializes the CPU, AHB and APB buses clocks */
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSIUSB48;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
-
- __HAL_RCC_CRS_CLK_ENABLE();
-
- // Configures CRS
- RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
- RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
- RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
- RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
- RCC_CRSInitStruct.ErrorLimitValue = 34;
- RCC_CRSInitStruct.HSI48CalibrationValue = 32;
-
- HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSE;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
}
-
#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
index 67a9b59a8..fd22fc8d4 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
@@ -7,7 +7,7 @@ LD_FILE_GCC = $(BOARD_PATH)/STM32C071RBTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32c071xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32c071xx_flash.icf
+LD_FILE_IAR = $(BOARD_PATH)/stm32c071xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32c071rb
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf b/hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf
new file mode 100644
index 000000000..684f41dc6
--- /dev/null
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf
@@ -0,0 +1,33 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20005FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0xc00;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+
+export symbol __ICFEDIT_region_RAM_start__;
+export symbol __ICFEDIT_region_RAM_end__;
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index 90d5322b7..f68e80895 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -24,7 +24,6 @@ set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
set(LD_FILE_Clang ${LD_FILE_GNU})
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
#------------------------------------
# BOARD_TARGET
diff --git a/hw/bsp/stm32c0/stm32c0xx_hal_conf.h b/hw/bsp/stm32c0/stm32c0xx_hal_conf.h
index 678b6ee0d..874251c7f 100644
--- a/hw/bsp/stm32c0/stm32c0xx_hal_conf.h
+++ b/hw/bsp/stm32c0/stm32c0xx_hal_conf.h
@@ -92,7 +92,7 @@ extern "C" {
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
-#define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */
+#define HSE_VALUE (48000000U) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)