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authorValentyn Korniienko <[email protected]>2026-03-30 23:01:26 +0300
committerValentyn Korniienko <[email protected]>2026-03-30 23:01:26 +0300
commitb46cd6c21fcc2d5c24c4aa9075a5f517a2cdc2cd (patch)
treefa800d048c780d06513dd68ca2ce02fc3edc934f
parent9271250aed4e040fbcf536617b3b9472bd70c808 (diff)
Fixed HSI launch
-rw-r--r--hw/bsp/stm32h7/boards/stm32h743_weact/README.md7
-rw-r--r--hw/bsp/stm32h7/boards/stm32h743_weact/board.h92
2 files changed, 62 insertions, 37 deletions
diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/README.md b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md
new file mode 100644
index 000000000..2bf463fef
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md
@@ -0,0 +1,7 @@
+## How to quick setup
+
+1. python tools/get_deps.py -b stm32h743_weact
+2. cd examples/device/cdc_msc
+3. brew install --cask gcc-arm-embedded
+3. cmake -DBOARD=stm32h743_weact -B build -DCMAKE_BUILD_TYPE=Debug
+4. cmake --build build --parallel \ No newline at end of file
diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
index 38b224034..52ff12593 100644
--- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
@@ -41,7 +41,7 @@ extern "C" {
#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
// VBUS Sense detection
-#define OTG_FS_VBUS_SENSE 1
+#define OTG_FS_VBUS_SENSE 0
#define OTG_HS_VBUS_SENSE 0
#define PINID_LED 0
@@ -85,64 +85,82 @@ static inline void SystemClock_Config(void) {
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Supply configuration update enable
- */
+ */
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/** Configure the main internal regulator output voltage
- */
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ */
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
- while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+ while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = 1;
- RCC_OscInitStruct.PLL.PLLN = 100;
- RCC_OscInitStruct.PLL.PLLP = 2;
- RCC_OscInitStruct.PLL.PLLQ = 4;
- RCC_OscInitStruct.PLL.PLLR = 2;
- RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
- RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
- RCC_OscInitStruct.PLL.PLLFRACN = 0;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ RCC_OscInitStruct.PLL.PLLM = 5;
+ RCC_OscInitStruct.PLL.PLLN = 192;
+ RCC_OscInitStruct.PLL.PLLP = 2;
+ RCC_OscInitStruct.PLL.PLLQ = 15;
+ RCC_OscInitStruct.PLL.PLLR = 2;
+ RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
+ RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+ RCC_OscInitStruct.PLL.PLLFRACN = 0;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ {
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
- RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
+ |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+ {
Error_Handler();
}
// Initialize USB clock
+ // RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ // PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ // PeriphClkInitStruct.PLL3.PLL3M = 1;
+ // PeriphClkInitStruct.PLL3.PLL3N = 24;
+ // PeriphClkInitStruct.PLL3.PLL3P = 2;
+ // PeriphClkInitStruct.PLL3.PLL3Q = 4;
+ // PeriphClkInitStruct.PLL3.PLL3R = 2;
+ // PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_3;
+ // PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
+ // PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
+ // if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+ // //assert(false);
+ // Error_Handler();
+ // }
+
+ // Initialize USB clock from internal HSI
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInitStruct.PLL3.PLL3M = 1;
- PeriphClkInitStruct.PLL3.PLL3N = 24;
- PeriphClkInitStruct.PLL3.PLL3P = 2;
- PeriphClkInitStruct.PLL3.PLL3Q = 4;
- PeriphClkInitStruct.PLL3.PLL3R = 2;
- PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_3;
- PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
- PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ {
Error_Handler();
}
+
+ /** Enable USB Voltage detector
+ */
+ HAL_PWREx_EnableUSBVoltageDetector();
}
static inline void board_init2(void) {