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authorhathach <[email protected]>2023-06-02 10:19:46 +0700
committerhathach <[email protected]>2023-06-02 10:19:46 +0700
commitba3d71b615df1ba8dd5f8e4858a182620ef1472b (patch)
treeffc25f160c9674dbec01b9f6d8389aedc7657635
parentc3bde520cc0b93098fbf3a5d85b9343a2cfa6c3d (diff)
fix usb clock for dpow1
-rw-r--r--hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h50
1 files changed, 24 insertions, 26 deletions
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
index dcbc0163e..5d936d009 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -61,44 +61,38 @@ static inline void board_clock_init(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
// Configure the main internal regulator output voltage
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
- // Initializes the CPU, AHB and APB buses clocks
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
- RCC_OscInitStruct.PLL.PLLN = 50;
- RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
- RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+ /* Activate PLL with HSI as source */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+ RCC_OscInitStruct.PLL.PLLN = 85;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV10;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
// Initializes the CPU, AHB and APB buses clocks
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
+ RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8);
- PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
- PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
- HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) ;
-
-#if 0 // TODO need to check if USB clock is enabled
- /* Enable HSI48 */
- memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitStruct));
-
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
- RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
- HAL_RCC_OscConfig(&RCC_OscInitStruct);
+ //------------- HSI48 and CRS for USB -------------//
+ RCC_OscInitTypeDef osc_hsi48 = {0};
+ osc_hsi48.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
+ osc_hsi48.HSI48State = RCC_HSI48_ON;
+ osc_hsi48.PLL.PLLState = RCC_PLL_NONE;
+ HAL_RCC_OscConfig(&osc_hsi48);
/*Enable CRS Clock*/
RCC_CRSInitTypeDef RCC_CRSInitStruct= {0};
@@ -119,7 +113,11 @@ static inline void board_clock_init(void)
/* Start automatic synchronization */
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
-#endif
+
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
}
static inline void board_vbus_sense_init(void)