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authorhathach <[email protected]>2023-01-30 16:42:56 +0700
committerhathach <[email protected]>2023-01-30 16:42:56 +0700
commitcc1878447990aa01a99351cafe8bd899bd37b4e0 (patch)
tree545a03d2d30b12df33a1d4d1417d592bf2e9f84b
parentdf2ebe5d1a5da6b232704c2b6a35e66823f4127d (diff)
hardcoded configPRIO_BITS for IAR build to pass CI
-rw-r--r--examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h23
-rw-r--r--examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h23
-rw-r--r--src/tusb_option.h6
3 files changed, 35 insertions, 17 deletions
diff --git a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index efd527ed2..9bef9bbbf 100644
--- a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,8 +42,8 @@
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
-// skip if is compiled with assembler
-#if !defined(__ASSEMBLER__) && !defined(__IASMARM__)
+// skip if included from IAR assembler
+#ifndef __IASMARM__
// Include MCU header
#include "bsp/board_mcu.h"
@@ -149,10 +149,10 @@
#ifdef __RX__
/* Renesas RX series */
-#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
-#define vTickISR INT_Excep_CMT0_CMI0
-#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
-#define configKERNEL_INTERRUPT_PRIORITY 1
+#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
+#define vTickISR INT_Excep_CMT0_CMI0
+#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
+#define configKERNEL_INTERRUPT_PRIORITY 1
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
#else
@@ -168,10 +168,19 @@
#if defined(__NVIC_PRIO_BITS)
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h
#define configPRIO_BITS __NVIC_PRIO_BITS
+
#elif defined(__ECLIC_INTCTLBITS)
// RISC-V Bumblebee core from nuclei
#define configPRIO_BITS __ECLIC_INTCTLBITS
-#elif !defined(__ASSEMBLER__) && !defined(__IASMARM__)
+
+#elif defined(__IASMARM__)
+ // FIXME: IAR Assembler cannot include mcu header directly to get __NVIC_PRIO_BITS.
+ // Therefore we will hard coded it to minimum value of 2 to get pass ci build.
+ // IAR user must update this to correct value of the target MCU
+ #message "configPRIO_BITS is hard coded to 2 to pass IAR build only. User should update it per MCU"
+ #define configPRIO_BITS 2
+
+#else
#error "FreeRTOS configPRIO_BITS to be defined"
#endif
diff --git a/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h b/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
index efd527ed2..9bef9bbbf 100644
--- a/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/examples/device/hid_composite_freertos/src/FreeRTOSConfig/FreeRTOSConfig.h
@@ -42,8 +42,8 @@
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
-// skip if is compiled with assembler
-#if !defined(__ASSEMBLER__) && !defined(__IASMARM__)
+// skip if included from IAR assembler
+#ifndef __IASMARM__
// Include MCU header
#include "bsp/board_mcu.h"
@@ -149,10 +149,10 @@
#ifdef __RX__
/* Renesas RX series */
-#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
-#define vTickISR INT_Excep_CMT0_CMI0
-#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
-#define configKERNEL_INTERRUPT_PRIORITY 1
+#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
+#define vTickISR INT_Excep_CMT0_CMI0
+#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
+#define configKERNEL_INTERRUPT_PRIORITY 1
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
#else
@@ -168,10 +168,19 @@
#if defined(__NVIC_PRIO_BITS)
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h
#define configPRIO_BITS __NVIC_PRIO_BITS
+
#elif defined(__ECLIC_INTCTLBITS)
// RISC-V Bumblebee core from nuclei
#define configPRIO_BITS __ECLIC_INTCTLBITS
-#elif !defined(__ASSEMBLER__) && !defined(__IASMARM__)
+
+#elif defined(__IASMARM__)
+ // FIXME: IAR Assembler cannot include mcu header directly to get __NVIC_PRIO_BITS.
+ // Therefore we will hard coded it to minimum value of 2 to get pass ci build.
+ // IAR user must update this to correct value of the target MCU
+ #message "configPRIO_BITS is hard coded to 2 to pass IAR build only. User should update it per MCU"
+ #define configPRIO_BITS 2
+
+#else
#error "FreeRTOS configPRIO_BITS to be defined"
#endif
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 67377b7ec..cf5b21c9c 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -27,9 +27,6 @@
#ifndef _TUSB_OPTION_H_
#define _TUSB_OPTION_H_
-// To avoid GCC compiler warnings when -pedantic option is used (strict ISO C)
-typedef int make_iso_compilers_happy;
-
#include "common/tusb_compiler.h"
#define TUSB_VERSION_MAJOR 0
@@ -435,6 +432,9 @@ typedef int make_iso_compilers_happy;
#error Control Endpoint Max Packet Size cannot be larger than 64
#endif
+// To avoid GCC compiler warnings when -pedantic option is used (strict ISO C)
+typedef int make_iso_compilers_happy;
+
#endif /* _TUSB_OPTION_H_ */
/** @} */