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authorWilliam D. Jones <[email protected]>2019-01-11 10:20:14 -0500
committerWilliam D. Jones <[email protected]>2019-01-11 10:20:14 -0500
commite73e016a8c4fd58cc0f6ba0dbd4c71472e87d403 (patch)
treeb8028c3ec259dc612105e7283ee0555faf4debd4
parent75fda7d638f306ffc758aaaa1c56590ade6465f7 (diff)
bsp.stm32f407g_disc1: Initialize USB clock and pins.
-rw-r--r--hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c
index 8c47e2a3c..3c1ebc11f 100644
--- a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c
+++ b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c
@@ -58,11 +58,24 @@ void board_init(void)
// Init the LED on PD14
RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
- GPIOD->MODER = GPIO_MODER_MODE14_0;
+ GPIOD->MODER |= GPIO_MODER_MODE14_0;
// USB Clock init
+ // PLL input- 16 MHz (HSI clock)
+ // VCO input- 1 to 2 MHz (2 MHz, M = 8)
+ // VCO output- 100 to 432 MHz (144 MHz, N = 72)
+ // Main PLL out- <= 180 MHz (18 MHz, P = 8, not used; HSI used as system clk.)
+ // USB PLL out- 48 MHz (Q = 3)
+ RCC->PLLCFGR = (3 << RCC_PLLCFGR_PLLQ_Pos) | (8 << RCC_PLLCFGR_PLLP_Pos) \
+ | (72 << RCC_PLLCFGR_PLLN_Pos) | (8 << RCC_PLLCFGR_PLLM_Pos);
+ RCC->CR |= RCC_CR_PLLON;
+ RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
// USB Pin Init
+ // PA10- ID, PA11- DM, PA12- DP
+ // PC0- Power on
+ GPIOD->MODER |= GPIO_MODER_MODE10_1 | GPIO_MODER_MODE11_1 | GPIO_MODER_MODE12_1;
+ GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL10_Pos) | (10 << GPIO_AFRH_AFSEL11_Pos) | (10 << GPIO_AFRH_AFSEL12_Pos);
}