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authorhathach <[email protected]>2025-10-01 17:18:05 +0700
committerhathach <[email protected]>2025-10-01 17:18:05 +0700
commiteceb281f17bef1b98a0a20165ae681f186786ad1 (patch)
tree5591c508583bd754f06b874487f875f62015c639
parent13c240134ac0ce0d830e0257ca97d955e032ab93 (diff)
parent43e6c9dda7be1a38236989138e1e5693a50fb5ca (diff)
Merge branch 'master' into fork/ennebi/mtp
-rwxr-xr-x.github/workflows/ci_set_matrix.py2
-rw-r--r--README.rst2
-rw-r--r--docs/reference/boards.rst1
-rw-r--r--examples/build_system/make/make.mk4
-rw-r--r--examples/host/midi_rx/CMakePresets.json6
-rw-r--r--hw/bsp/BoardPresets.json520
-rw-r--r--hw/bsp/stm32u0/FreeRTOSConfig/FreeRTOSConfig.h149
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld176
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake12
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083cdk/board.h129
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083cdk/board.mk13
-rw-r--r--hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf32
-rw-r--r--hw/bsp/stm32u0/family.c182
-rw-r--r--hw/bsp/stm32u0/family.cmake117
-rw-r--r--hw/bsp/stm32u0/family.mk49
-rw-r--r--hw/bsp/stm32u0/stm32u0xx_hal_conf.h337
-rw-r--r--src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c1
-rw-r--r--src/portable/st/stm32_fsdev/fsdev_stm32.h6
-rwxr-xr-xtools/get_deps.py8
19 files changed, 1717 insertions, 29 deletions
diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 3559909ba..e53998c66 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -44,7 +44,7 @@ family_list = {
"stm32h7 stm32h7rs": ["arm-gcc", "arm-clang", "arm-iar"],
"stm32l0 stm32l4": ["arm-gcc", "arm-clang", "arm-iar"],
"stm32n6": ["arm-gcc"],
- "stm32u5 stm32wb": ["arm-gcc", "arm-clang", "arm-iar"],
+ "stm32u0 stm32u5 stm32wb": ["arm-gcc", "arm-clang", "arm-iar"],
"stm32wba": ["arm-gcc", "arm-clang"],
"xmc4000": ["arm-gcc"],
"-bespressif_s2_devkitc": ["esp-idf"],
diff --git a/README.rst b/README.rst
index 6b7e75bcf..a10bd9acb 100644
--- a/README.rst
+++ b/README.rst
@@ -212,6 +212,8 @@ Supported CPUs
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | N6 | ✔ | ✔ | ✔ | dwc2 | |
| +----+------------------------+--------+------+-----------+------------------------+-------------------+
+| | U0 | ✔ | ✖ | ✖ | stm32_fsdev | |
+| +----+------------------------+--------+------+-----------+------------------------+-------------------+
| | U5 | 535, 545 | ✔ | | ✖ | stm32_fsdev | |
| | +------------------------+--------+------+-----------+------------------------+-------------------+
| | | 575, 585 | ✔ | ✔ | ✖ | dwc2 | |
diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index 25542264c..3f8277247 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -299,6 +299,7 @@ stm32l4r5nucleo STM32 L4R5 Nucleo stm32l4 https://www.s
stm32n6570dk STM32 N6570-DK stm32n6 https://www.st.com/en/evaluation-tools/stm32n6570-dk.html
stm32n657nucleo STM32 N657X0-Q Nucleo stm32n6 https://www.st.com/en/evaluation-tools/nucleo-n657x0-q.html
b_u585i_iot2a STM32 B-U585i IOT2A Discovery kit stm32u5 https://www.st.com/en/evaluation-tools/b-u585i-iot02a.html
+stm32u083cdk STM32 U083C Discovery Kit stm32u0 https://www.st.com/en/evaluation-tools/stm32u083c-dk.html
stm32u545nucleo STM32 U545 Nucleo stm32u5 https://www.st.com/en/evaluation-tools/nucleo-u545re-q.html
stm32u575eval STM32 U575 Eval stm32u5 https://www.st.com/en/evaluation-tools/stm32u575i-ev.html
stm32u575nucleo STM32 U575 Nucleo stm32u5 https://www.st.com/en/evaluation-tools/nucleo-u575zi-q.html
diff --git a/examples/build_system/make/make.mk b/examples/build_system/make/make.mk
index f70748d34..4f5d3242e 100644
--- a/examples/build_system/make/make.mk
+++ b/examples/build_system/make/make.mk
@@ -134,8 +134,8 @@ endif
ifeq ($(LOGGER),rtt)
CFLAGS += -DLOGGER_RTT
#CFLAGS += -DSEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL
- INC += $(TOP)/$(lib/SEGGER_RTT)/RTT
- SRC_C += $(lib/SEGGER_RTT)/RTT/SEGGER_RTT.c
+ INC += $(TOP)/lib/SEGGER_RTT/RTT
+ SRC_C += lib/SEGGER_RTT/RTT/SEGGER_RTT.c
endif
ifeq ($(LOGGER),swo)
CFLAGS += -DLOGGER_SWO
diff --git a/examples/host/midi_rx/CMakePresets.json b/examples/host/midi_rx/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/midi_rx/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+ "version": 6,
+ "include": [
+ "../../../hw/bsp/BoardPresets.json"
+ ]
+}
diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 24da362da..335546837 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -13,30 +13,32 @@
}
},
{
- "name": "default single",
- "hidden": true,
- "description": "Configure preset for the ${presetName} board",
- "generator": "Ninja",
- "binaryDir": "${sourceDir}/build/${presetName}",
- "cacheVariables": {
- "BOARD": "${presetName}"
- }
- },
- {
"name": "adafruit_clue",
"inherits": "default"
},
{
"name": "adafruit_feather_esp32_v2",
- "inherits": "default single"
+ "inherits": "default"
+ },
+ {
+ "name": "adafruit_feather_esp32c6",
+ "inherits": "default"
},
{
"name": "adafruit_feather_esp32s2",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "adafruit_feather_esp32s3",
- "inherits": "default single"
+ "inherits": "default"
+ },
+ {
+ "name": "adafruit_feather_rp2040_usb_host",
+ "inherits": "default"
+ },
+ {
+ "name": "adafruit_fruit_jam",
+ "inherits": "default"
},
{
"name": "adafruit_magtag_29gray",
@@ -44,7 +46,11 @@
},
{
"name": "adafruit_metro_esp32s2",
- "inherits": "default single"
+ "inherits": "default"
+ },
+ {
+ "name": "adafruit_metro_rp2350",
+ "inherits": "default"
},
{
"name": "apard32690",
@@ -55,6 +61,50 @@
"inherits": "default"
},
{
+ "name": "at32f403a_weact_blackpill",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f402",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f403a",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f405",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f407",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f413",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f415",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f423",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f425",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f435",
+ "inherits": "default"
+ },
+ {
+ "name": "at_start_f437",
+ "inherits": "default"
+ },
+ {
"name": "atsamd21_xpro",
"inherits": "default"
},
@@ -140,39 +190,39 @@
},
{
"name": "espressif_addax_1",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_c3_devkitc",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_c6_devkitc",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_kaluga_1",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_p4_function_ev",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_s2_devkitc",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_s3_devkitc",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_s3_devkitm",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "espressif_saola_1",
- "inherits": "default single"
+ "inherits": "default"
},
{
"name": "f1c100s",
@@ -227,6 +277,10 @@
"inherits": "default"
},
{
+ "name": "frdm_mcxa156",
+ "inherits": "default"
+ },
+ {
"name": "frdm_mcxn947",
"inherits": "default"
},
@@ -411,6 +465,10 @@
"inherits": "default"
},
{
+ "name": "nanoch32v305",
+ "inherits": "default"
+ },
+ {
"name": "pca10056",
"inherits": "default"
},
@@ -483,6 +541,10 @@
"inherits": "default"
},
{
+ "name": "raspberry_pi_pico_w",
+ "inherits": "default"
+ },
+ {
"name": "raspberrypi_cm4",
"inherits": "default"
},
@@ -695,6 +757,18 @@
"inherits": "default"
},
{
+ "name": "stm32n6570dk",
+ "inherits": "default"
+ },
+ {
+ "name": "stm32n657nucleo",
+ "inherits": "default"
+ },
+ {
+ "name": "stm32u083cdk",
+ "inherits": "default"
+ },
+ {
"name": "stm32u545nucleo",
"inherits": "default"
},
@@ -715,6 +789,10 @@
"inherits": "default"
},
{
+ "name": "stm32wba_nucleo",
+ "inherits": "default"
+ },
+ {
"name": "teensy_35",
"inherits": "default"
},
@@ -759,6 +837,11 @@
"configurePreset": "adafruit_feather_esp32_v2"
},
{
+ "name": "adafruit_feather_esp32c6",
+ "description": "Build preset for the adafruit_feather_esp32c6 board",
+ "configurePreset": "adafruit_feather_esp32c6"
+ },
+ {
"name": "adafruit_feather_esp32s2",
"description": "Build preset for the adafruit_feather_esp32s2 board",
"configurePreset": "adafruit_feather_esp32s2"
@@ -769,6 +852,16 @@
"configurePreset": "adafruit_feather_esp32s3"
},
{
+ "name": "adafruit_feather_rp2040_usb_host",
+ "description": "Build preset for the adafruit_feather_rp2040_usb_host board",
+ "configurePreset": "adafruit_feather_rp2040_usb_host"
+ },
+ {
+ "name": "adafruit_fruit_jam",
+ "description": "Build preset for the adafruit_fruit_jam board",
+ "configurePreset": "adafruit_fruit_jam"
+ },
+ {
"name": "adafruit_magtag_29gray",
"description": "Build preset for the adafruit_magtag_29gray board",
"configurePreset": "adafruit_magtag_29gray"
@@ -779,6 +872,11 @@
"configurePreset": "adafruit_metro_esp32s2"
},
{
+ "name": "adafruit_metro_rp2350",
+ "description": "Build preset for the adafruit_metro_rp2350 board",
+ "configurePreset": "adafruit_metro_rp2350"
+ },
+ {
"name": "apard32690",
"description": "Build preset for the apard32690 board",
"configurePreset": "apard32690"
@@ -789,6 +887,61 @@
"configurePreset": "arduino_nano33_ble"
},
{
+ "name": "at32f403a_weact_blackpill",
+ "description": "Build preset for the at32f403a_weact_blackpill board",
+ "configurePreset": "at32f403a_weact_blackpill"
+ },
+ {
+ "name": "at_start_f402",
+ "description": "Build preset for the at_start_f402 board",
+ "configurePreset": "at_start_f402"
+ },
+ {
+ "name": "at_start_f403a",
+ "description": "Build preset for the at_start_f403a board",
+ "configurePreset": "at_start_f403a"
+ },
+ {
+ "name": "at_start_f405",
+ "description": "Build preset for the at_start_f405 board",
+ "configurePreset": "at_start_f405"
+ },
+ {
+ "name": "at_start_f407",
+ "description": "Build preset for the at_start_f407 board",
+ "configurePreset": "at_start_f407"
+ },
+ {
+ "name": "at_start_f413",
+ "description": "Build preset for the at_start_f413 board",
+ "configurePreset": "at_start_f413"
+ },
+ {
+ "name": "at_start_f415",
+ "description": "Build preset for the at_start_f415 board",
+ "configurePreset": "at_start_f415"
+ },
+ {
+ "name": "at_start_f423",
+ "description": "Build preset for the at_start_f423 board",
+ "configurePreset": "at_start_f423"
+ },
+ {
+ "name": "at_start_f425",
+ "description": "Build preset for the at_start_f425 board",
+ "configurePreset": "at_start_f425"
+ },
+ {
+ "name": "at_start_f435",
+ "description": "Build preset for the at_start_f435 board",
+ "configurePreset": "at_start_f435"
+ },
+ {
+ "name": "at_start_f437",
+ "description": "Build preset for the at_start_f437 board",
+ "configurePreset": "at_start_f437"
+ },
+ {
"name": "atsamd21_xpro",
"description": "Build preset for the atsamd21_xpro board",
"configurePreset": "atsamd21_xpro"
@@ -1004,6 +1157,11 @@
"configurePreset": "frdm_mcxa153"
},
{
+ "name": "frdm_mcxa156",
+ "description": "Build preset for the frdm_mcxa156 board",
+ "configurePreset": "frdm_mcxa156"
+ },
+ {
"name": "frdm_mcxn947",
"description": "Build preset for the frdm_mcxn947 board",
"configurePreset": "frdm_mcxn947"
@@ -1234,6 +1392,11 @@
"configurePreset": "nanoch32v203"
},
{
+ "name": "nanoch32v305",
+ "description": "Build preset for the nanoch32v305 board",
+ "configurePreset": "nanoch32v305"
+ },
+ {
"name": "pca10056",
"description": "Build preset for the pca10056 board",
"configurePreset": "pca10056"
@@ -1324,6 +1487,11 @@
"configurePreset": "raspberry_pi_pico2"
},
{
+ "name": "raspberry_pi_pico_w",
+ "description": "Build preset for the raspberry_pi_pico_w board",
+ "configurePreset": "raspberry_pi_pico_w"
+ },
+ {
"name": "raspberrypi_cm4",
"description": "Build preset for the raspberrypi_cm4 board",
"configurePreset": "raspberrypi_cm4"
@@ -1589,6 +1757,21 @@
"configurePreset": "stm32l4r5nucleo"
},
{
+ "name": "stm32n6570dk",
+ "description": "Build preset for the stm32n6570dk board",
+ "configurePreset": "stm32n6570dk"
+ },
+ {
+ "name": "stm32n657nucleo",
+ "description": "Build preset for the stm32n657nucleo board",
+ "configurePreset": "stm32n657nucleo"
+ },
+ {
+ "name": "stm32u083cdk",
+ "description": "Build preset for the stm32u083cdk board",
+ "configurePreset": "stm32u083cdk"
+ },
+ {
"name": "stm32u545nucleo",
"description": "Build preset for the stm32u545nucleo board",
"configurePreset": "stm32u545nucleo"
@@ -1614,6 +1797,11 @@
"configurePreset": "stm32wb55nucleo"
},
{
+ "name": "stm32wba_nucleo",
+ "description": "Build preset for the stm32wba_nucleo board",
+ "configurePreset": "stm32wba_nucleo"
+ },
+ {
"name": "teensy_35",
"description": "Build preset for the teensy_35 board",
"configurePreset": "teensy_35"
@@ -1682,6 +1870,19 @@
]
},
{
+ "name": "adafruit_feather_esp32c6",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "adafruit_feather_esp32c6"
+ },
+ {
+ "type": "build",
+ "name": "adafruit_feather_esp32c6"
+ }
+ ]
+ },
+ {
"name": "adafruit_feather_esp32s2",
"steps": [
{
@@ -1708,6 +1909,32 @@
]
},
{
+ "name": "adafruit_feather_rp2040_usb_host",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "adafruit_feather_rp2040_usb_host"
+ },
+ {
+ "type": "build",
+ "name": "adafruit_feather_rp2040_usb_host"
+ }
+ ]
+ },
+ {
+ "name": "adafruit_fruit_jam",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "adafruit_fruit_jam"
+ },
+ {
+ "type": "build",
+ "name": "adafruit_fruit_jam"
+ }
+ ]
+ },
+ {
"name": "adafruit_magtag_29gray",
"steps": [
{
@@ -1734,6 +1961,19 @@
]
},
{
+ "name": "adafruit_metro_rp2350",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "adafruit_metro_rp2350"
+ },
+ {
+ "type": "build",
+ "name": "adafruit_metro_rp2350"
+ }
+ ]
+ },
+ {
"name": "apard32690",
"steps": [
{
@@ -1760,6 +2000,149 @@
]
},
{
+ "name": "at32f403a_weact_blackpill",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at32f403a_weact_blackpill"
+ },
+ {
+ "type": "build",
+ "name": "at32f403a_weact_blackpill"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f402",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f402"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f402"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f403a",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f403a"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f403a"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f405",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f405"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f405"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f407",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f407"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f407"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f413",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f413"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f413"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f415",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f415"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f415"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f423",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f423"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f423"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f425",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f425"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f425"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f435",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f435"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f435"
+ }
+ ]
+ },
+ {
+ "name": "at_start_f437",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "at_start_f437"
+ },
+ {
+ "type": "build",
+ "name": "at_start_f437"
+ }
+ ]
+ },
+ {
"name": "atsamd21_xpro",
"steps": [
{
@@ -2319,6 +2702,19 @@
]
},
{
+ "name": "frdm_mcxa156",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "frdm_mcxa156"
+ },
+ {
+ "type": "build",
+ "name": "frdm_mcxa156"
+ }
+ ]
+ },
+ {
"name": "frdm_mcxn947",
"steps": [
{
@@ -2917,6 +3313,19 @@
]
},
{
+ "name": "nanoch32v305",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "nanoch32v305"
+ },
+ {
+ "type": "build",
+ "name": "nanoch32v305"
+ }
+ ]
+ },
+ {
"name": "pca10056",
"steps": [
{
@@ -3151,6 +3560,19 @@
]
},
{
+ "name": "raspberry_pi_pico_w",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "raspberry_pi_pico_w"
+ },
+ {
+ "type": "build",
+ "name": "raspberry_pi_pico_w"
+ }
+ ]
+ },
+ {
"name": "raspberrypi_cm4",
"steps": [
{
@@ -3840,6 +4262,45 @@
]
},
{
+ "name": "stm32n6570dk",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "stm32n6570dk"
+ },
+ {
+ "type": "build",
+ "name": "stm32n6570dk"
+ }
+ ]
+ },
+ {
+ "name": "stm32n657nucleo",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "stm32n657nucleo"
+ },
+ {
+ "type": "build",
+ "name": "stm32n657nucleo"
+ }
+ ]
+ },
+ {
+ "name": "stm32u083cdk",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "stm32u083cdk"
+ },
+ {
+ "type": "build",
+ "name": "stm32u083cdk"
+ }
+ ]
+ },
+ {
"name": "stm32u545nucleo",
"steps": [
{
@@ -3905,6 +4366,19 @@
]
},
{
+ "name": "stm32wba_nucleo",
+ "steps": [
+ {
+ "type": "configure",
+ "name": "stm32wba_nucleo"
+ },
+ {
+ "type": "build",
+ "name": "stm32wba_nucleo"
+ }
+ ]
+ },
+ {
"name": "teensy_35",
"steps": [
{
diff --git a/hw/bsp/stm32u0/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32u0/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..b63275276
--- /dev/null
+++ b/hw/bsp/stm32u0/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,149 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+ #include "stm32u0xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU 0
+#define configENABLE_FPU 0
+#define configENABLE_TRUSTZONE 0
+#define configMINIMAL_SECURE_STACK_SIZE (1024)
+
+#define configUSE_PREEMPTION 1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ SystemCoreClock
+#define configTICK_RATE_HZ ( 1000 )
+#define configMAX_PRIORITIES ( 5 )
+#define configMINIMAL_STACK_SIZE ( 200 )
+#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN 16
+#define configUSE_16_BIT_TICKS 0
+#define configIDLE_SHOULD_YIELD 1
+#define configUSE_MUTEXES 1
+#define configUSE_RECURSIVE_MUTEXES 1
+#define configUSE_COUNTING_SEMAPHORES 1
+#define configQUEUE_REGISTRY_SIZE 4
+#define configUSE_QUEUE_SETS 0
+#define configUSE_TIME_SLICING 0
+#define configUSE_NEWLIB_REENTRANT 0
+#define configENABLE_BACKWARD_COMPATIBILITY 1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
+
+#define configSUPPORT_STATIC_ALLOCATION 1
+#define configSUPPORT_DYNAMIC_ALLOCATION 0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK 0
+#define configUSE_TICK_HOOK 0
+#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW 2
+#define configCHECK_HANDLER_INSTALLATION 0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS 0
+#define configRECORD_STACK_HIGH_ADDRESS 1
+#define configUSE_TRACE_FACILITY 1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS 0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 0
+#define configMAX_CO_ROUTINE_PRIORITIES 2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS 1
+#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH 32
+#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet 0
+#define INCLUDE_uxTaskPriorityGet 0
+#define INCLUDE_vTaskDelete 0
+#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR 0
+#define INCLUDE_vTaskDelayUntil 1
+#define INCLUDE_vTaskDelay 1
+#define INCLUDE_xTaskGetSchedulerState 0
+#define INCLUDE_xTaskGetCurrentTaskHandle 1
+#define INCLUDE_uxTaskGetStackHighWaterMark 0
+#define INCLUDE_xTaskGetIdleTaskHandle 0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName 0
+#define INCLUDE_eTaskGetState 0
+#define INCLUDE_xEventGroupSetBitFromISR 0
+#define INCLUDE_xTimerPendFunctionCall 0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler PendSV_Handler
+#define xPortSysTickHandler SysTick_Handler
+#define vPortSVCHandler SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS 2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
+
+/* Interrupt priorities used by the kernel port layer itself. These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld b/hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld
new file mode 100644
index 000000000..c5ea72fb0
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+ ******************************************************************************
+ * @file LinkerScript.ld
+ * @author Auto-generated by STM32CubeIDE
+ * @brief Linker script for STM32U083MCTx Device from STM32U0 series
+ * 256KBytes FLASH
+ * 40KBytes RAM
+ *
+ * Set heap size, stack size and stack location according
+ * to application requirements.
+ *
+ * Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Memories definition */
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K
+ FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 256K
+}
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x800; /* required amount of stack */
+
+/* Sections */
+SECTIONS
+{
+ /* The startup code into "FLASH" Rom type memory */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* The program code and other data into "FLASH" Rom type memory */
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text) /* .text sections (code) */
+ *(.text*) /* .text* sections (code) */
+ *(.glue_7) /* glue arm to thumb code */
+ *(.glue_7t) /* glue thumb to arm code */
+ *(.eh_frame)
+
+ KEEP (*(.init))
+ KEEP (*(.fini))
+
+ . = ALIGN(4);
+ _etext = .; /* define a global symbols at end of code */
+ } >FLASH
+
+ /* Constant data into "FLASH" Rom type memory */
+ .rodata :
+ {
+ . = ALIGN(4);
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM.extab : {
+ . = ALIGN(4);
+ *(.ARM.extab* .gnu.linkonce.armextab.*)
+ . = ALIGN(4);
+ } >FLASH
+
+ .ARM : {
+ . = ALIGN(4);
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ . = ALIGN(4);
+ } >FLASH
+
+ .preinit_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__preinit_array_start = .);
+ KEEP (*(.preinit_array*))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .init_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT(.init_array.*)))
+ KEEP (*(.init_array*))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ .fini_array :
+ {
+ . = ALIGN(4);
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT(.fini_array.*)))
+ KEEP (*(.fini_array*))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ . = ALIGN(4);
+ } >FLASH
+
+ /* Used by the startup to initialize data */
+ _sidata = LOADADDR(.data);
+
+ /* Initialized data sections into "RAM" Ram type memory */
+ .data :
+ {
+ . = ALIGN(4);
+ _sdata = .; /* create a global symbol at data start */
+ *(.data) /* .data sections */
+ *(.data*) /* .data* sections */
+ *(.RamFunc) /* .RamFunc sections */
+ *(.RamFunc*) /* .RamFunc* sections */
+
+ . = ALIGN(4);
+ _edata = .; /* define a global symbol at data end */
+
+ } >RAM AT> FLASH
+
+ /* Uninitialized data section into "RAM" Ram type memory */
+ . = ALIGN(4);
+ .bss :
+ {
+ /* This is used by the startup in order to initialize the .bss section */
+ _sbss = .; /* define a global symbol at bss start */
+ __bss_start__ = _sbss;
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+
+ . = ALIGN(4);
+ _ebss = .; /* define a global symbol at bss end */
+ __bss_end__ = _ebss;
+ } >RAM
+
+ /* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
+ ._user_heap_stack :
+ {
+ . = ALIGN(8);
+ PROVIDE ( end = . );
+ PROVIDE ( _end = . );
+ . = . + _Min_Heap_Size;
+ . = . + _Min_Stack_Size;
+ . = ALIGN(8);
+ } >RAM
+
+ /* Remove information from the compiler libraries */
+ /DISCARD/ :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake b/hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake
new file mode 100644
index 000000000..945146810
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake
@@ -0,0 +1,12 @@
+set(MCU_VARIANT stm32u083xx)
+set(JLINK_DEVICE stm32u083mc)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32U083MCTx_FLASH.ld)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32u083xx_flash.icf)
+
+function(update_board TARGET)
+ target_compile_definitions(${TARGET} PUBLIC
+ STM32U083xx
+ CFG_EXAMPLE_VIDEO_READONLY
+ )
+endfunction()
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/board.h b/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
new file mode 100644
index 000000000..3030b1a1d
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
@@ -0,0 +1,129 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+ name: STM32U083C-DK Discovery Kit
+ url: https://www.st.com/en/evaluation-tools/stm32u083c-dk.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED - using PA5 (Blue LED from CubeMX)
+#define LED_PORT GPIOA
+#define LED_PIN GPIO_PIN_5
+#define LED_STATE_ON 1
+
+// Button - using PC2 (from CubeMX generated code)
+#define BUTTON_PORT GPIOC
+#define BUTTON_PIN GPIO_PIN_2
+#define BUTTON_STATE_ACTIVE 0 // Active low (pressed = 0)
+
+// UART - using USART2 on PA2/PA3 (VCP TX/RX from CubeMX)
+#define UART_DEV USART2
+#define UART_CLK_EN __HAL_RCC_USART2_CLK_ENABLE
+#define UART_GPIO_PORT GPIOA
+#define UART_GPIO_AF GPIO_AF7_USART2
+#define UART_TX_PIN GPIO_PIN_2
+#define UART_RX_PIN GPIO_PIN_3
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void board_stm32u0_clock_init(void)
+{
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
+ RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+ /** Configure the main internal regulator output voltage
+ */
+ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI48;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+ RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+ RCC_OscInitStruct.PLL.PLLN = 8;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+ RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
+ HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ |RCC_CLOCKTYPE_PCLK1;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
+
+ /** Enable the CRS clock
+ */
+ __HAL_RCC_CRS_CLK_ENABLE();
+
+ /** Configures CRS
+ */
+ RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+ RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+ RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+ RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
+ RCC_CRSInitStruct.ErrorLimitValue = 34;
+ RCC_CRSInitStruct.HSI48CalibrationValue = 32;
+ HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
+ PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
+
+ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+ PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
+}
+
+static inline void board_vbus_sense_init(void)
+{
+ // USB VBUS sensing not required for device-only operation
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/board.mk b/hw/bsp/stm32u0/boards/stm32u083cdk/board.mk
new file mode 100644
index 000000000..892854f54
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/board.mk
@@ -0,0 +1,13 @@
+MCU_VARIANT = stm32u083xx
+CFLAGS += \
+ -DSTM32U083xx
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/STM32U083MCTx_FLASH.ld
+LD_FILE_IAR = $(BOARD_PATH)/stm32u083xx_flash.icf
+
+# For flash-jlink target
+JLINK_DEVICE = STM32U083MC
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf b/hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf
new file mode 100644
index 000000000..cfaa305af
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf
@@ -0,0 +1,32 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x800;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
new file mode 100644
index 000000000..bf2503865
--- /dev/null
+++ b/hw/bsp/stm32u0/family.c
@@ -0,0 +1,182 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+ manufacturer: STMicroelectronics
+*/
+
+#include "stm32u0xx_hal.h"
+#include "bsp/board_api.h"
+#include "board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_DRD_FS_IRQHandler(void) {
+ tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+#ifdef UART_DEV
+UART_HandleTypeDef UartHandle;
+#endif
+
+void board_init(void) {
+ board_stm32u0_clock_init();
+
+ // Enable All GPIOs clocks
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+#ifdef GPIOD
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+#endif
+#ifdef GPIOE
+ __HAL_RCC_GPIOE_CLK_ENABLE();
+#endif
+#ifdef GPIOF
+ __HAL_RCC_GPIOF_CLK_ENABLE();
+#endif
+#ifdef GPIOG
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+#endif
+#ifdef GPIOH
+ __HAL_RCC_GPIOH_CLK_ENABLE();
+#endif
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ // LED
+ GPIO_InitTypeDef GPIO_InitStruct;
+ GPIO_InitStruct.Pin = LED_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
+
+ // Button
+ GPIO_InitStruct.Pin = BUTTON_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
+
+#ifdef UART_DEV
+ // UART
+ GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ GPIO_InitStruct.Alternate = UART_GPIO_AF;
+ HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
+
+ UART_CLK_EN();
+ UartHandle.Instance = UART_DEV;
+ UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
+ UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
+ UartHandle.Init.StopBits = UART_STOPBITS_1;
+ UartHandle.Init.Parity = UART_PARITY_NONE;
+ UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ UartHandle.Init.Mode = UART_MODE_TX_RX;
+ UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
+ HAL_UART_Init(&UartHandle);
+#endif
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+ // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+ NVIC_SetPriority(USB_DRD_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+ // USB Pins TODO double check USB clock and pin setup
+ // Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
+ GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF10_USB;
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+ // Enable VDDUSB
+ HAL_PWREx_EnableVddUSB();
+ // USB Clock enable
+ __HAL_RCC_USB_CLK_ENABLE();
+
+ board_vbus_sense_init();
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+ GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
+ HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
+}
+
+uint32_t board_button_read(void) {
+ return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
+}
+
+int board_uart_read(uint8_t* buf, int len) {
+#ifdef UART_DEV
+ (void) buf; (void) len;
+ return 0;
+#else
+ return 0;
+#endif
+}
+
+int board_uart_write(void const * buf, int len) {
+#ifdef UART_DEV
+ HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
+ return len;
+#else
+ (void) buf; (void) len;
+ return 0;
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void) {
+ system_ticks++;
+}
+
+uint32_t board_millis(void) {
+ return system_ticks;
+}
+#endif
+
+void HardFault_Handler(void) {
+ __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void) {
+
+}
diff --git a/hw/bsp/stm32u0/family.cmake b/hw/bsp/stm32u0/family.cmake
new file mode 100644
index 000000000..fefaea9de
--- /dev/null
+++ b/hw/bsp/stm32u0/family.cmake
@@ -0,0 +1,117 @@
+include_guard()
+
+set(ST_FAMILY u0)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis-device-${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32U0 CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+ if (TARGET ${BOARD_TARGET})
+ return()
+ endif()
+
+ # Startup & Linker script
+ set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+ set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+ set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+ string(REPLACE "stm32u" "STM32U" MCU_VARIANT_UPPER ${MCU_VARIANT})
+ if (NOT DEFINED LD_FILE_GNU)
+ set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
+ endif ()
+ set(LD_FILE_Clang ${LD_FILE_GNU})
+ if (NOT DEFINED LD_FILE_IAR)
+ set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+ endif ()
+
+ add_library(${BOARD_TARGET} STATIC
+ ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+ ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+ ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+ )
+ target_include_directories(${BOARD_TARGET} PUBLIC
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+ ${CMSIS_5}/CMSIS/Core/Include
+ ${ST_CMSIS}/Include
+ ${ST_HAL_DRIVER}/Inc
+ )
+ update_board(${BOARD_TARGET})
+
+ if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_GNU}"
+ -nostartfiles
+ --specs=nosys.specs --specs=nano.specs
+ )
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--script=${LD_FILE_Clang}"
+ )
+ elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+ target_link_options(${BOARD_TARGET} PUBLIC
+ "LINKER:--config=${LD_FILE_IAR}"
+ )
+ endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+ family_configure_common(${TARGET} ${RTOS})
+
+ # Board target
+ add_board_target(board_${BOARD})
+
+ #---------- Port Specific ----------
+ # These files are built for each example since it depends on example's tusb_config.h
+ target_sources(${TARGET} PUBLIC
+ # BSP
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+ )
+ target_include_directories(${TARGET} PUBLIC
+ # family, hw, board
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+ ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+ )
+
+ # Add TinyUSB target and port source
+ family_add_tinyusb(${TARGET} OPT_MCU_STM32U0)
+ target_sources(${TARGET} PUBLIC
+ ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+ )
+ target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+
+
+ # Flashing
+ family_add_bin_hex(${TARGET})
+ family_flash_stlink(${TARGET})
+ family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32u0/family.mk b/hw/bsp/stm32u0/family.mk
new file mode 100644
index 000000000..02e0bb792
--- /dev/null
+++ b/hw/bsp/stm32u0/family.mk
@@ -0,0 +1,49 @@
+ST_FAMILY = u0
+ST_CMSIS = hw/mcu/st/cmsis-device-$(ST_FAMILY)
+ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
+
+CFLAGS += \
+ -DCFG_EXAMPLE_MSC_READONLY \
+ -DCFG_EXAMPLE_VIDEO_READONLY \
+ -DCFG_TUSB_MCU=OPT_MCU_STM32U0
+
+# mcu driver cause following warnings
+CFLAGS_GCC += \
+ -flto \
+ -Wno-error=unused-parameter \
+ -Wno-error=redundant-decls \
+ -Wno-error=cast-align \
+ -Wno-error=maybe-uninitialized \
+
+CFLAGS_CLANG += \
+ -Wno-error=parentheses-equality
+
+LDFLAGS_GCC += \
+ -nostdlib -nostartfiles \
+ --specs=nosys.specs --specs=nano.specs
+
+SRC_C += \
+ src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+ $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
+ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
+ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
+ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
+ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
+ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
+ $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
+
+INC += \
+ $(TOP)/$(BOARD_PATH) \
+ $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+ $(TOP)/$(ST_CMSIS)/Include \
+ $(TOP)/$(ST_HAL_DRIVER)/Inc
+
+# Startup
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
+
+# Linker
+LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32u0/stm32u0xx_hal_conf.h b/hw/bsp/stm32u0/stm32u0xx_hal_conf.h
new file mode 100644
index 000000000..ece5baf69
--- /dev/null
+++ b/hw/bsp/stm32u0/stm32u0xx_hal_conf.h
@@ -0,0 +1,337 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file stm32u0xx_hal_conf.h
+ * @author MCD Application Team
+ * @brief HAL configuration file.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32U0xx_HAL_CONF_H
+#define __STM32U0xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+ * @brief This is the list of modules to be used in the HAL driver
+ */
+
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED */
+/* #define HAL_COMP_MODULE_ENABLED */
+/* #define HAL_CRC_MODULE_ENABLED */
+/* #define HAL_CRS_MODULE_ENABLED */
+/* #define HAL_CRYP_MODULE_ENABLED */
+/* #define HAL_DAC_MODULE_ENABLED */
+/* #define HAL_I2C_MODULE_ENABLED */
+/* #define HAL_IRDA_MODULE_ENABLED */
+/* #define HAL_IWDG_MODULE_ENABLED */
+/* #define HAL_LCD_MODULE_ENABLED */
+/* #define HAL_LPTIM_MODULE_ENABLED */
+/* #define HAL_OPAMP_MODULE_ENABLED */
+#define HAL_PCD_MODULE_ENABLED
+/* #define HAL_RNG_MODULE_ENABLED */
+/* #define HAL_RTC_MODULE_ENABLED */
+/* #define HAL_SPI_MODULE_ENABLED */
+/* #define HAL_SMARTCARD_MODULE_ENABLED */
+/* #define HAL_TIM_MODULE_ENABLED */
+/* #define HAL_TSC_MODULE_ENABLED */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED */
+/* #define HAL_WWDG_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSE is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE 4000000U /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSE_STARTUP_TIMEOUT)
+ #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI_VALUE)
+ #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI_VALUE */
+
+/**
+ * @brief Internal Multiple Speed oscillator (MSI) default value.
+ * This value is the default MSI range value after Reset.
+ */
+#if !defined (MSI32_VALUE)
+#define MSI32_VALUE 32000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* MSI32_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI) value.
+ * This value is used by the RCC HAL module to compute the system frequency
+ * (when HSI is used as system clock source, directly or through the PLL).
+ */
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
+ * This internal oscillator is mainly dedicated to provide a high precision clock to
+ * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ * which is subject to manufacturing process variations.
+ */
+#if !defined (HSI48_VALUE)
+ #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
+ The real value my vary depending on manufacturing process variations.*/
+#endif /* HSI48_VALUE */
+
+/**
+ * @brief Internal Low Speed oscillator (LSI) value.
+ */
+#if !defined (LSI_VALUE)
+ #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
+ The real value may vary depending on the variations
+ in voltage and temperature.*/
+/**
+ * @brief External Low Speed oscillator (LSE) value.
+ * This value is used by the UART, RTC HAL module to compute the system frequency
+ */
+#if !defined (LSE_VALUE)
+ #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+ === you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+ * @brief This is the HAL system configuration section
+ */
+
+#define VDD_VALUE 3300U /*!< Value of VDD in mv */
+#define TICK_INT_PRIORITY (3U) /*!< tick interrupt priority (lowest by default) */
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 0U
+#define INSTRUCTION_CACHE_ENABLE 1U
+
+/* ########################## Assert Selection ############################## */
+/**
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the
+ * HAL drivers code
+ */
+
+/* #define USE_FULL_ASSERT 1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+ * @brief Set below the peripheral configuration to "1U" to add the support
+ * of HAL callback registration/unregistration feature for the HAL
+ * driver(s). This allows user application to provide specific callback
+ * functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+ * the default weak callback functions (see each stm32u0xx_hal_ppp.h file
+ * for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+ * for each PPP peripheral).
+ */
+#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
+#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */
+#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
+#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
+#define USE_HAL_IWDG_REGISTER_CALLBACKS 0U /* IWDG register callback disabled */
+#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */
+#define USE_HAL_LCD_REGISTER_CALLBACKS 0U /* LCD register callback disabled */
+#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
+#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */
+#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
+#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
+#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
+#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
+#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
+#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+ * @brief Include module's header file
+ */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32u0xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32u0xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32u0xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32u0xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32u0xx_hal_adc.h"
+#include "stm32u0xx_hal_adc_ex.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_COMP_MODULE_ENABLED
+#include "stm32u0xx_hal_comp.h"
+#endif /* HAL_COMP_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32u0xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRS_MODULE_ENABLED
+#include "stm32u0xx_ll_crs.h"
+#endif /* HAL_CRS_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32u0xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DAC_MODULE_ENABLED
+#include "stm32u0xx_hal_dac.h"
+#endif /* HAL_DAC_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32u0xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include "stm32u0xx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32u0xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32u0xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32u0xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+#include "stm32u0xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_OPAMP_MODULE_ENABLED
+#include "stm32u0xx_hal_opamp.h"
+#endif /* HAL_OPAMP_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32u0xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32u0xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32u0xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32u0xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32u0xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_TSC_MODULE_ENABLED
+#include "stm32u0xx_ll_system.h"
+#include "stm32u0xx_hal_tsc.h"
+#endif /* HAL_TSC_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32u0xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32u0xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32u0xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32u0xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32u0xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_LCD_MODULE_ENABLED
+#include "stm32u0xx_hal_lcd.h"
+#endif /* HAL_LCD_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32u0xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef USE_FULL_ASSERT
+/**
+ * @brief The assert_param macro is used for function's parameters check.
+ * @param expr: If expr is false, it calls assert_failed function
+ * which reports the name of the source file and the source
+ * line number of the call that failed.
+ * If expr is true, it returns no value.
+ * @retval None
+ */
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+ void assert_failed(uint8_t *file, uint32_t line);
+#else
+ #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32U0xx_HAL_CONF_H */
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 3b9825e25..ed823a832 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -678,6 +678,7 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
btable_set_addr(ep_idx, 1, pma_addr2);
#else
btable_set_addr(ep_idx, dir == TUSB_DIR_IN ? BTABLE_BUF_TX : BTABLE_BUF_RX, pma_addr);
+ (void) pma_addr2;
#endif
xfer_ctl_t* xfer = xfer_ctl_ptr(ep_num, dir);
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 95f40269a..63b50f13d 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -200,8 +200,10 @@
#elif CFG_TUSB_MCU == OPT_MCU_STM32U0
#include "stm32u0xx.h"
- #define FSDEV_PMA_SIZE (2048u)
- #define FSDEV_HAS_SBUF_ISO 1
+ #define FSDEV_PMA_SIZE (1024u)
+ #define FSDEV_BUS_32BIT
+ // Disable SBUF_ISO on U0 for now due to bad performance (audio glitching)
+ #define FSDEV_HAS_SBUF_ISO 0
#define USB USB_DRD_FS
#define USB_EP_CTR_RX USB_EP_VTRX
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 0828140c1..36ed98a62 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -124,6 +124,9 @@ deps_optional = {
'hw/mcu/st/cmsis_device_n6': ['https://github.com/STMicroelectronics/cmsis-device-n6.git',
'7bcdc944fbf7cf5928d3c1d14054ca13261d33ec',
'stm32n6'],
+ 'hw/mcu/st/cmsis-device-u0': ['https://github.com/STMicroelectronics/cmsis-device-u0.git',
+ 'e3a627c6a5bc4eb2388e1885a95cc155e1672253',
+ 'stm32u0'],
'hw/mcu/st/cmsis_device_u5': ['https://github.com/STMicroelectronics/cmsis_device_u5.git',
'6e67187dec98035893692ab2923914cb5f4e0117',
'stm32u5'],
@@ -190,6 +193,9 @@ deps_optional = {
'hw/mcu/st/stm32n6xx_hal_driver': ['https://github.com/STMicroelectronics/stm32n6xx-hal-driver.git',
'bc6c41f8f67d61b47af26695d0bf67762a000666',
'stm32n6'],
+ 'hw/mcu/st/stm32u0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32u0xx-hal-driver.git',
+ 'cbfb5ac654256445237fd32b3587ac6a238d24f1',
+ 'stm32u0'],
'hw/mcu/st/stm32u5xx_hal_driver': ['https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git',
'2c5e2568fbdb1900a13ca3b2901fdd302cac3444',
'stm32u5'],
@@ -240,7 +246,7 @@ deps_optional = {
'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '
'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
- 'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32n6 stm32u5 stm32wb stm32wba'
+ 'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32n6 stm32u0 stm32u5 stm32wb stm32wba'
'sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg '
'tm4c '],
'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',