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authorhathach <[email protected]>2023-05-08 19:43:48 +0700
committerhathach <[email protected]>2023-05-08 19:43:48 +0700
commitfd50be2e626fc606b6c367e42a6f0f6867f76322 (patch)
treef8c9272b30517481bb4c394e99e2da8a787e9fe8
parent4fc4f35a8af6465eb2137f765e994de1029e9c5a (diff)
change imxrt board_uart_read() to non-blocking
simple host seems to work
-rw-r--r--hw/bsp/imxrt/family.c77
1 files changed, 42 insertions, 35 deletions
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index b009b27e1..6c4b0706b 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -54,6 +54,21 @@ const uint8_t dcd_data[] = { 0x00 };
//
//--------------------------------------------------------------------+
+static void init_usb_phy(USBPHY_Type* usb_phy) {
+ // Enable PHY support for Low speed device + LS via FS Hub
+ usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
+
+ // Enable all power for normal operation
+ // TODO may not be needed since it is called within CLOCK_EnableUsbhs0PhyPllClock()
+ usb_phy->PWD = 0;
+
+ // TX Timing
+ uint32_t phytx = usb_phy->TX;
+ phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
+ phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
+ usb_phy->TX = phytx;
+}
+
void board_init(void)
{
// make sure the dcache is on.
@@ -117,52 +132,24 @@ void board_init(void)
LPUART_Init(UART_PORT, &uart_config, freq);
- //------------- USB0 -------------//
+ //------------- USB -------------//
+ // Note: RT105x RT106x and later have dual USB controllers.
// Clock
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U);
- USBPHY_Type* usb_phy;
-
- // RT105x RT106x have dual USB controller.
#ifdef USBPHY1
- usb_phy = USBPHY1;
+ init_usb_phy(USBPHY1);
#else
- usb_phy = USBPHY;
+ init_usb_phy(USBPHY);
#endif
- // Enable PHY support for Low speed device + LS via FS Hub
- usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
-
- // Enable all power for normal operation
- usb_phy->PWD = 0;
-
- // TX Timing
- uint32_t phytx = usb_phy->TX;
- phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
- phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
- usb_phy->TX = phytx;
-
- // RT105x RT106x have dual USB controller.
#ifdef USBPHY2
// USB1
CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U);
CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U);
-
- usb_phy = USBPHY2;
-
- // Enable PHY support for Low speed device + LS via FS Hub
- usb_phy->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
-
- // Enable all power for normal operation
- usb_phy->PWD = 0;
-
- // TX Timing
- phytx = usb_phy->TX;
- phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
- phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
- usb_phy->TX = phytx;
+ init_usb_phy(USBPHY2);
#endif
}
@@ -208,8 +195,28 @@ uint32_t board_button_read(void)
int board_uart_read(uint8_t* buf, int len)
{
- LPUART_ReadBlocking(UART_PORT, buf, len);
- return len;
+ int count = 0;
+
+ while( count < len )
+ {
+ uint8_t const rx_count = LPUART_GetRxFifoCount(UART_PORT);
+ if (!rx_count)
+ {
+ // clear all error flag if any
+ uint32_t status_flags = LPUART_GetStatusFlags(UART_PORT);
+ status_flags &= (kLPUART_RxOverrunFlag | kLPUART_ParityErrorFlag | kLPUART_FramingErrorFlag | kLPUART_NoiseErrorFlag);
+ LPUART_ClearStatusFlags(UART_PORT, status_flags);
+ break;
+ }
+
+ for(int i=0; i<rx_count; i++)
+ {
+ buf[count] = LPUART_ReadByte(UART_PORT);
+ count++;
+ }
+ }
+
+ return count;
}
int board_uart_write(void const * buf, int len)