diff options
| author | Ha Thach <[email protected]> | 2026-04-03 16:45:26 +0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-04-03 16:45:26 +0700 |
| commit | ff8e6cce6ef0df8b86366b487f32defca1600532 (patch) | |
| tree | 03908e5741a6fa8552dc855ca39d3c2f57634c4e | |
| parent | b3d34cdf8962186d326dadf50421bb85f488c80a (diff) | |
| parent | ffa539256638200b2653e4cad0c6fee08b797ab8 (diff) | |
Merge pull request #3586 from felhub/master
fix uart pin init for teensy
| -rw-r--r-- | hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c | 8 | ||||
| -rw-r--r-- | hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c index 4c16be993..b873e2a8b 100644 --- a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c +++ b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c @@ -102,10 +102,10 @@ BOARD_InitDEBUG_UARTPins: void BOARD_InitDEBUG_UARTPins(void) { CLOCK_EnableClock(kCLOCK_Iomuxc); - IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U); - IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x10B0U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x10B0U); } diff --git a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c index 4c16be993..b873e2a8b 100644 --- a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c +++ b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c @@ -102,10 +102,10 @@ BOARD_InitDEBUG_UARTPins: void BOARD_InitDEBUG_UARTPins(void) { CLOCK_EnableClock(kCLOCK_Iomuxc); - IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U); - IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U); - IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0U); + IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x10B0U); + IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x10B0U); } |