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authorhathach <[email protected]>2026-06-15 16:48:40 +0700
committerhathach <[email protected]>2026-06-15 22:08:41 +0700
commitd4eeaf10cb1a95b6b74e18cd933c6320d31c2031 (patch)
tree397bf6035b3c38bc30b8b36d0e00f66a4fe46778 /docs/_static
parent9562f54f95da485c17192b07a9b2cc21126c8ef1 (diff)
dcd/musb: extract pipe0_process_status_isr() to de-dup EP0 tail paths
The deferral (RXRDY-combined) and csrl==0 tail paths in process_ep0_isr ran the same per-state status-stage logic. Move all of it into one pipe0_process_status_isr() helper covering every state including DATA_IN, which picks STATUS_OUT vs STATUS_OUT_PENDING_IRQ from deferred_setup_valid (a deferred SETUP means the status confirm was coalesced with it). Both callers now just invoke the helper; the deferral path saves the SETUP and sets deferred_setup_valid first. Also drops the deferral path's TU_ASSERT(remain_wlength == 0), which was wrong for a short last DATA-IN packet, and renames pipe0_process_deferred_setup -> pipe0_try_deferred_setup (it no-ops when nothing is deferred). Verified: HIL pass on ek_tm4c123gxl and max32666fthr (13/13 each), including the #3643 high-CPU-load IRQ-toggle coalescing stress. Co-Authored-By: Claude Fable 5 <[email protected]>
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