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| author | Ha Thach <[email protected]> | 2026-06-04 21:19:17 +0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-06-04 21:19:17 +0700 |
| commit | a105f9d099fe4f4f3dd35157798d6bc0928591bb (patch) | |
| tree | b7e1a80456bc8a8331537c137f35522c5d0fb5c6 /docs/reference/device_issues.rst | |
| parent | ac32feafeb2fb0f6cc5c3010d32db319ff15ca64 (diff) | |
| parent | e2100b44d302d71401119de80d8a64a0d066e4ce (diff) | |
Merge pull request #3653 from hathach/ch32_warning
add device specific issues
Diffstat (limited to 'docs/reference/device_issues.rst')
| -rw-r--r-- | docs/reference/device_issues.rst | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/docs/reference/device_issues.rst b/docs/reference/device_issues.rst new file mode 100644 index 000000000..ae9cd55f1 --- /dev/null +++ b/docs/reference/device_issues.rst @@ -0,0 +1,35 @@ +Device specific known issues and workarounds +=============================================== +This page lists known issues and workarounds for specific devices. + +NXP LPC54600 +---------------- +**Severity: High** + +**Not recommended for USB device applications (except high-speed host controller)** + +Reference: `LPC54600 Errata Sheet`_ + +.. _LPC54600 Errata Sheet: https://www.nxp.com/docs/en/errata/ES_LPC546XX.pdf + +The LPC54600 series have a very buggy USB controller, with 17 issues listed in the errata which is more than half of the total issues. + +Most severe issues are: + +- USB.2: In USB high-speed device mode, the NBytes field is not correct after BULK IN transfer +- USB.5: In USB full-speed host mode, linked list on done queue is broken. +- USB.15: USB high-speed device in endpoint TX data corruption + +WCH CH32F20x/CH32V20x/CH32V30x +--------------------------------- +**Severity: Medium** + +**Not recommended for USB audio applications** + +Reference: `CH32V30X Reference Manual`_ USBFS/USBHS controller chapter + +.. _CH32V30X Reference Manual: https://www.wch-ic.com/downloads/CH32FV2x_V3xRM_PDF.html + +Data corruption may occur on isochronous endpoints. Due to the lacking of FIFO for interrupt status registers, later completed transfer will overwrite `INT_ST` and `RX_LEN` register if previous transfer processing is not completed. + +Other types of transfers are not affected. |
