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| author | Tom Peterson <[email protected]> | 2022-02-25 12:39:09 -0600 |
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| committer | Tom Peterson <[email protected]> | 2022-02-25 12:39:09 -0600 |
| commit | 39fdbc8ffca3cb0a610ce4140e1d527beb47ad3d (patch) | |
| tree | 8ba2ad8345ba3da2978b721b995ceb2e5b3fc2b8 /docs | |
| parent | b797d1aa50310a46d430ff0efd66d7e88028de3b (diff) | |
Updated the clearing of the status register bits to use a straight '=', rather than an '|='. Use of the latter caused an extra, unwanted read of the status register before the write-to-clear operation, which, in some cases, allowed new status bits to assert (relative to the initial read of the status register two statements earlier), and then be cleared blindly and unconditionally during the write-back. This had the potential (and, in my case, observed) effect of dropping the handling of an enabled interrupt. Ultimately, the system would lock up in a busy state, with no hope of clearing the condition. See Issue #1339 for more information.
Diffstat (limited to 'docs')
0 files changed, 0 insertions, 0 deletions
