diff options
| author | Zhihong Chen <[email protected]> | 2025-12-08 17:14:12 +0800 |
|---|---|---|
| committer | Zhihong Chen <[email protected]> | 2025-12-16 13:08:30 +0800 |
| commit | 6b73d786b3ddddcb1fbed51909095a46d68d2449 (patch) | |
| tree | 17a72052c5f71e5ad6bea5ae14828163551ab6a7 /examples/build_system/make/cpu | |
| parent | ba3319d90d546143d169b398166b457082ad21d4 (diff) | |
update risc-v march for gcc and clang toolchains
- add `zifencei` option
Signed-off-by: Zhihong Chen <[email protected]>
Diffstat (limited to 'examples/build_system/make/cpu')
| -rw-r--r-- | examples/build_system/make/cpu/rv32imac-ilp32.mk | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/examples/build_system/make/cpu/rv32imac-ilp32.mk b/examples/build_system/make/cpu/rv32imac-ilp32.mk index 19c322ebc..a7b2258d7 100644 --- a/examples/build_system/make/cpu/rv32imac-ilp32.mk +++ b/examples/build_system/make/cpu/rv32imac-ilp32.mk @@ -1,11 +1,11 @@ ifeq ($(TOOLCHAIN),gcc) CFLAGS += \ - -march=rv32imac_zicsr \ + -march=rv32imac_zicsr_zifencei \ -mabi=ilp32 \ else ifeq ($(TOOLCHAIN),clang) CFLAGS += \ - -march=rv32imac_zicsr \ + -march=rv32imac_zicsr_zifencei \ -mabi=ilp32 \ else ifeq ($(TOOLCHAIN),iar) |
