diff options
| author | hathach <[email protected]> | 2018-11-23 15:28:32 +0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2018-11-23 15:28:32 +0700 |
| commit | a1c596490aa40863cd5f1e36a821157ffeab2af6 (patch) | |
| tree | c8246e10d303414f222a5ba15480c04010240c8e /examples/device/device_virtual_com/src | |
| parent | 2edfd5b555388d10a9013eb598c9a73a4ee1afa9 (diff) | |
| parent | 394a22ecf7760cce630a8186260f1c79901af934 (diff) | |
Merge pull request #13 from hathach/devlocal
add unplugged event for nrf5x
Diffstat (limited to 'examples/device/device_virtual_com/src')
| -rw-r--r-- | examples/device/device_virtual_com/src/tusb_config.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/examples/device/device_virtual_com/src/tusb_config.h b/examples/device/device_virtual_com/src/tusb_config.h index f7cde7848..fd3f41b01 100644 --- a/examples/device/device_virtual_com/src/tusb_config.h +++ b/examples/device/device_virtual_com/src/tusb_config.h @@ -93,36 +93,36 @@ #ifdef __CODE_RED // compiled with lpcxpresso #if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX) - #define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned + #define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM2) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned #elif CFG_TUSB_MCU == OPT_MCU_LPC175X_6X - #define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all + #define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.data.$RAM3) + #define CFG_TUSB_MEM_SECTION ATTR_SECTION(.data.$RAM3) #endif #elif defined __CC_ARM // Compiled with Keil armcc, USBRAM_SECTION is defined in scatter files #if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX) - #define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned + #define CFG_TUSB_MEM_SECTION ATTR_SECTION(USBRAM_SECTION) ATTR_ALIGNED(64) // lp11u & lp13u requires data to be 64 byte aligned #elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X) - #define CFG_TUSB_ATTR_USBRAM // LPC17xx USB DMA can access all address + #define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_ATTR_USBRAM // Use keil tool configure to have AHB SRAM as default memory + #define CFG_TUSB_MEM_SECTION // Use keil tool configure to have AHB SRAM as default memory #endif #elif defined __ICCARM__ // compiled with IAR #if (CFG_TUSB_MCU == OPT_MCU_LPC11UXX) || (CFG_TUSB_MCU == OPT_MCU_LPC13UXX) - #define CFG_TUSB_ATTR_USBRAM _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64) + #define CFG_TUSB_MEM_SECTION _Pragma("location=\"USB_PACKET_MEMORY\"") ATTR_ALIGNED(64) #elif (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X) - #define CFG_TUSB_ATTR_USBRAM + #define CFG_TUSB_MEM_SECTION #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_ATTR_USBRAM _Pragma("location=\".ahb_sram1\"") + #define CFG_TUSB_MEM_SECTION _Pragma("location=\".ahb_sram1\"") #endif #elif defined __SES_ARM -#define CFG_TUSB_ATTR_USBRAM ATTR_SECTION(.bss2) +#define CFG_TUSB_MEM_SECTION ATTR_SECTION(.bss2) #else |