dcd/ch58x: complete the EP register map and right-size EP buffers

Tidy the CH58x register/buffer layout the initial port left rough.

Register map (USBOTG_FS_TypeDef):
- Extend the struct to the full CH583/582 datasheet Table 17-2 map instead of
  stopping at UEP567_MOD (0x0E) with the per-endpoint registers living only in
  raw-address macros.
- Express the per-endpoint DMA/length/control registers as arrays of 4-byte
  slots (ch58x_ep_dma_t / ch58x_ep_ctrl_t): EP0-3 DMA at 0x10, EP0-4 ctrl at
  0x20, EP5-7 DMA/ctrl split to 0x54/0x64 (EP4 has no DMA register of its own;
  it shares EP0's). TU_VERIFY_STATIC pins the slot sizes and block offsets, so
  the EP_TX_LEN/EP_CTRL/EP_DMA macros walk each block by the 4-byte stride
  (pointer arithmetic off slot 0, so the unused ternary branch can't trip
  -Warray-bounds).
- Gate the two driver sites on CFG_TUSB_MCU == OPT_MCU_CH58X directly rather
  than the CH32_USBFS_EP_REGS_CUSTOM alias, which was only ever defined in the
  CH58x branch.

EP buffers (the data struct):
- Replace buffer[EP_MAX][2][64] on CH58x with named per-endpoint buffers: EP0/EP4
  use the dedicated 192B ep0_ep4_buffer, so the old array left buffer[0]/buffer[4]
  allocated-but-unused.
- Drop EP3's oversized iso buffer (out[64] + in[1023]); EP3 is bulk-only on CH58x,
  so it uses a plain 128-byte buffer like the others. The data struct shrinks from
  ~2636 to 1292 bytes.
- Keep the now uniformly-64-byte buffers safe: dcd_edpt_iso_alloc()/iso_activate()
  refuse isochronous on CH58x (no iso support; 8-bit T_LEN caps a packet at 255B),
  and update_in()/update_out() additionally cap each packet copy to 64 bytes so a
  class that ignores the iso-alloc result cannot run a memcpy past a buffer into a
  neighbour's.

Non-CH58x parts (e.g. ch32v103) keep the struct-based macros, buffer[EP_MAX], and
the iso buffer unchanged. Verified on ch582m_evt HIL (ci.lan): all device examples
pass; ch32v103 build unchanged.

Co-Authored-By: Claude Opus 4.8 (1M context) <[email protected]>

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