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authorHa Thach <[email protected]>2021-03-31 22:01:43 +0700
committerGitHub <[email protected]>2021-03-31 22:01:43 +0700
commit2f5dda90b70285a3a749cfedec8790efd9fcfa8a (patch)
tree3ece94dfc71665e9d50c2dbe39c347291cad45dc /examples/device
parentc5dfc54e549bbeb636ed44e5080e97a54ed1a2ab (diff)
parent1d8a79ef4f4f6603ea8102b08613e97e18ed7eb6 (diff)
Merge pull request #757 from kkitayam/add_support_for_gr_citrus
Add support for GR-CITRUS
Diffstat (limited to 'examples/device')
-rw-r--r--examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h12
-rw-r--r--examples/device/cdc_msc_freertos/src/freertos_hook.c19
-rw-r--r--examples/device/cdc_msc_freertos/src/main.c4
-rw-r--r--examples/device/hid_composite_freertos/src/FreeRTOSConfig.h12
-rw-r--r--examples/device/hid_composite_freertos/src/freertos_hook.c19
-rw-r--r--examples/device/hid_composite_freertos/src/main.c4
6 files changed, 66 insertions, 4 deletions
diff --git a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h
index 7b2b93d7b..b76d59706 100644
--- a/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h
+++ b/examples/device/cdc_msc_freertos/src/FreeRTOSConfig.h
@@ -132,6 +132,16 @@ extern uint32_t SystemCoreClock;
#define configASSERT( x )
#endif
+#ifdef __RX__
+/* Renesas RX series */
+#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
+#define vTickISR INT_Excep_CMT0_CMI0
+#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
+#define configKERNEL_INTERRUPT_PRIORITY 1
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
+
+#else
+
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
@@ -164,4 +174,6 @@ to all Cortex-M ports, and do not rely on any particular library functions. */
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+#endif
+
#endif /* __FREERTOS_CONFIG__H */
diff --git a/examples/device/cdc_msc_freertos/src/freertos_hook.c b/examples/device/cdc_msc_freertos/src/freertos_hook.c
index df15a8de7..273ad46e6 100644
--- a/examples/device/cdc_msc_freertos/src/freertos_hook.c
+++ b/examples/device/cdc_msc_freertos/src/freertos_hook.c
@@ -93,3 +93,22 @@ void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, Stack
configTIMER_TASK_STACK_DEPTH is specified in words, not bytes. */
*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
}
+
+#if CFG_TUSB_MCU == OPT_MCU_RX63X
+#include "iodefine.h"
+void vApplicationSetupTimerInterrupt(void)
+{
+ /* Enable CMT0 */
+ SYSTEM.PRCR.WORD = (0xA5u<<8) | TU_BIT(1);
+ MSTP(CMT0) = 0;
+ SYSTEM.PRCR.WORD = (0xA5u<<8);
+
+ CMT0.CMCNT = 0;
+ CMT0.CMCOR = (unsigned short)(((configPERIPHERAL_CLOCK_HZ/configTICK_RATE_HZ)-1)/128);
+ CMT0.CMCR.WORD = TU_BIT(6) | 2;
+ IR(CMT0, CMI0) = 0;
+ IPR(CMT0, CMI0) = configKERNEL_INTERRUPT_PRIORITY;
+ IEN(CMT0, CMI0) = 1;
+ CMT.CMSTR0.BIT.STR0 = 1;
+}
+#endif
diff --git a/examples/device/cdc_msc_freertos/src/main.c b/examples/device/cdc_msc_freertos/src/main.c
index 5779b7d45..ccff2e0fb 100644
--- a/examples/device/cdc_msc_freertos/src/main.c
+++ b/examples/device/cdc_msc_freertos/src/main.c
@@ -97,9 +97,9 @@ int main(void)
// skip starting scheduler (and return) for ESP32-S2
#if CFG_TUSB_MCU != OPT_MCU_ESP32S2
vTaskStartScheduler();
- NVIC_SystemReset();
- return 0;
#endif
+
+ return 0;
}
#if CFG_TUSB_MCU == OPT_MCU_ESP32S2
diff --git a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h b/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h
index 7b2b93d7b..b76d59706 100644
--- a/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h
+++ b/examples/device/hid_composite_freertos/src/FreeRTOSConfig.h
@@ -132,6 +132,16 @@ extern uint32_t SystemCoreClock;
#define configASSERT( x )
#endif
+#ifdef __RX__
+/* Renesas RX series */
+#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
+#define vTickISR INT_Excep_CMT0_CMI0
+#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
+#define configKERNEL_INTERRUPT_PRIORITY 1
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
+
+#else
+
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
@@ -164,4 +174,6 @@ to all Cortex-M ports, and do not rely on any particular library functions. */
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+#endif
+
#endif /* __FREERTOS_CONFIG__H */
diff --git a/examples/device/hid_composite_freertos/src/freertos_hook.c b/examples/device/hid_composite_freertos/src/freertos_hook.c
index df15a8de7..273ad46e6 100644
--- a/examples/device/hid_composite_freertos/src/freertos_hook.c
+++ b/examples/device/hid_composite_freertos/src/freertos_hook.c
@@ -93,3 +93,22 @@ void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, Stack
configTIMER_TASK_STACK_DEPTH is specified in words, not bytes. */
*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
}
+
+#if CFG_TUSB_MCU == OPT_MCU_RX63X
+#include "iodefine.h"
+void vApplicationSetupTimerInterrupt(void)
+{
+ /* Enable CMT0 */
+ SYSTEM.PRCR.WORD = (0xA5u<<8) | TU_BIT(1);
+ MSTP(CMT0) = 0;
+ SYSTEM.PRCR.WORD = (0xA5u<<8);
+
+ CMT0.CMCNT = 0;
+ CMT0.CMCOR = (unsigned short)(((configPERIPHERAL_CLOCK_HZ/configTICK_RATE_HZ)-1)/128);
+ CMT0.CMCR.WORD = TU_BIT(6) | 2;
+ IR(CMT0, CMI0) = 0;
+ IPR(CMT0, CMI0) = configKERNEL_INTERRUPT_PRIORITY;
+ IEN(CMT0, CMI0) = 1;
+ CMT.CMSTR0.BIT.STR0 = 1;
+}
+#endif
diff --git a/examples/device/hid_composite_freertos/src/main.c b/examples/device/hid_composite_freertos/src/main.c
index 79dc2ec69..37b4a0cf7 100644
--- a/examples/device/hid_composite_freertos/src/main.c
+++ b/examples/device/hid_composite_freertos/src/main.c
@@ -98,9 +98,9 @@ int main(void)
// skip starting scheduler (and return) for ESP32-S2
#if CFG_TUSB_MCU != OPT_MCU_ESP32S2
vTaskStartScheduler();
- NVIC_SystemReset();
- return 0;
#endif
+
+ return 0;
}
#if CFG_TUSB_MCU == OPT_MCU_ESP32S2