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| author | hathach <[email protected]> | 2026-06-19 22:54:50 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2026-06-19 22:54:50 +0700 |
| commit | 0c4c0be4589b2807abde5ef9ab156b6aaaad6616 (patch) | |
| tree | 7f313ea1aa2e06893f976c3099413858733dd78f /examples | |
| parent | dcb060c894713d60ce0ab009733e5d59a32d0d23 (diff) | |
dcd/ch58x: keep IRQ masked across the EP-arming RMW in dcd_edpt_xfer
dcd_edpt_xfer() re-enabled the USB interrupt before update_in() / ep_rx_set_response(),
which read-modify-write the (combined) EP control register. On CH58x the ISR RMWs that
same register to flip the manual data toggle, so a transfer interrupt landing mid-RMW
could drop the toggle flip and desync the endpoint. Move dcd_int_enable() to after the
arming so the whole sequence is atomic w.r.t. the ISR (matching the CH32X035 port #3703).
Co-Authored-By: Claude Opus 4.8 (1M context) <[email protected]>
Diffstat (limited to 'examples')
0 files changed, 0 insertions, 0 deletions